gh-143429: Use compile-time NaN encoding detection for test_struct (#143432)

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Henry Chen 2026-01-09 18:46:48 +08:00 committed by GitHub
parent 234a15dc4e
commit dcdb23f9db
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3 changed files with 10 additions and 7 deletions

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@ -1,6 +1,5 @@
import math
import random
import platform
import sys
import unittest
import warnings
@ -215,8 +214,8 @@ def test_pack_unpack_roundtrip_for_nans(self):
# PyFloat_Pack/Unpack*() API. See also gh-130317 and
# e.g. https://developercommunity.visualstudio.com/t/155064
signaling = 0
if platform.machine().startswith('parisc'):
# HP PA RISC uses 0 for quiet, see:
if _testcapi.nan_msb_is_signaling:
# HP PA RISC and some MIPS CPUs use 0 for quiet, see:
# https://en.wikipedia.org/wiki/NaN#Encoding
signaling = 1
i = make_nan(size, sign, not signaling)

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@ -5,7 +5,6 @@
import math
import operator
import unittest
import platform
import struct
import sys
import weakref
@ -891,6 +890,7 @@ def test_module_func(self):
self.assertRaises(StopIteration, next, it)
def test_half_float(self):
_testcapi = import_helper.import_module('_testcapi')
# Little-endian examples from:
# http://en.wikipedia.org/wiki/Half_precision_floating-point_format
format_bits_float__cleanRoundtrip_list = [
@ -935,8 +935,8 @@ def test_half_float(self):
# Check that packing produces a bit pattern representing a quiet NaN:
# all exponent bits and the msb of the fraction should all be 1.
if platform.machine().startswith('parisc'):
# HP PA RISC uses 0 for quiet, see:
if _testcapi.nan_msb_is_signaling:
# HP PA RISC and some MIPS CPUs use 0 for quiet, see:
# https://en.wikipedia.org/wiki/NaN#Encoding
expected = 0x7c
else:

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@ -171,5 +171,9 @@ _PyTestCapi_Init_Float(PyObject *mod)
return -1;
}
return 0;
#if (defined(__mips__) && !defined(__mips_nan2008)) || defined(__hppa__)
return PyModule_Add(mod, "nan_msb_is_signaling", PyBool_FromLong(1));
#else
return PyModule_Add(mod, "nan_msb_is_signaling", PyBool_FromLong(0));
#endif
}