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GH-135904: Implement assembler optimization for AArch64. (GH-139855)
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parent
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5 changed files with 74 additions and 9 deletions
27
Python/jit.c
27
Python/jit.c
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@ -167,11 +167,13 @@ set_bits(uint32_t *loc, uint8_t loc_start, uint64_t value, uint8_t value_start,
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// See https://developer.arm.com/documentation/ddi0602/2023-09/Base-Instructions
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// for instruction encodings:
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#define IS_AARCH64_ADD_OR_SUB(I) (((I) & 0x11C00000) == 0x11000000)
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#define IS_AARCH64_ADRP(I) (((I) & 0x9F000000) == 0x90000000)
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#define IS_AARCH64_BRANCH(I) (((I) & 0x7C000000) == 0x14000000)
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#define IS_AARCH64_LDR_OR_STR(I) (((I) & 0x3B000000) == 0x39000000)
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#define IS_AARCH64_MOV(I) (((I) & 0x9F800000) == 0x92800000)
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#define IS_AARCH64_ADD_OR_SUB(I) (((I) & 0x11C00000) == 0x11000000)
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#define IS_AARCH64_ADRP(I) (((I) & 0x9F000000) == 0x90000000)
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#define IS_AARCH64_BRANCH(I) (((I) & 0x7C000000) == 0x14000000)
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#define IS_AARCH64_BRANCH_COND(I) (((I) & 0x7C000000) == 0x54000000)
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#define IS_AARCH64_TEST_AND_BRANCH(I) (((I) & 0x7E000000) == 0x36000000)
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#define IS_AARCH64_LDR_OR_STR(I) (((I) & 0x3B000000) == 0x39000000)
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#define IS_AARCH64_MOV(I) (((I) & 0x9F800000) == 0x92800000)
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// LLD is a great reference for performing relocations... just keep in
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// mind that Tools/jit/build.py does filtering and preprocessing for us!
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@ -332,6 +334,21 @@ patch_aarch64_21rx(unsigned char *location, uint64_t value)
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patch_aarch64_21r(location, value);
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}
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// 21-bit relative branch.
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void
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patch_aarch64_19r(unsigned char *location, uint64_t value)
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{
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uint32_t *loc32 = (uint32_t *)location;
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assert(IS_AARCH64_BRANCH_COND(*loc32));
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value -= (uintptr_t)location;
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// Check that we're not out of range of 21 signed bits:
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assert((int64_t)value >= -(1 << 20));
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assert((int64_t)value < (1 << 20));
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// Since instructions are 4-byte aligned, only use 19 bits:
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assert(get_bits(value, 0, 2) == 0);
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set_bits(loc32, 5, value, 2, 19);
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}
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// 28-bit relative branch.
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void
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patch_aarch64_26r(unsigned char *location, uint64_t value)
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