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GH-135904: Implement assembler optimization for AArch64. (GH-139855)
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Mark Shannon
GitHub
parent
999ab8926b
commit
f1883852ed
5 changed files with 74 additions and 9 deletions
27
Python/jit.c
27
Python/jit.c
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@ -167,11 +167,13 @@ set_bits(uint32_t *loc, uint8_t loc_start, uint64_t value, uint8_t value_start,
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// See https://developer.arm.com/documentation/ddi0602/2023-09/Base-Instructions
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// for instruction encodings:
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#define IS_AARCH64_ADD_OR_SUB(I) (((I) & 0x11C00000) == 0x11000000)
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#define IS_AARCH64_ADRP(I) (((I) & 0x9F000000) == 0x90000000)
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#define IS_AARCH64_BRANCH(I) (((I) & 0x7C000000) == 0x14000000)
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#define IS_AARCH64_LDR_OR_STR(I) (((I) & 0x3B000000) == 0x39000000)
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#define IS_AARCH64_MOV(I) (((I) & 0x9F800000) == 0x92800000)
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#define IS_AARCH64_ADD_OR_SUB(I) (((I) & 0x11C00000) == 0x11000000)
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#define IS_AARCH64_ADRP(I) (((I) & 0x9F000000) == 0x90000000)
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#define IS_AARCH64_BRANCH(I) (((I) & 0x7C000000) == 0x14000000)
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#define IS_AARCH64_BRANCH_COND(I) (((I) & 0x7C000000) == 0x54000000)
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#define IS_AARCH64_TEST_AND_BRANCH(I) (((I) & 0x7E000000) == 0x36000000)
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#define IS_AARCH64_LDR_OR_STR(I) (((I) & 0x3B000000) == 0x39000000)
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#define IS_AARCH64_MOV(I) (((I) & 0x9F800000) == 0x92800000)
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// LLD is a great reference for performing relocations... just keep in
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// mind that Tools/jit/build.py does filtering and preprocessing for us!
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@ -332,6 +334,21 @@ patch_aarch64_21rx(unsigned char *location, uint64_t value)
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patch_aarch64_21r(location, value);
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}
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// 21-bit relative branch.
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void
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patch_aarch64_19r(unsigned char *location, uint64_t value)
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{
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uint32_t *loc32 = (uint32_t *)location;
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assert(IS_AARCH64_BRANCH_COND(*loc32));
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value -= (uintptr_t)location;
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// Check that we're not out of range of 21 signed bits:
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assert((int64_t)value >= -(1 << 20));
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assert((int64_t)value < (1 << 20));
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// Since instructions are 4-byte aligned, only use 19 bits:
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assert(get_bits(value, 0, 2) == 0);
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set_bits(loc32, 5, value, 2, 19);
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}
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// 28-bit relative branch.
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void
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patch_aarch64_26r(unsigned char *location, uint64_t value)
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@ -39,6 +39,34 @@
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# Update with all of the inverted branches, too:
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_X86_BRANCHES |= {v: k for k, v in _X86_BRANCHES.items() if v}
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_AARCH64_COND_CODES = {
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# https://developer.arm.com/documentation/dui0801/b/CJAJIHAD?lang=en
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"eq": "ne",
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"ne": "eq",
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"lt": "ge",
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"ge": "lt",
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"gt": "le",
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"le": "gt",
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"vs": "vc",
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"vc": "vs",
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"mi": "pl",
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"pl": "mi",
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"cs": "cc",
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"cc": "cs",
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"hs": "lo",
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"lo": "hs",
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"hi": "ls",
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"ls": "hi",
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}
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# Branches are either b.{cond} or bc.{cond}
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_AARCH64_BRANCHES = {
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"b." + cond: ("b." + inverse if inverse else None)
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for (cond, inverse) in _AARCH64_COND_CODES.items()
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} | {
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"bc." + cond: ("bc." + inverse if inverse else None)
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for (cond, inverse) in _AARCH64_COND_CODES.items()
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}
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@dataclasses.dataclass
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class _Block:
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@ -283,13 +311,28 @@ def run(self) -> None:
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self.path.write_text(self._body())
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class OptimizerAArch64(Optimizer): # pylint: disable = too-few-public-methods
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"""aarch64-apple-darwin/aarch64-pc-windows-msvc/aarch64-unknown-linux-gnu"""
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# Mach-O does not support the 19 bit branch locations needed for branch reordering
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class OptimizerAArch64_MachO(Optimizer): # pylint: disable = too-few-public-methods
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"""aarch64-apple-darwin"""
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# https://developer.arm.com/documentation/ddi0602/2025-03/Base-Instructions/B--Branch-
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_re_jump = re.compile(r"\s*b\s+(?P<target>[\w.]+)")
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class OptimizerAArch64(Optimizer): # pylint: disable = too-few-public-methods
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"""aarch64-pc-windows-msvc/aarch64-unknown-linux-gnu"""
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_branches = _AARCH64_BRANCHES
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_re_branch = re.compile(
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rf"\s*(?P<instruction>{'|'.join(_AARCH64_BRANCHES)})\s+(.+,\s+)*(?P<target>[\w.]+)"
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)
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# https://developer.arm.com/documentation/ddi0602/2025-03/Base-Instructions/B--Branch-
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_re_jump = re.compile(r"\s*b\s+(?P<target>[\w.]+)")
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# https://developer.arm.com/documentation/ddi0602/2025-09/Base-Instructions/RET--Return-from-subroutine-
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_re_return = re.compile(r"\s*ret\b")
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class OptimizerX86(Optimizer): # pylint: disable = too-few-public-methods
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"""i686-pc-windows-msvc/x86_64-apple-darwin/x86_64-unknown-linux-gnu"""
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@ -10,6 +10,7 @@
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"ARM64_RELOC_PAGEOFF12",
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"ARM64_RELOC_UNSIGNED",
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"IMAGE_REL_AMD64_REL32",
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"IMAGE_REL_ARM64_BRANCH19",
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"IMAGE_REL_ARM64_BRANCH26",
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"IMAGE_REL_ARM64_PAGEBASE_REL21",
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"IMAGE_REL_ARM64_PAGEOFFSET_12A",
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@ -20,6 +21,7 @@
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"R_AARCH64_ADR_GOT_PAGE",
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"R_AARCH64_ADR_PREL_PG_HI21",
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"R_AARCH64_CALL26",
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"R_AARCH64_CONDBR19",
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"R_AARCH64_JUMP26",
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"R_AARCH64_ADD_ABS_LO12_NC",
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"R_AARCH64_LD64_GOT_LO12_NC",
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@ -61,6 +61,7 @@ class HoleValue(enum.Enum):
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# x86_64-pc-windows-msvc:
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"IMAGE_REL_AMD64_REL32": "patch_x86_64_32rx",
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# aarch64-pc-windows-msvc:
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"IMAGE_REL_ARM64_BRANCH19": "patch_aarch64_19r",
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"IMAGE_REL_ARM64_BRANCH26": "patch_aarch64_26r",
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"IMAGE_REL_ARM64_PAGEBASE_REL21": "patch_aarch64_21rx",
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"IMAGE_REL_ARM64_PAGEOFFSET_12A": "patch_aarch64_12",
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@ -74,6 +75,7 @@ class HoleValue(enum.Enum):
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"R_AARCH64_ADR_GOT_PAGE": "patch_aarch64_21rx",
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"R_AARCH64_ADR_PREL_PG_HI21": "patch_aarch64_21r",
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"R_AARCH64_CALL26": "patch_aarch64_26r",
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"R_AARCH64_CONDBR19": "patch_aarch64_19r",
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"R_AARCH64_JUMP26": "patch_aarch64_26r",
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"R_AARCH64_LD64_GOT_LO12_NC": "patch_aarch64_12x",
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"R_AARCH64_MOVW_UABS_G0_NC": "patch_aarch64_16a",
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@ -335,7 +335,8 @@ def _handle_relocation(
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"Offset": offset,
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"Symbol": s,
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"Type": {
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"Name": "IMAGE_REL_ARM64_BRANCH26"
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"Name": "IMAGE_REL_ARM64_BRANCH19"
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| "IMAGE_REL_ARM64_BRANCH26"
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| "IMAGE_REL_ARM64_PAGEBASE_REL21"
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| "IMAGE_REL_ARM64_PAGEOFFSET_12A"
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| "IMAGE_REL_ARM64_PAGEOFFSET_12L" as kind
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@ -564,7 +565,7 @@ def get_target(host: str) -> _COFF32 | _COFF64 | _ELF | _MachO:
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if re.fullmatch(r"aarch64-apple-darwin.*", host):
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host = "aarch64-apple-darwin"
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condition = "defined(__aarch64__) && defined(__APPLE__)"
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optimizer = _optimizers.OptimizerAArch64
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optimizer = _optimizers.OptimizerAArch64_MachO
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target = _MachO(host, condition, optimizer=optimizer)
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elif re.fullmatch(r"aarch64-pc-windows-msvc", host):
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host = "aarch64-pc-windows-msvc"
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