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lavu/riscv: depend on RVB and simplify accordingly

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This commit is contained in:
Rémi Denis-Courmont 2024-07-27 14:30:17 +03:00
parent ba88e8174a
commit cb31f17ca8
3 changed files with 4 additions and 5 deletions
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2
libavutil/riscv/float_dsp_init.c
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@ -54,7 +54,7 @@ av_cold void ff_float_dsp_init_riscv(AVFloatDSPContext *fdsp)
#if HAVE_RVV
int flags = av_get_cpu_flags();
if (flags & AV_CPU_FLAG_RVB_ADDR) {
if (flags & AV_CPU_FLAG_RVB) {
if (flags & AV_CPU_FLAG_RVV_F32) {
fdsp->vector_fmul = ff_vector_fmul_rvv;
fdsp->vector_fmac_scalar = ff_vector_fmac_scalar_rvv;