Commit graph

12 commits

Author SHA1 Message Date
sunyuechi
4e7b5ac48f lavc/vp9dsp: R-V V mc bilin hv
C908   X60
vp9_avg_bilin_4hv_8bpp_c                           :   10.7    9.5
vp9_avg_bilin_4hv_8bpp_rvv_i32                     :    4.0    3.5
vp9_avg_bilin_8hv_8bpp_c                           :   38.5   34.2
vp9_avg_bilin_8hv_8bpp_rvv_i32                     :    7.2    6.5
vp9_avg_bilin_16hv_8bpp_c                          :  147.2  130.5
vp9_avg_bilin_16hv_8bpp_rvv_i32                    :   14.5   12.7
vp9_avg_bilin_32hv_8bpp_c                          :  574.2  509.7
vp9_avg_bilin_32hv_8bpp_rvv_i32                    :   42.5   38.0
vp9_avg_bilin_64hv_8bpp_c                          : 2321.2 2017.7
vp9_avg_bilin_64hv_8bpp_rvv_i32                    :  163.5  131.0
vp9_put_bilin_4hv_8bpp_c                           :   10.0    8.7
vp9_put_bilin_4hv_8bpp_rvv_i32                     :    3.5    3.0
vp9_put_bilin_8hv_8bpp_c                           :   35.2   31.2
vp9_put_bilin_8hv_8bpp_rvv_i32                     :    6.5    5.7
vp9_put_bilin_16hv_8bpp_c                          :  134.0  119.0
vp9_put_bilin_16hv_8bpp_rvv_i32                    :   12.7   11.5
vp9_put_bilin_32hv_8bpp_c                          :  538.5  464.2
vp9_put_bilin_32hv_8bpp_rvv_i32                    :   39.7   35.2
vp9_put_bilin_64hv_8bpp_c                          : 2111.7 1833.2
vp9_put_bilin_64hv_8bpp_rvv_i32                    :  138.5  122.5

Signed-off-by: Rémi Denis-Courmont <remi@remlab.net>
2024-08-19 22:29:20 +03:00
sunyuechi
9edd2e723b lavc/vp9dsp: R-V V mc bilin h v
C908   X60
vp9_avg_bilin_4h_8bpp_c                            :    5.5    4.7
vp9_avg_bilin_4h_8bpp_rvv_i32                      :    1.7    1.5
vp9_avg_bilin_4v_8bpp_c                            :    5.5    4.7
vp9_avg_bilin_4v_8bpp_rvv_i32                      :    1.5    1.2
vp9_avg_bilin_8h_8bpp_c                            :   20.0   17.7
vp9_avg_bilin_8h_8bpp_rvv_i32                      :    3.0    2.7
vp9_avg_bilin_8v_8bpp_c                            :   20.7   18.7
vp9_avg_bilin_8v_8bpp_rvv_i32                      :    3.0    2.7
vp9_avg_bilin_16h_8bpp_c                           :   78.2   69.7
vp9_avg_bilin_16h_8bpp_rvv_i32                     :    7.0    6.2
vp9_avg_bilin_16v_8bpp_c                           :   98.5   73.2
vp9_avg_bilin_16v_8bpp_rvv_i32                     :    7.0    6.0
vp9_avg_bilin_32h_8bpp_c                           :  325.5  275.5
vp9_avg_bilin_32h_8bpp_rvv_i32                     :   23.0   20.5
vp9_avg_bilin_32v_8bpp_c                           :  342.2  290.0
vp9_avg_bilin_32v_8bpp_rvv_i32                     :   21.7   19.5
vp9_avg_bilin_64h_8bpp_c                           : 1263.7 1095.7
vp9_avg_bilin_64h_8bpp_rvv_i32                     :   91.2   81.2
vp9_avg_bilin_64v_8bpp_c                           : 1331.7 1155.2
vp9_avg_bilin_64v_8bpp_rvv_i32                     :   91.2   81.0
vp9_put_bilin_4h_8bpp_c                            :    4.5    4.0
vp9_put_bilin_4h_8bpp_rvv_i32                      :    1.0    1.0
vp9_put_bilin_4v_8bpp_c                            :    4.7    4.2
vp9_put_bilin_4v_8bpp_rvv_i32                      :    1.0    1.0
vp9_put_bilin_8h_8bpp_c                            :   16.7   15.0
vp9_put_bilin_8h_8bpp_rvv_i32                      :    2.2    2.0
vp9_put_bilin_8v_8bpp_c                            :   17.5   15.7
vp9_put_bilin_8v_8bpp_rvv_i32                      :    2.2    2.0
vp9_put_bilin_16h_8bpp_c                           :   65.2   58.0
vp9_put_bilin_16h_8bpp_rvv_i32                     :    6.0    5.5
vp9_put_bilin_16v_8bpp_c                           :   69.2   61.7
vp9_put_bilin_16v_8bpp_rvv_i32                     :    5.7    5.2
vp9_put_bilin_32h_8bpp_c                           :  273.2  229.0
vp9_put_bilin_32h_8bpp_rvv_i32                     :   19.7   17.7
vp9_put_bilin_32v_8bpp_c                           :  290.5  243.7
vp9_put_bilin_32v_8bpp_rvv_i32                     :   18.7   16.7
vp9_put_bilin_64h_8bpp_c                           : 1040.5  910.5
vp9_put_bilin_64h_8bpp_rvv_i32                     :   82.5   73.0
vp9_put_bilin_64v_8bpp_c                           : 1108.5  971.0
vp9_put_bilin_64v_8bpp_rvv_i32                     :   82.2   73.2

Signed-off-by: Rémi Denis-Courmont <remi@remlab.net>
2024-08-19 22:29:20 +03:00
Rémi Denis-Courmont
7b24f96c87 lavc/vp9dsp: remove R-V I intra functions
At this point, they are identical to the C code, except for instruction
ordering. In fact, they are typically slower or no faster than the C code.
2024-07-29 21:16:41 +03:00
sunyuechi
544acfa2c0 lavc/vp9dsp: R-V V rename ff_avg to ff_vp9_avg
Avoid potential naming conflicts

Signed-off-by: Rémi Denis-Courmont <remi@remlab.net>
2024-05-30 18:30:52 +03:00
sunyuechi
0c1304ae11 lavc/vp9dsp: R-V V mc avg
C908:
vp9_avg4_8bpp_c: 1.2
vp9_avg4_8bpp_rvv_i64: 1.0
vp9_avg8_8bpp_c: 3.7
vp9_avg8_8bpp_rvv_i64: 1.5
vp9_avg16_8bpp_c: 14.7
vp9_avg16_8bpp_rvv_i64: 3.5
vp9_avg32_8bpp_c: 57.7
vp9_avg32_8bpp_rvv_i64: 10.0
vp9_avg64_8bpp_c: 229.0
vp9_avg64_8bpp_rvv_i64: 31.7

Signed-off-by: Rémi Denis-Courmont <remi@remlab.net>
2024-05-21 21:28:14 +03:00
sunyuechi
d521b7280c lavc/vp9dsp: R-V V ipred tm
C908:
vp9_tm_4x4_8bpp_c: 116.5
vp9_tm_4x4_8bpp_rvv_i32: 43.5
vp9_tm_8x8_8bpp_c: 416.2
vp9_tm_8x8_8bpp_rvv_i32: 86.0
vp9_tm_16x16_8bpp_c: 1665.5
vp9_tm_16x16_8bpp_rvv_i32: 187.2
vp9_tm_32x32_8bpp_c: 6974.2
vp9_tm_32x32_8bpp_rvv_i32: 625.7

Signed-off-by: Rémi Denis-Courmont <remi@remlab.net>
2024-05-17 18:12:11 +03:00
sunyuechi
0cc8661499 lavc/vp9dsp: R-V V ipred hor
C908:
vp9_hor_8x8_8bpp_c: 74.7
vp9_hor_8x8_8bpp_rvv_i32: 35.7
vp9_hor_16x16_8bpp_c: 175.5
vp9_hor_16x16_8bpp_rvv_i32: 80.2
vp9_hor_32x32_8bpp_c: 510.2
vp9_hor_32x32_8bpp_rvv_i32: 264.0

Signed-off-by: Rémi Denis-Courmont <remi@remlab.net>
2024-05-15 19:56:06 +03:00
sunyuechi
b82d9f55d1 lavc/vp9dsp: R-V mc copy
C908:
vp9_put4_8bpp_c: 0.7
vp9_put4_8bpp_rvi: 0.5
vp9_put8_8bpp_c: 2.5
vp9_put8_8bpp_rvi: 0.5
vp9_put16_8bpp_c: 16.7
vp9_put16_8bpp_rvi: 1.5
vp9_put32_8bpp_c: 37.2
vp9_put32_8bpp_rvi: 5.7
vp9_put64_8bpp_c: 107.5
vp9_put64_8bpp_rvi: 21.7

Signed-off-by: Rémi Denis-Courmont <remi@remlab.net>
2024-05-15 19:52:28 +03:00
sunyuechi
aa9dbd91cf lavc/vp9dsp: R-V ipred vert
C908:
vp9_vert_8x8_8bpp_c: 22.0
vp9_vert_8x8_8bpp_rvi: 15.7
vp9_vert_16x16_8bpp_c: 71.2
vp9_vert_16x16_8bpp_rvi: 39.0
vp9_vert_32x32_8bpp_c: 300.2
vp9_vert_32x32_8bpp_rvi: 135.2

Signed-off-by: Rémi Denis-Courmont <remi@remlab.net>
2024-05-15 19:52:25 +03:00
Rémi Denis-Courmont
cdcb4b98b7 lavc/riscv: use ff_rv_vlen_least() 2024-05-13 18:36:07 +03:00
Rémi Denis-Courmont
38e7b0ecf8 lavc/vp9dsp: fix indentation 2024-05-13 18:36:07 +03:00
sunyuechi
c3a96f97f8 lavc/vp9dsp: R-V V ipred dc
C908:
vp9_dc_8x8_8bpp_c: 46.0
vp9_dc_8x8_8bpp_rvv_i64: 41.0
vp9_dc_16x16_8bpp_c: 109.2
vp9_dc_16x16_8bpp_rvv_i32: 72.7
vp9_dc_32x32_8bpp_c: 365.2
vp9_dc_32x32_8bpp_rvv_i32: 165.5
vp9_dc_127_8x8_8bpp_c: 23.0
vp9_dc_127_8x8_8bpp_rvv_i64: 22.0
vp9_dc_127_16x16_8bpp_c: 70.2
vp9_dc_127_16x16_8bpp_rvv_i32: 50.2
vp9_dc_127_32x32_8bpp_c: 295.2
vp9_dc_127_32x32_8bpp_rvv_i32: 136.7
vp9_dc_128_8x8_8bpp_c: 23.0
vp9_dc_128_8x8_8bpp_rvv_i64: 22.0
vp9_dc_128_16x16_8bpp_c: 70.2
vp9_dc_128_16x16_8bpp_rvv_i32: 50.2
vp9_dc_128_32x32_8bpp_c: 295.2
vp9_dc_128_32x32_8bpp_rvv_i32: 136.7
vp9_dc_129_8x8_8bpp_c: 23.0
vp9_dc_129_8x8_8bpp_rvv_i64: 22.0
vp9_dc_129_16x16_8bpp_c: 70.2
vp9_dc_129_16x16_8bpp_rvv_i32: 50.2
vp9_dc_129_32x32_8bpp_c: 295.2
vp9_dc_129_32x32_8bpp_rvv_i32: 136.7
vp9_dc_left_8x8_8bpp_c: 38.0
vp9_dc_left_8x8_8bpp_rvv_i64: 36.0
vp9_dc_left_16x16_8bpp_c: 93.2
vp9_dc_left_16x16_8bpp_rvv_i32: 67.7
vp9_dc_left_32x32_8bpp_c: 333.2
vp9_dc_left_32x32_8bpp_rvv_i32: 158.5
vp9_dc_top_8x8_8bpp_c: 38.7
vp9_dc_top_8x8_8bpp_rvv_i64: 36.0
vp9_dc_top_16x16_8bpp_c: 93.2
vp9_dc_top_16x16_8bpp_rvv_i32: 67.7
vp9_dc_top_32x32_8bpp_c: 333.2
vp9_dc_top_32x32_8bpp_rvv_i32: 156.2

Signed-off-by: Rémi Denis-Courmont <remi@remlab.net>
2024-04-29 20:46:05 +03:00