2015-03-23 17:02:11 -07:00
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// autogenerated from rulegen/lower_amd64.rules: do not edit!
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// generated with: go run rulegen/rulegen.go rulegen/lower_amd64.rules lowerAmd64 lowerAmd64.go
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package ssa
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func lowerAmd64(v *Value) bool {
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switch v.Op {
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case OpADDQ:
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2015-03-26 10:49:03 -07:00
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// match: (ADDQ x (Const [c]))
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2015-03-23 17:02:11 -07:00
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// cond:
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// result: (ADDCQ [c] x)
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{
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x := v.Args[0]
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2015-03-26 10:49:03 -07:00
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if v.Args[1].Op != OpConst {
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2015-03-23 17:02:11 -07:00
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goto end0
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}
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c := v.Args[1].Aux
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v.Op = OpADDCQ
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v.Aux = nil
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v.Args = v.argstorage[:0]
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v.Aux = c
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v.AddArg(x)
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return true
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}
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end0:
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;
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2015-03-26 10:49:03 -07:00
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// match: (ADDQ (Const [c]) x)
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2015-03-23 17:02:11 -07:00
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// cond:
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// result: (ADDCQ [c] x)
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{
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2015-03-26 10:49:03 -07:00
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if v.Args[0].Op != OpConst {
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2015-03-23 17:02:11 -07:00
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goto end1
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}
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c := v.Args[0].Aux
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x := v.Args[1]
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v.Op = OpADDCQ
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v.Aux = nil
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v.Args = v.argstorage[:0]
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v.Aux = c
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v.AddArg(x)
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return true
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}
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end1:
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;
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case OpAdd:
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// match: (Add <t> x y)
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// cond: is64BitInt(t)
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// result: (ADDQ x y)
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{
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t := v.Type
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x := v.Args[0]
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y := v.Args[1]
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if !(is64BitInt(t)) {
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goto end2
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}
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v.Op = OpADDQ
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v.Aux = nil
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v.Args = v.argstorage[:0]
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v.AddArg(x)
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v.AddArg(y)
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return true
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}
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end2:
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;
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// match: (Add <t> x y)
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// cond: is32BitInt(t)
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// result: (ADDL x y)
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{
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t := v.Type
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x := v.Args[0]
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y := v.Args[1]
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if !(is32BitInt(t)) {
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goto end3
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}
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v.Op = OpADDL
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v.Aux = nil
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v.Args = v.argstorage[:0]
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v.AddArg(x)
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v.AddArg(y)
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return true
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}
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end3:
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;
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case OpCMPQ:
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2015-03-26 10:49:03 -07:00
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// match: (CMPQ x (Const [c]))
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2015-03-23 17:02:11 -07:00
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// cond:
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// result: (CMPCQ x [c])
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{
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x := v.Args[0]
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2015-03-26 10:49:03 -07:00
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if v.Args[1].Op != OpConst {
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2015-03-23 17:02:11 -07:00
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goto end4
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}
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c := v.Args[1].Aux
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v.Op = OpCMPCQ
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v.Aux = nil
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v.Args = v.argstorage[:0]
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v.AddArg(x)
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v.Aux = c
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return true
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}
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end4:
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;
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2015-03-26 10:49:03 -07:00
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// match: (CMPQ (Const [c]) x)
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2015-03-23 17:02:11 -07:00
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// cond:
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2015-03-26 10:49:03 -07:00
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// result: (InvertFlags (CMPCQ <TypeFlags> x [c]))
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2015-03-23 17:02:11 -07:00
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{
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2015-03-26 10:49:03 -07:00
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if v.Args[0].Op != OpConst {
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2015-03-23 17:02:11 -07:00
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goto end5
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}
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c := v.Args[0].Aux
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x := v.Args[1]
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v.Op = OpInvertFlags
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v.Aux = nil
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v.Args = v.argstorage[:0]
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v0 := v.Block.NewValue(OpCMPCQ, TypeInvalid, nil)
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2015-03-26 10:49:03 -07:00
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v0.Type = TypeFlags
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2015-03-23 17:02:11 -07:00
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v0.AddArg(x)
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v0.Aux = c
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v.AddArg(v0)
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return true
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}
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end5:
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;
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case OpLess:
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// match: (Less x y)
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// cond: is64BitInt(v.Args[0].Type) && isSigned(v.Args[0].Type)
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2015-03-26 10:49:03 -07:00
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// result: (SETL (CMPQ <TypeFlags> x y))
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2015-03-23 17:02:11 -07:00
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{
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x := v.Args[0]
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y := v.Args[1]
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if !(is64BitInt(v.Args[0].Type) && isSigned(v.Args[0].Type)) {
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goto end6
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}
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v.Op = OpSETL
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v.Aux = nil
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v.Args = v.argstorage[:0]
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v0 := v.Block.NewValue(OpCMPQ, TypeInvalid, nil)
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2015-03-26 10:49:03 -07:00
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v0.Type = TypeFlags
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2015-03-23 17:02:11 -07:00
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v0.AddArg(x)
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v0.AddArg(y)
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v.AddArg(v0)
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return true
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}
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end6:
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;
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case OpLoadFP:
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// match: (LoadFP <t> [offset] mem)
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// cond: typeSize(t) == 8
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// result: (LoadFP8 <t> [offset] mem)
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{
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t := v.Type
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offset := v.Aux
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mem := v.Args[0]
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if !(typeSize(t) == 8) {
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goto end7
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}
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v.Op = OpLoadFP8
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v.Aux = nil
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v.Args = v.argstorage[:0]
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v.Type = t
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v.Aux = offset
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v.AddArg(mem)
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return true
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}
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end7:
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;
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case OpLoadSP:
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// match: (LoadSP <t> [offset] mem)
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// cond: typeSize(t) == 8
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// result: (LoadSP8 <t> [offset] mem)
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{
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t := v.Type
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offset := v.Aux
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mem := v.Args[0]
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if !(typeSize(t) == 8) {
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goto end8
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}
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v.Op = OpLoadSP8
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v.Aux = nil
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v.Args = v.argstorage[:0]
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v.Type = t
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v.Aux = offset
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v.AddArg(mem)
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return true
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}
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end8:
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;
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case OpSETL:
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// match: (SETL (InvertFlags x))
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// cond:
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// result: (SETGE x)
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{
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if v.Args[0].Op != OpInvertFlags {
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goto end9
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}
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x := v.Args[0].Args[0]
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v.Op = OpSETGE
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v.Aux = nil
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v.Args = v.argstorage[:0]
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v.AddArg(x)
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return true
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}
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end9:
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;
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case OpSUBQ:
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2015-03-26 10:49:03 -07:00
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// match: (SUBQ x (Const [c]))
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2015-03-23 17:02:11 -07:00
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// cond:
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// result: (SUBCQ x [c])
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{
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x := v.Args[0]
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2015-03-26 10:49:03 -07:00
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if v.Args[1].Op != OpConst {
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2015-03-23 17:02:11 -07:00
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goto end10
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}
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c := v.Args[1].Aux
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v.Op = OpSUBCQ
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v.Aux = nil
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v.Args = v.argstorage[:0]
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v.AddArg(x)
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v.Aux = c
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return true
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}
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end10:
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;
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2015-03-26 10:49:03 -07:00
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// match: (SUBQ <t> (Const [c]) x)
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2015-03-23 17:02:11 -07:00
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// cond:
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2015-03-26 10:49:03 -07:00
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// result: (NEGQ (SUBCQ <t> x [c]))
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2015-03-23 17:02:11 -07:00
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{
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2015-03-26 10:49:03 -07:00
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t := v.Type
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if v.Args[0].Op != OpConst {
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2015-03-23 17:02:11 -07:00
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goto end11
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}
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c := v.Args[0].Aux
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x := v.Args[1]
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v.Op = OpNEGQ
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v.Aux = nil
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v.Args = v.argstorage[:0]
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v0 := v.Block.NewValue(OpSUBCQ, TypeInvalid, nil)
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2015-03-26 10:49:03 -07:00
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v0.Type = t
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2015-03-23 17:02:11 -07:00
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v0.AddArg(x)
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v0.Aux = c
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v.AddArg(v0)
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return true
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}
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end11:
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;
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case OpStoreFP:
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// match: (StoreFP [offset] val mem)
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// cond: typeSize(val.Type) == 8
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// result: (StoreFP8 [offset] val mem)
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{
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offset := v.Aux
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val := v.Args[0]
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mem := v.Args[1]
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if !(typeSize(val.Type) == 8) {
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goto end12
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}
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v.Op = OpStoreFP8
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v.Aux = nil
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v.Args = v.argstorage[:0]
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v.Aux = offset
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v.AddArg(val)
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v.AddArg(mem)
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return true
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}
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end12:
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;
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case OpStoreSP:
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// match: (StoreSP [offset] val mem)
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// cond: typeSize(val.Type) == 8
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// result: (StoreSP8 [offset] val mem)
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{
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offset := v.Aux
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val := v.Args[0]
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mem := v.Args[1]
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if !(typeSize(val.Type) == 8) {
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goto end13
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}
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v.Op = OpStoreSP8
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v.Aux = nil
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v.Args = v.argstorage[:0]
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v.Aux = offset
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v.AddArg(val)
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v.AddArg(mem)
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return true
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}
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end13:
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;
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case OpSub:
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// match: (Sub <t> x y)
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// cond: is64BitInt(t)
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// result: (SUBQ x y)
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{
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t := v.Type
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x := v.Args[0]
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y := v.Args[1]
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if !(is64BitInt(t)) {
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goto end14
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}
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v.Op = OpSUBQ
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v.Aux = nil
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v.Args = v.argstorage[:0]
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v.AddArg(x)
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v.AddArg(y)
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return true
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}
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end14:
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}
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return false
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}
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