2015-02-27 22:57:28 -05:00
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// Inferno utils/8l/asm.c
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2020-06-03 13:17:17 +02:00
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// https://bitbucket.org/inferno-os/inferno-os/src/master/utils/8l/asm.c
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2015-02-27 22:57:28 -05:00
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//
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// Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved.
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// Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net)
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// Portions Copyright © 1997-1999 Vita Nuova Limited
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// Portions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com)
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// Portions Copyright © 2004,2006 Bruce Ellis
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// Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net)
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// Revisions Copyright © 2000-2007 Lucent Technologies Inc. and others
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2016-04-10 14:32:26 -07:00
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// Portions Copyright © 2009 The Go Authors. All rights reserved.
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2015-02-27 22:57:28 -05:00
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy
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// of this software and associated documentation files (the "Software"), to deal
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// in the Software without restriction, including without limitation the rights
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// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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// copies of the Software, and to permit persons to whom the Software is
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// furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in
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// all copies or substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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// THE SOFTWARE.
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2015-05-21 13:28:10 -04:00
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package x86
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2015-02-27 22:57:28 -05:00
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import (
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2017-04-18 12:53:25 -07:00
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"cmd/internal/objabi"
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2017-09-30 21:10:49 +00:00
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"cmd/internal/sys"
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2015-05-21 13:28:10 -04:00
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"cmd/link/internal/ld"
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2020-03-11 12:12:41 -04:00
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"cmd/link/internal/loader"
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2017-10-04 17:54:04 -04:00
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"cmd/link/internal/sym"
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2017-10-06 16:01:02 -04:00
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"debug/elf"
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2015-02-27 22:57:28 -05:00
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"log"
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)
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2020-05-15 18:35:05 -04:00
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func gentext(ctxt *ld.Link, ldr *loader.Loader) {
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2016-08-25 21:06:10 -04:00
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if ctxt.DynlinkingGo() {
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2016-06-16 12:59:09 -07:00
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// We need get_pc_thunk.
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} else {
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2017-10-05 10:20:17 -04:00
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switch ctxt.BuildMode {
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case ld.BuildModeCArchive:
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2017-10-07 13:43:38 -04:00
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if !ctxt.IsELF {
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2016-06-16 12:59:09 -07:00
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return
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}
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2017-10-05 10:20:17 -04:00
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case ld.BuildModePIE, ld.BuildModeCShared, ld.BuildModePlugin:
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2016-06-16 12:59:09 -07:00
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// We need get_pc_thunk.
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default:
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return
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}
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2015-10-28 11:40:22 +13:00
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}
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[dev.ssa] cmd/compile: fix PIC for SSA-generated code
Access to globals requires a 2-instruction sequence on PIC 386.
MOVL foo(SB), AX
is translated by the obj package into:
CALL getPCofNextInstructionInTempRegister(SB)
MOVL (&foo-&thisInstruction)(tmpReg), AX
The call returns the PC of the next instruction in a register.
The next instruction then offsets from that register to get the
address required. The tricky part is the allocation of the
temp register. The legacy compiler always used CX, and forbid
the register allocator from allocating CX when in PIC mode.
We can't easily do that in SSA because CX is actually a required
register for shift instructions. (I think the old backend got away
with this because the register allocator never uses CX, only
codegen knows that shifts must use CX.)
Instead, we allow the temp register to be anything. When the
destination of the MOV (or LEA) is an integer register, we can
use that register. Otherwise, we make sure to compile the
operation using an LEA to reference the global. So
MOVL AX, foo(SB)
is never generated directly. Instead, SSA generates:
LEAL foo(SB), DX
MOVL AX, (DX)
which is then rewritten by the obj package to:
CALL getPcInDX(SB)
LEAL (&foo-&thisInstruction)(DX), AX
MOVL AX, (DX)
So this CL modifies the obj package to use different thunks
to materialize the pc into different registers. We use the
registers that regalloc chose so that SSA can still allocate
the full set of registers.
Change-Id: Ie095644f7164a026c62e95baf9d18a8bcaed0bba
Reviewed-on: https://go-review.googlesource.com/25442
Run-TryBot: Keith Randall <khr@golang.org>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: David Chase <drchase@google.com>
2016-08-03 13:00:49 -07:00
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// Generate little thunks that load the PC of the next instruction into a register.
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2020-05-15 18:35:05 -04:00
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thunks := make([]loader.Sym, 0, 7+len(ctxt.Textp))
|
[dev.ssa] cmd/compile: fix PIC for SSA-generated code
Access to globals requires a 2-instruction sequence on PIC 386.
MOVL foo(SB), AX
is translated by the obj package into:
CALL getPCofNextInstructionInTempRegister(SB)
MOVL (&foo-&thisInstruction)(tmpReg), AX
The call returns the PC of the next instruction in a register.
The next instruction then offsets from that register to get the
address required. The tricky part is the allocation of the
temp register. The legacy compiler always used CX, and forbid
the register allocator from allocating CX when in PIC mode.
We can't easily do that in SSA because CX is actually a required
register for shift instructions. (I think the old backend got away
with this because the register allocator never uses CX, only
codegen knows that shifts must use CX.)
Instead, we allow the temp register to be anything. When the
destination of the MOV (or LEA) is an integer register, we can
use that register. Otherwise, we make sure to compile the
operation using an LEA to reference the global. So
MOVL AX, foo(SB)
is never generated directly. Instead, SSA generates:
LEAL foo(SB), DX
MOVL AX, (DX)
which is then rewritten by the obj package to:
CALL getPcInDX(SB)
LEAL (&foo-&thisInstruction)(DX), AX
MOVL AX, (DX)
So this CL modifies the obj package to use different thunks
to materialize the pc into different registers. We use the
registers that regalloc chose so that SSA can still allocate
the full set of registers.
Change-Id: Ie095644f7164a026c62e95baf9d18a8bcaed0bba
Reviewed-on: https://go-review.googlesource.com/25442
Run-TryBot: Keith Randall <khr@golang.org>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: David Chase <drchase@google.com>
2016-08-03 13:00:49 -07:00
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for _, r := range [...]struct {
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name string
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num uint8
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}{
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{"ax", 0},
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{"cx", 1},
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{"dx", 2},
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{"bx", 3},
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// sp
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{"bp", 5},
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{"si", 6},
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{"di", 7},
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} {
|
2020-04-01 13:42:20 -04:00
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thunkfunc := ldr.CreateSymForUpdate("__x86.get_pc_thunk."+r.name, 0)
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thunkfunc.SetType(sym.STEXT)
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ldr.SetAttrLocal(thunkfunc.Sym(), true)
|
[dev.ssa] cmd/compile: fix PIC for SSA-generated code
Access to globals requires a 2-instruction sequence on PIC 386.
MOVL foo(SB), AX
is translated by the obj package into:
CALL getPCofNextInstructionInTempRegister(SB)
MOVL (&foo-&thisInstruction)(tmpReg), AX
The call returns the PC of the next instruction in a register.
The next instruction then offsets from that register to get the
address required. The tricky part is the allocation of the
temp register. The legacy compiler always used CX, and forbid
the register allocator from allocating CX when in PIC mode.
We can't easily do that in SSA because CX is actually a required
register for shift instructions. (I think the old backend got away
with this because the register allocator never uses CX, only
codegen knows that shifts must use CX.)
Instead, we allow the temp register to be anything. When the
destination of the MOV (or LEA) is an integer register, we can
use that register. Otherwise, we make sure to compile the
operation using an LEA to reference the global. So
MOVL AX, foo(SB)
is never generated directly. Instead, SSA generates:
LEAL foo(SB), DX
MOVL AX, (DX)
which is then rewritten by the obj package to:
CALL getPcInDX(SB)
LEAL (&foo-&thisInstruction)(DX), AX
MOVL AX, (DX)
So this CL modifies the obj package to use different thunks
to materialize the pc into different registers. We use the
registers that regalloc chose so that SSA can still allocate
the full set of registers.
Change-Id: Ie095644f7164a026c62e95baf9d18a8bcaed0bba
Reviewed-on: https://go-review.googlesource.com/25442
Run-TryBot: Keith Randall <khr@golang.org>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: David Chase <drchase@google.com>
2016-08-03 13:00:49 -07:00
|
|
|
o := func(op ...uint8) {
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|
for _, op1 := range op {
|
2017-09-30 15:06:44 +00:00
|
|
|
thunkfunc.AddUint8(op1)
|
[dev.ssa] cmd/compile: fix PIC for SSA-generated code
Access to globals requires a 2-instruction sequence on PIC 386.
MOVL foo(SB), AX
is translated by the obj package into:
CALL getPCofNextInstructionInTempRegister(SB)
MOVL (&foo-&thisInstruction)(tmpReg), AX
The call returns the PC of the next instruction in a register.
The next instruction then offsets from that register to get the
address required. The tricky part is the allocation of the
temp register. The legacy compiler always used CX, and forbid
the register allocator from allocating CX when in PIC mode.
We can't easily do that in SSA because CX is actually a required
register for shift instructions. (I think the old backend got away
with this because the register allocator never uses CX, only
codegen knows that shifts must use CX.)
Instead, we allow the temp register to be anything. When the
destination of the MOV (or LEA) is an integer register, we can
use that register. Otherwise, we make sure to compile the
operation using an LEA to reference the global. So
MOVL AX, foo(SB)
is never generated directly. Instead, SSA generates:
LEAL foo(SB), DX
MOVL AX, (DX)
which is then rewritten by the obj package to:
CALL getPcInDX(SB)
LEAL (&foo-&thisInstruction)(DX), AX
MOVL AX, (DX)
So this CL modifies the obj package to use different thunks
to materialize the pc into different registers. We use the
registers that regalloc chose so that SSA can still allocate
the full set of registers.
Change-Id: Ie095644f7164a026c62e95baf9d18a8bcaed0bba
Reviewed-on: https://go-review.googlesource.com/25442
Run-TryBot: Keith Randall <khr@golang.org>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: David Chase <drchase@google.com>
2016-08-03 13:00:49 -07:00
|
|
|
}
|
2015-10-28 11:40:22 +13:00
|
|
|
}
|
[dev.ssa] cmd/compile: fix PIC for SSA-generated code
Access to globals requires a 2-instruction sequence on PIC 386.
MOVL foo(SB), AX
is translated by the obj package into:
CALL getPCofNextInstructionInTempRegister(SB)
MOVL (&foo-&thisInstruction)(tmpReg), AX
The call returns the PC of the next instruction in a register.
The next instruction then offsets from that register to get the
address required. The tricky part is the allocation of the
temp register. The legacy compiler always used CX, and forbid
the register allocator from allocating CX when in PIC mode.
We can't easily do that in SSA because CX is actually a required
register for shift instructions. (I think the old backend got away
with this because the register allocator never uses CX, only
codegen knows that shifts must use CX.)
Instead, we allow the temp register to be anything. When the
destination of the MOV (or LEA) is an integer register, we can
use that register. Otherwise, we make sure to compile the
operation using an LEA to reference the global. So
MOVL AX, foo(SB)
is never generated directly. Instead, SSA generates:
LEAL foo(SB), DX
MOVL AX, (DX)
which is then rewritten by the obj package to:
CALL getPcInDX(SB)
LEAL (&foo-&thisInstruction)(DX), AX
MOVL AX, (DX)
So this CL modifies the obj package to use different thunks
to materialize the pc into different registers. We use the
registers that regalloc chose so that SSA can still allocate
the full set of registers.
Change-Id: Ie095644f7164a026c62e95baf9d18a8bcaed0bba
Reviewed-on: https://go-review.googlesource.com/25442
Run-TryBot: Keith Randall <khr@golang.org>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: David Chase <drchase@google.com>
2016-08-03 13:00:49 -07:00
|
|
|
// 8b 04 24 mov (%esp),%eax
|
|
|
|
|
// Destination register is in bits 3-5 of the middle byte, so add that in.
|
|
|
|
|
o(0x8b, 0x04+r.num<<3, 0x24)
|
|
|
|
|
// c3 ret
|
|
|
|
|
o(0xc3)
|
2015-10-28 11:40:22 +13:00
|
|
|
|
2020-04-01 13:42:20 -04:00
|
|
|
thunks = append(thunks, thunkfunc.Sym())
|
[dev.ssa] cmd/compile: fix PIC for SSA-generated code
Access to globals requires a 2-instruction sequence on PIC 386.
MOVL foo(SB), AX
is translated by the obj package into:
CALL getPCofNextInstructionInTempRegister(SB)
MOVL (&foo-&thisInstruction)(tmpReg), AX
The call returns the PC of the next instruction in a register.
The next instruction then offsets from that register to get the
address required. The tricky part is the allocation of the
temp register. The legacy compiler always used CX, and forbid
the register allocator from allocating CX when in PIC mode.
We can't easily do that in SSA because CX is actually a required
register for shift instructions. (I think the old backend got away
with this because the register allocator never uses CX, only
codegen knows that shifts must use CX.)
Instead, we allow the temp register to be anything. When the
destination of the MOV (or LEA) is an integer register, we can
use that register. Otherwise, we make sure to compile the
operation using an LEA to reference the global. So
MOVL AX, foo(SB)
is never generated directly. Instead, SSA generates:
LEAL foo(SB), DX
MOVL AX, (DX)
which is then rewritten by the obj package to:
CALL getPcInDX(SB)
LEAL (&foo-&thisInstruction)(DX), AX
MOVL AX, (DX)
So this CL modifies the obj package to use different thunks
to materialize the pc into different registers. We use the
registers that regalloc chose so that SSA can still allocate
the full set of registers.
Change-Id: Ie095644f7164a026c62e95baf9d18a8bcaed0bba
Reviewed-on: https://go-review.googlesource.com/25442
Run-TryBot: Keith Randall <khr@golang.org>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: David Chase <drchase@google.com>
2016-08-03 13:00:49 -07:00
|
|
|
}
|
2020-05-15 18:35:05 -04:00
|
|
|
ctxt.Textp = append(thunks, ctxt.Textp...) // keep Textp in dependency order
|
2015-10-28 12:15:43 +13:00
|
|
|
|
2020-04-01 13:42:20 -04:00
|
|
|
initfunc, addmoduledata := ld.PrepareAddmoduledata(ctxt)
|
|
|
|
|
if initfunc == nil {
|
2015-10-28 12:15:43 +13:00
|
|
|
return
|
|
|
|
|
}
|
|
|
|
|
|
[dev.ssa] cmd/compile: fix PIC for SSA-generated code
Access to globals requires a 2-instruction sequence on PIC 386.
MOVL foo(SB), AX
is translated by the obj package into:
CALL getPCofNextInstructionInTempRegister(SB)
MOVL (&foo-&thisInstruction)(tmpReg), AX
The call returns the PC of the next instruction in a register.
The next instruction then offsets from that register to get the
address required. The tricky part is the allocation of the
temp register. The legacy compiler always used CX, and forbid
the register allocator from allocating CX when in PIC mode.
We can't easily do that in SSA because CX is actually a required
register for shift instructions. (I think the old backend got away
with this because the register allocator never uses CX, only
codegen knows that shifts must use CX.)
Instead, we allow the temp register to be anything. When the
destination of the MOV (or LEA) is an integer register, we can
use that register. Otherwise, we make sure to compile the
operation using an LEA to reference the global. So
MOVL AX, foo(SB)
is never generated directly. Instead, SSA generates:
LEAL foo(SB), DX
MOVL AX, (DX)
which is then rewritten by the obj package to:
CALL getPcInDX(SB)
LEAL (&foo-&thisInstruction)(DX), AX
MOVL AX, (DX)
So this CL modifies the obj package to use different thunks
to materialize the pc into different registers. We use the
registers that regalloc chose so that SSA can still allocate
the full set of registers.
Change-Id: Ie095644f7164a026c62e95baf9d18a8bcaed0bba
Reviewed-on: https://go-review.googlesource.com/25442
Run-TryBot: Keith Randall <khr@golang.org>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: David Chase <drchase@google.com>
2016-08-03 13:00:49 -07:00
|
|
|
o := func(op ...uint8) {
|
2015-10-28 12:15:43 +13:00
|
|
|
for _, op1 := range op {
|
2017-09-30 15:06:44 +00:00
|
|
|
initfunc.AddUint8(op1)
|
2015-10-28 12:15:43 +13:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// go.link.addmoduledata:
|
|
|
|
|
// 53 push %ebx
|
|
|
|
|
// e8 00 00 00 00 call __x86.get_pc_thunk.cx + R_CALL __x86.get_pc_thunk.cx
|
2016-08-21 13:52:23 -04:00
|
|
|
// 8d 81 00 00 00 00 lea 0x0(%ecx), %eax + R_PCREL ctxt.Moduledata
|
2015-10-28 12:15:43 +13:00
|
|
|
// 8d 99 00 00 00 00 lea 0x0(%ecx), %ebx + R_GOTPC _GLOBAL_OFFSET_TABLE_
|
|
|
|
|
// e8 00 00 00 00 call runtime.addmoduledata@plt + R_CALL runtime.addmoduledata
|
|
|
|
|
// 5b pop %ebx
|
|
|
|
|
// c3 ret
|
|
|
|
|
|
|
|
|
|
o(0x53)
|
|
|
|
|
|
|
|
|
|
o(0xe8)
|
2020-04-01 13:42:20 -04:00
|
|
|
initfunc.AddSymRef(ctxt.Arch, ldr.Lookup("__x86.get_pc_thunk.cx", 0), 0, objabi.R_CALL, 4)
|
2015-10-28 12:15:43 +13:00
|
|
|
|
|
|
|
|
o(0x8d, 0x81)
|
2020-05-15 18:35:05 -04:00
|
|
|
initfunc.AddPCRelPlus(ctxt.Arch, ctxt.Moduledata, 6)
|
2015-10-28 12:15:43 +13:00
|
|
|
|
|
|
|
|
o(0x8d, 0x99)
|
2020-04-01 13:42:20 -04:00
|
|
|
gotsym := ldr.LookupOrCreateSym("_GLOBAL_OFFSET_TABLE_", 0)
|
|
|
|
|
initfunc.AddSymRef(ctxt.Arch, gotsym, 12, objabi.R_PCREL, 4)
|
2015-10-28 12:15:43 +13:00
|
|
|
o(0xe8)
|
2020-04-01 13:42:20 -04:00
|
|
|
initfunc.AddSymRef(ctxt.Arch, addmoduledata, 0, objabi.R_CALL, 4)
|
2015-10-28 12:15:43 +13:00
|
|
|
|
|
|
|
|
o(0x5b)
|
|
|
|
|
|
|
|
|
|
o(0xc3)
|
2015-02-27 22:57:28 -05:00
|
|
|
}
|
|
|
|
|
|
2020-05-12 17:18:05 -04:00
|
|
|
func adddynrel(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, s loader.Sym, r loader.Reloc2, rIdx int) bool {
|
2020-04-23 20:54:04 -04:00
|
|
|
targ := r.Sym()
|
|
|
|
|
var targType sym.SymKind
|
|
|
|
|
if targ != 0 {
|
|
|
|
|
targType = ldr.SymType(targ)
|
|
|
|
|
}
|
2015-02-27 22:57:28 -05:00
|
|
|
|
2020-04-23 20:54:04 -04:00
|
|
|
switch r.Type() {
|
2015-02-27 22:57:28 -05:00
|
|
|
default:
|
2020-04-23 20:54:04 -04:00
|
|
|
if r.Type() >= objabi.ElfRelocOffset {
|
|
|
|
|
ldr.Errorf(s, "unexpected relocation type %d (%s)", r.Type(), sym.RelocName(target.Arch, r.Type()))
|
2016-09-05 23:49:53 -04:00
|
|
|
return false
|
2015-02-27 22:57:28 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Handle relocations found in ELF object files.
|
2019-04-16 02:49:09 +00:00
|
|
|
case objabi.ElfRelocOffset + objabi.RelocType(elf.R_386_PC32):
|
2020-04-23 20:54:04 -04:00
|
|
|
if targType == sym.SDYNIMPORT {
|
|
|
|
|
ldr.Errorf(s, "unexpected R_386_PC32 relocation for dynamic symbol %s", ldr.SymName(targ))
|
2015-02-27 22:57:28 -05:00
|
|
|
}
|
2017-04-28 12:43:06 +12:00
|
|
|
// TODO(mwhudson): the test of VisibilityHidden here probably doesn't make
|
|
|
|
|
// sense and should be removed when someone has thought about it properly.
|
2020-04-23 20:54:04 -04:00
|
|
|
if (targType == 0 || targType == sym.SXREF) && !ldr.AttrVisibilityHidden(targ) {
|
|
|
|
|
ldr.Errorf(s, "unknown symbol %s in pcrel", ldr.SymName(targ))
|
2015-02-27 22:57:28 -05:00
|
|
|
}
|
2020-04-23 20:54:04 -04:00
|
|
|
su := ldr.MakeSymbolUpdater(s)
|
|
|
|
|
su.SetRelocType(rIdx, objabi.R_PCREL)
|
|
|
|
|
su.SetRelocAdd(rIdx, r.Add()+4)
|
2016-09-05 23:49:53 -04:00
|
|
|
return true
|
2015-02-27 22:57:28 -05:00
|
|
|
|
2019-04-16 02:49:09 +00:00
|
|
|
case objabi.ElfRelocOffset + objabi.RelocType(elf.R_386_PLT32):
|
2020-04-23 20:54:04 -04:00
|
|
|
su := ldr.MakeSymbolUpdater(s)
|
|
|
|
|
su.SetRelocType(rIdx, objabi.R_PCREL)
|
|
|
|
|
su.SetRelocAdd(rIdx, r.Add()+4)
|
|
|
|
|
if targType == sym.SDYNIMPORT {
|
2020-05-15 18:35:05 -04:00
|
|
|
addpltsym(target, ldr, syms, targ)
|
|
|
|
|
su.SetRelocSym(rIdx, syms.PLT)
|
2020-04-23 20:54:04 -04:00
|
|
|
su.SetRelocAdd(rIdx, r.Add()+int64(ldr.SymPlt(targ)))
|
2015-02-27 22:57:28 -05:00
|
|
|
}
|
|
|
|
|
|
2016-09-05 23:49:53 -04:00
|
|
|
return true
|
2015-02-27 22:57:28 -05:00
|
|
|
|
2019-04-16 02:49:09 +00:00
|
|
|
case objabi.ElfRelocOffset + objabi.RelocType(elf.R_386_GOT32),
|
|
|
|
|
objabi.ElfRelocOffset + objabi.RelocType(elf.R_386_GOT32X):
|
2020-04-23 20:54:04 -04:00
|
|
|
su := ldr.MakeSymbolUpdater(s)
|
|
|
|
|
if targType != sym.SDYNIMPORT {
|
2015-02-27 22:57:28 -05:00
|
|
|
// have symbol
|
2020-04-23 20:54:04 -04:00
|
|
|
sData := ldr.Data(s)
|
2015-02-27 22:57:28 -05:00
|
|
|
|
2020-04-23 20:54:04 -04:00
|
|
|
if r.Off() >= 2 && sData[r.Off()-2] == 0x8b {
|
|
|
|
|
su.MakeWritable()
|
|
|
|
|
|
|
|
|
|
// turn MOVL of GOT entry into LEAL of symbol address, relative to GOT.
|
|
|
|
|
writeableData := su.Data()
|
|
|
|
|
writeableData[r.Off()-2] = 0x8d
|
|
|
|
|
su.SetRelocType(rIdx, objabi.R_GOTOFF)
|
2016-09-05 23:49:53 -04:00
|
|
|
return true
|
2015-02-27 22:57:28 -05:00
|
|
|
}
|
|
|
|
|
|
2020-04-23 20:54:04 -04:00
|
|
|
if r.Off() >= 2 && sData[r.Off()-2] == 0xff && sData[r.Off()-1] == 0xb3 {
|
|
|
|
|
su.MakeWritable()
|
2015-02-27 22:57:28 -05:00
|
|
|
// turn PUSHL of GOT entry into PUSHL of symbol itself.
|
|
|
|
|
// use unnecessary SS prefix to keep instruction same length.
|
2020-04-23 20:54:04 -04:00
|
|
|
writeableData := su.Data()
|
|
|
|
|
writeableData[r.Off()-2] = 0x36
|
|
|
|
|
writeableData[r.Off()-1] = 0x68
|
|
|
|
|
su.SetRelocType(rIdx, objabi.R_ADDR)
|
2016-09-05 23:49:53 -04:00
|
|
|
return true
|
2015-02-27 22:57:28 -05:00
|
|
|
}
|
|
|
|
|
|
2020-04-23 20:54:04 -04:00
|
|
|
ldr.Errorf(s, "unexpected GOT reloc for non-dynamic symbol %s", ldr.SymName(targ))
|
2016-09-05 23:49:53 -04:00
|
|
|
return false
|
2015-02-27 22:57:28 -05:00
|
|
|
}
|
|
|
|
|
|
2020-05-26 13:40:12 -04:00
|
|
|
ld.AddGotSym(target, ldr, syms, targ, uint32(elf.R_386_GLOB_DAT))
|
2020-04-23 20:54:04 -04:00
|
|
|
su.SetRelocType(rIdx, objabi.R_CONST) // write r->add during relocsym
|
|
|
|
|
su.SetRelocSym(rIdx, 0)
|
|
|
|
|
su.SetRelocAdd(rIdx, r.Add()+int64(ldr.SymGot(targ)))
|
2016-09-05 23:49:53 -04:00
|
|
|
return true
|
2015-02-27 22:57:28 -05:00
|
|
|
|
2019-04-16 02:49:09 +00:00
|
|
|
case objabi.ElfRelocOffset + objabi.RelocType(elf.R_386_GOTOFF):
|
2020-04-23 20:54:04 -04:00
|
|
|
su := ldr.MakeSymbolUpdater(s)
|
|
|
|
|
su.SetRelocType(rIdx, objabi.R_GOTOFF)
|
2016-09-05 23:49:53 -04:00
|
|
|
return true
|
2015-02-27 22:57:28 -05:00
|
|
|
|
2019-04-16 02:49:09 +00:00
|
|
|
case objabi.ElfRelocOffset + objabi.RelocType(elf.R_386_GOTPC):
|
2020-04-23 20:54:04 -04:00
|
|
|
su := ldr.MakeSymbolUpdater(s)
|
|
|
|
|
su.SetRelocType(rIdx, objabi.R_PCREL)
|
2020-05-15 18:35:05 -04:00
|
|
|
su.SetRelocSym(rIdx, syms.GOT)
|
2020-04-23 20:54:04 -04:00
|
|
|
su.SetRelocAdd(rIdx, r.Add()+4)
|
2016-09-05 23:49:53 -04:00
|
|
|
return true
|
2015-02-27 22:57:28 -05:00
|
|
|
|
2019-04-16 02:49:09 +00:00
|
|
|
case objabi.ElfRelocOffset + objabi.RelocType(elf.R_386_32):
|
2020-04-23 20:54:04 -04:00
|
|
|
if targType == sym.SDYNIMPORT {
|
|
|
|
|
ldr.Errorf(s, "unexpected R_386_32 relocation for dynamic symbol %s", ldr.SymName(targ))
|
2015-02-27 22:57:28 -05:00
|
|
|
}
|
2020-04-23 20:54:04 -04:00
|
|
|
su := ldr.MakeSymbolUpdater(s)
|
|
|
|
|
su.SetRelocType(rIdx, objabi.R_ADDR)
|
2016-09-05 23:49:53 -04:00
|
|
|
return true
|
2015-02-27 22:57:28 -05:00
|
|
|
|
2019-04-16 02:49:09 +00:00
|
|
|
case objabi.MachoRelocOffset + ld.MACHO_GENERIC_RELOC_VANILLA*2 + 0:
|
2020-04-23 20:54:04 -04:00
|
|
|
su := ldr.MakeSymbolUpdater(s)
|
|
|
|
|
su.SetRelocType(rIdx, objabi.R_ADDR)
|
|
|
|
|
if targType == sym.SDYNIMPORT {
|
|
|
|
|
ldr.Errorf(s, "unexpected reloc for dynamic symbol %s", ldr.SymName(targ))
|
2015-02-27 22:57:28 -05:00
|
|
|
}
|
2016-09-05 23:49:53 -04:00
|
|
|
return true
|
2015-02-27 22:57:28 -05:00
|
|
|
|
2019-04-16 02:49:09 +00:00
|
|
|
case objabi.MachoRelocOffset + ld.MACHO_GENERIC_RELOC_VANILLA*2 + 1:
|
2020-04-23 20:54:04 -04:00
|
|
|
su := ldr.MakeSymbolUpdater(s)
|
|
|
|
|
if targType == sym.SDYNIMPORT {
|
2020-05-15 18:35:05 -04:00
|
|
|
addpltsym(target, ldr, syms, targ)
|
|
|
|
|
su.SetRelocSym(rIdx, syms.PLT)
|
2020-04-23 20:54:04 -04:00
|
|
|
su.SetRelocAdd(rIdx, int64(ldr.SymPlt(targ)))
|
|
|
|
|
su.SetRelocType(rIdx, objabi.R_PCREL)
|
2016-09-05 23:49:53 -04:00
|
|
|
return true
|
2015-02-27 22:57:28 -05:00
|
|
|
}
|
|
|
|
|
|
2020-04-23 20:54:04 -04:00
|
|
|
su.SetRelocType(rIdx, objabi.R_PCREL)
|
2016-09-05 23:49:53 -04:00
|
|
|
return true
|
2015-02-27 22:57:28 -05:00
|
|
|
|
2019-04-16 02:49:09 +00:00
|
|
|
case objabi.MachoRelocOffset + ld.MACHO_FAKE_GOTPCREL:
|
2020-04-23 20:54:04 -04:00
|
|
|
su := ldr.MakeSymbolUpdater(s)
|
|
|
|
|
if targType != sym.SDYNIMPORT {
|
2015-02-27 22:57:28 -05:00
|
|
|
// have symbol
|
|
|
|
|
// turn MOVL of GOT entry into LEAL of symbol itself
|
2020-04-23 20:54:04 -04:00
|
|
|
sData := ldr.Data(s)
|
|
|
|
|
if r.Off() < 2 || sData[r.Off()-2] != 0x8b {
|
|
|
|
|
ldr.Errorf(s, "unexpected GOT reloc for non-dynamic symbol %s", ldr.SymName(targ))
|
2016-09-05 23:49:53 -04:00
|
|
|
return false
|
2015-02-27 22:57:28 -05:00
|
|
|
}
|
|
|
|
|
|
2020-04-23 20:54:04 -04:00
|
|
|
su.MakeWritable()
|
|
|
|
|
writeableData := su.Data()
|
|
|
|
|
writeableData[r.Off()-2] = 0x8d
|
|
|
|
|
su.SetRelocType(rIdx, objabi.R_PCREL)
|
2016-09-05 23:49:53 -04:00
|
|
|
return true
|
2015-02-27 22:57:28 -05:00
|
|
|
}
|
|
|
|
|
|
2020-05-26 13:40:12 -04:00
|
|
|
ld.AddGotSym(target, ldr, syms, targ, uint32(elf.R_386_GLOB_DAT))
|
2020-05-15 18:35:05 -04:00
|
|
|
su.SetRelocSym(rIdx, syms.GOT)
|
2020-04-23 20:54:04 -04:00
|
|
|
su.SetRelocAdd(rIdx, r.Add()+int64(ldr.SymGot(targ)))
|
|
|
|
|
su.SetRelocType(rIdx, objabi.R_PCREL)
|
2016-09-05 23:49:53 -04:00
|
|
|
return true
|
2015-02-27 22:57:28 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Handle references to ELF symbols from our own object files.
|
2020-04-23 20:54:04 -04:00
|
|
|
if targType != sym.SDYNIMPORT {
|
2016-09-05 23:49:53 -04:00
|
|
|
return true
|
2015-02-27 22:57:28 -05:00
|
|
|
}
|
2020-04-23 20:54:04 -04:00
|
|
|
|
|
|
|
|
// Reread the reloc to incorporate any changes in type above.
|
|
|
|
|
relocs := ldr.Relocs(s)
|
2020-04-30 01:32:48 -04:00
|
|
|
r = relocs.At2(rIdx)
|
2020-04-23 20:54:04 -04:00
|
|
|
|
|
|
|
|
switch r.Type() {
|
2017-04-18 12:53:25 -07:00
|
|
|
case objabi.R_CALL,
|
|
|
|
|
objabi.R_PCREL:
|
2020-03-04 17:25:01 -05:00
|
|
|
if target.IsExternal() {
|
2018-04-23 07:30:32 -07:00
|
|
|
// External linker will do this relocation.
|
|
|
|
|
return true
|
|
|
|
|
}
|
2020-05-15 18:35:05 -04:00
|
|
|
addpltsym(target, ldr, syms, targ)
|
2020-04-23 20:54:04 -04:00
|
|
|
su := ldr.MakeSymbolUpdater(s)
|
2020-05-15 18:35:05 -04:00
|
|
|
su.SetRelocSym(rIdx, syms.PLT)
|
2020-04-23 20:54:04 -04:00
|
|
|
su.SetRelocAdd(rIdx, int64(ldr.SymPlt(targ)))
|
2016-09-05 23:49:53 -04:00
|
|
|
return true
|
2015-02-27 22:57:28 -05:00
|
|
|
|
2017-04-18 12:53:25 -07:00
|
|
|
case objabi.R_ADDR:
|
2020-04-23 20:54:04 -04:00
|
|
|
if ldr.SymType(s) != sym.SDATA {
|
2015-02-27 22:57:28 -05:00
|
|
|
break
|
|
|
|
|
}
|
2020-03-04 17:25:01 -05:00
|
|
|
if target.IsElf() {
|
2020-05-15 18:35:05 -04:00
|
|
|
ld.Adddynsym(ldr, target, syms, targ)
|
|
|
|
|
rel := ldr.MakeSymbolUpdater(syms.Rel)
|
2020-04-23 20:54:04 -04:00
|
|
|
rel.AddAddrPlus(target.Arch, s, int64(r.Off()))
|
|
|
|
|
rel.AddUint32(target.Arch, ld.ELF32_R_INFO(uint32(ldr.SymDynid(targ)), uint32(elf.R_386_32)))
|
|
|
|
|
su := ldr.MakeSymbolUpdater(s)
|
|
|
|
|
su.SetRelocType(rIdx, objabi.R_CONST) // write r->add during relocsym
|
|
|
|
|
su.SetRelocSym(rIdx, 0)
|
2016-09-05 23:49:53 -04:00
|
|
|
return true
|
2015-02-27 22:57:28 -05:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2016-09-05 23:49:53 -04:00
|
|
|
return false
|
2015-02-27 22:57:28 -05:00
|
|
|
}
|
|
|
|
|
|
2020-07-28 21:35:53 -04:00
|
|
|
func elfreloc1(ctxt *ld.Link, out *ld.OutBuf, ldr *loader.Loader, s loader.Sym, r loader.ExtReloc, ri int, sectoff int64) bool {
|
2020-06-26 19:17:33 -04:00
|
|
|
out.Write32(uint32(sectoff))
|
2015-02-27 22:57:28 -05:00
|
|
|
|
2020-05-15 18:35:05 -04:00
|
|
|
elfsym := ld.ElfSymForReloc(ctxt, r.Xsym)
|
2020-07-28 21:35:53 -04:00
|
|
|
siz := r.Size
|
|
|
|
|
switch r.Type {
|
2015-02-27 22:57:28 -05:00
|
|
|
default:
|
2017-08-27 22:00:00 +09:00
|
|
|
return false
|
2020-04-29 22:00:28 -04:00
|
|
|
case objabi.R_ADDR, objabi.R_DWARFSECREF:
|
2020-05-11 16:00:13 -04:00
|
|
|
if siz == 4 {
|
2020-06-26 19:17:33 -04:00
|
|
|
out.Write32(uint32(elf.R_386_32) | uint32(elfsym)<<8)
|
2015-02-27 22:57:28 -05:00
|
|
|
} else {
|
2017-08-27 22:00:00 +09:00
|
|
|
return false
|
2015-02-27 22:57:28 -05:00
|
|
|
}
|
2017-04-18 12:53:25 -07:00
|
|
|
case objabi.R_GOTPCREL:
|
2020-05-11 16:00:13 -04:00
|
|
|
if siz == 4 {
|
2020-06-26 19:17:33 -04:00
|
|
|
out.Write32(uint32(elf.R_386_GOTPC))
|
2020-05-11 16:00:13 -04:00
|
|
|
if ldr.SymName(r.Xsym) != "_GLOBAL_OFFSET_TABLE_" {
|
2020-06-26 19:17:33 -04:00
|
|
|
out.Write32(uint32(sectoff))
|
|
|
|
|
out.Write32(uint32(elf.R_386_GOT32) | uint32(elfsym)<<8)
|
2015-11-18 12:30:23 +13:00
|
|
|
}
|
|
|
|
|
} else {
|
2017-08-27 22:00:00 +09:00
|
|
|
return false
|
2015-11-18 12:30:23 +13:00
|
|
|
}
|
2017-04-18 12:53:25 -07:00
|
|
|
case objabi.R_CALL:
|
2020-05-11 16:00:13 -04:00
|
|
|
if siz == 4 {
|
|
|
|
|
if ldr.SymType(r.Xsym) == sym.SDYNIMPORT {
|
2020-06-26 19:17:33 -04:00
|
|
|
out.Write32(uint32(elf.R_386_PLT32) | uint32(elfsym)<<8)
|
2015-11-18 12:30:23 +13:00
|
|
|
} else {
|
2020-06-26 19:17:33 -04:00
|
|
|
out.Write32(uint32(elf.R_386_PC32) | uint32(elfsym)<<8)
|
2015-11-18 12:30:23 +13:00
|
|
|
}
|
|
|
|
|
} else {
|
2017-08-27 22:00:00 +09:00
|
|
|
return false
|
2015-11-18 12:30:23 +13:00
|
|
|
}
|
2017-04-18 12:53:25 -07:00
|
|
|
case objabi.R_PCREL:
|
2020-05-11 16:00:13 -04:00
|
|
|
if siz == 4 {
|
2020-06-26 19:17:33 -04:00
|
|
|
out.Write32(uint32(elf.R_386_PC32) | uint32(elfsym)<<8)
|
2015-02-27 22:57:28 -05:00
|
|
|
} else {
|
2017-08-27 22:00:00 +09:00
|
|
|
return false
|
2015-02-27 22:57:28 -05:00
|
|
|
}
|
2017-04-18 12:53:25 -07:00
|
|
|
case objabi.R_TLS_LE:
|
2020-05-11 16:00:13 -04:00
|
|
|
if siz == 4 {
|
2020-06-26 19:17:33 -04:00
|
|
|
out.Write32(uint32(elf.R_386_TLS_LE) | uint32(elfsym)<<8)
|
2015-02-27 22:57:28 -05:00
|
|
|
} else {
|
2017-08-27 22:00:00 +09:00
|
|
|
return false
|
2015-02-27 22:57:28 -05:00
|
|
|
}
|
2017-04-18 12:53:25 -07:00
|
|
|
case objabi.R_TLS_IE:
|
2020-05-11 16:00:13 -04:00
|
|
|
if siz == 4 {
|
2020-06-26 19:17:33 -04:00
|
|
|
out.Write32(uint32(elf.R_386_GOTPC))
|
|
|
|
|
out.Write32(uint32(sectoff))
|
|
|
|
|
out.Write32(uint32(elf.R_386_TLS_GOTIE) | uint32(elfsym)<<8)
|
2015-10-28 11:40:22 +13:00
|
|
|
} else {
|
2017-08-27 22:00:00 +09:00
|
|
|
return false
|
2015-10-28 11:40:22 +13:00
|
|
|
}
|
2015-02-27 22:57:28 -05:00
|
|
|
}
|
|
|
|
|
|
2017-08-27 22:00:00 +09:00
|
|
|
return true
|
2015-02-27 22:57:28 -05:00
|
|
|
}
|
|
|
|
|
|
2020-07-28 21:35:53 -04:00
|
|
|
func machoreloc1(*sys.Arch, *ld.OutBuf, *loader.Loader, loader.Sym, loader.ExtReloc, int64) bool {
|
2020-04-22 00:00:03 -04:00
|
|
|
return false
|
2015-02-27 22:57:28 -05:00
|
|
|
}
|
|
|
|
|
|
2020-07-28 21:35:53 -04:00
|
|
|
func pereloc1(arch *sys.Arch, out *ld.OutBuf, ldr *loader.Loader, s loader.Sym, r loader.ExtReloc, sectoff int64) bool {
|
2015-03-09 03:05:40 -04:00
|
|
|
var v uint32
|
|
|
|
|
|
|
|
|
|
rs := r.Xsym
|
2020-07-28 21:35:53 -04:00
|
|
|
rt := r.Type
|
2015-03-09 03:05:40 -04:00
|
|
|
|
2020-05-07 22:22:54 -04:00
|
|
|
if ldr.SymDynid(rs) < 0 {
|
|
|
|
|
ldr.Errorf(s, "reloc %d (%s) to non-coff symbol %s type=%d (%s)", rt, sym.RelocName(arch, rt), ldr.SymName(rs), ldr.SymType(rs), ldr.SymType(rs))
|
2015-03-09 03:05:40 -04:00
|
|
|
return false
|
|
|
|
|
}
|
|
|
|
|
|
2017-10-01 02:37:20 +00:00
|
|
|
out.Write32(uint32(sectoff))
|
2020-05-07 22:22:54 -04:00
|
|
|
out.Write32(uint32(ldr.SymDynid(rs)))
|
2015-03-09 03:05:40 -04:00
|
|
|
|
2020-05-07 22:22:54 -04:00
|
|
|
switch rt {
|
2015-03-09 03:05:40 -04:00
|
|
|
default:
|
|
|
|
|
return false
|
|
|
|
|
|
2017-10-24 16:08:46 -04:00
|
|
|
case objabi.R_DWARFSECREF:
|
2017-02-08 12:30:30 +11:00
|
|
|
v = ld.IMAGE_REL_I386_SECREL
|
|
|
|
|
|
2017-04-18 12:53:25 -07:00
|
|
|
case objabi.R_ADDR:
|
2015-03-09 03:05:40 -04:00
|
|
|
v = ld.IMAGE_REL_I386_DIR32
|
|
|
|
|
|
2017-04-18 12:53:25 -07:00
|
|
|
case objabi.R_CALL,
|
|
|
|
|
objabi.R_PCREL:
|
2015-03-09 03:05:40 -04:00
|
|
|
v = ld.IMAGE_REL_I386_REL32
|
|
|
|
|
}
|
|
|
|
|
|
2017-10-01 02:37:20 +00:00
|
|
|
out.Write16(uint16(v))
|
2015-03-09 03:05:40 -04:00
|
|
|
|
|
|
|
|
return true
|
|
|
|
|
}
|
|
|
|
|
|
2020-07-24 01:33:15 -04:00
|
|
|
func archreloc(*ld.Target, *loader.Loader, *ld.ArchSyms, loader.Reloc2, loader.Sym, int64) (int64, int, bool) {
|
2020-07-04 18:14:08 -04:00
|
|
|
return -1, 0, false
|
2015-02-27 22:57:28 -05:00
|
|
|
}
|
|
|
|
|
|
2020-05-08 13:17:51 -04:00
|
|
|
func archrelocvariant(*ld.Target, *loader.Loader, loader.Reloc2, sym.RelocVariant, loader.Sym, int64) int64 {
|
2015-02-27 22:57:28 -05:00
|
|
|
log.Fatalf("unexpected relocation variant")
|
2020-05-08 13:17:51 -04:00
|
|
|
return -1
|
2015-02-27 22:57:28 -05:00
|
|
|
}
|
|
|
|
|
|
2020-03-11 12:12:41 -04:00
|
|
|
func elfsetupplt(ctxt *ld.Link, plt, got *loader.SymbolBuilder, dynamic loader.Sym) {
|
|
|
|
|
if plt.Size() == 0 {
|
2015-02-27 22:57:28 -05:00
|
|
|
// pushl got+4
|
2017-09-30 15:06:44 +00:00
|
|
|
plt.AddUint8(0xff)
|
2015-02-27 22:57:28 -05:00
|
|
|
|
2017-09-30 15:06:44 +00:00
|
|
|
plt.AddUint8(0x35)
|
2020-03-11 12:12:41 -04:00
|
|
|
plt.AddAddrPlus(ctxt.Arch, got.Sym(), 4)
|
2015-02-27 22:57:28 -05:00
|
|
|
|
|
|
|
|
// jmp *got+8
|
2017-09-30 15:06:44 +00:00
|
|
|
plt.AddUint8(0xff)
|
2015-02-27 22:57:28 -05:00
|
|
|
|
2017-09-30 15:06:44 +00:00
|
|
|
plt.AddUint8(0x25)
|
2020-03-11 12:12:41 -04:00
|
|
|
plt.AddAddrPlus(ctxt.Arch, got.Sym(), 8)
|
2015-02-27 22:57:28 -05:00
|
|
|
|
|
|
|
|
// zero pad
|
2017-09-30 15:06:44 +00:00
|
|
|
plt.AddUint32(ctxt.Arch, 0)
|
2015-02-27 22:57:28 -05:00
|
|
|
|
|
|
|
|
// assume got->size == 0 too
|
2020-03-11 12:12:41 -04:00
|
|
|
got.AddAddrPlus(ctxt.Arch, dynamic, 0)
|
2015-02-27 22:57:28 -05:00
|
|
|
|
2017-09-30 15:06:44 +00:00
|
|
|
got.AddUint32(ctxt.Arch, 0)
|
|
|
|
|
got.AddUint32(ctxt.Arch, 0)
|
2015-02-27 22:57:28 -05:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2020-05-15 18:35:05 -04:00
|
|
|
func addpltsym(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, s loader.Sym) {
|
2020-04-23 20:54:04 -04:00
|
|
|
if ldr.SymPlt(s) >= 0 {
|
2015-02-27 22:57:28 -05:00
|
|
|
return
|
|
|
|
|
}
|
|
|
|
|
|
2020-05-15 18:35:05 -04:00
|
|
|
ld.Adddynsym(ldr, target, syms, s)
|
2015-02-27 22:57:28 -05:00
|
|
|
|
2020-03-04 17:25:01 -05:00
|
|
|
if target.IsElf() {
|
2020-05-15 18:35:05 -04:00
|
|
|
plt := ldr.MakeSymbolUpdater(syms.PLT)
|
|
|
|
|
got := ldr.MakeSymbolUpdater(syms.GOTPLT)
|
|
|
|
|
rel := ldr.MakeSymbolUpdater(syms.RelPLT)
|
2020-04-23 20:54:04 -04:00
|
|
|
if plt.Size() == 0 {
|
2020-03-11 12:12:41 -04:00
|
|
|
panic("plt is not set up")
|
2015-02-27 22:57:28 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// jmpq *got+size
|
2017-09-30 15:06:44 +00:00
|
|
|
plt.AddUint8(0xff)
|
2015-02-27 22:57:28 -05:00
|
|
|
|
2017-09-30 15:06:44 +00:00
|
|
|
plt.AddUint8(0x25)
|
2020-04-23 20:54:04 -04:00
|
|
|
plt.AddAddrPlus(target.Arch, got.Sym(), got.Size())
|
2015-02-27 22:57:28 -05:00
|
|
|
|
|
|
|
|
// add to got: pointer to current pos in plt
|
2020-04-23 20:54:04 -04:00
|
|
|
got.AddAddrPlus(target.Arch, plt.Sym(), plt.Size())
|
2015-02-27 22:57:28 -05:00
|
|
|
|
|
|
|
|
// pushl $x
|
2017-09-30 15:06:44 +00:00
|
|
|
plt.AddUint8(0x68)
|
2015-02-27 22:57:28 -05:00
|
|
|
|
2020-04-23 20:54:04 -04:00
|
|
|
plt.AddUint32(target.Arch, uint32(rel.Size()))
|
2015-02-27 22:57:28 -05:00
|
|
|
|
|
|
|
|
// jmp .plt
|
2017-09-30 15:06:44 +00:00
|
|
|
plt.AddUint8(0xe9)
|
2015-02-27 22:57:28 -05:00
|
|
|
|
2020-04-23 20:54:04 -04:00
|
|
|
plt.AddUint32(target.Arch, uint32(-(plt.Size() + 4)))
|
2015-02-27 22:57:28 -05:00
|
|
|
|
|
|
|
|
// rel
|
2020-04-23 20:54:04 -04:00
|
|
|
rel.AddAddrPlus(target.Arch, got.Sym(), got.Size()-4)
|
2015-02-27 22:57:28 -05:00
|
|
|
|
2020-04-23 20:54:04 -04:00
|
|
|
sDynid := ldr.SymDynid(s)
|
|
|
|
|
rel.AddUint32(target.Arch, ld.ELF32_R_INFO(uint32(sDynid), uint32(elf.R_386_JMP_SLOT)))
|
2015-02-27 22:57:28 -05:00
|
|
|
|
2020-04-23 20:54:04 -04:00
|
|
|
ldr.SetPlt(s, int32(plt.Size()-16))
|
2015-02-27 22:57:28 -05:00
|
|
|
} else {
|
2020-04-23 20:54:04 -04:00
|
|
|
ldr.Errorf(s, "addpltsym: unsupported binary format")
|
2015-02-27 22:57:28 -05:00
|
|
|
}
|
|
|
|
|
}
|