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go/src/cmd/compile/internal/ssa/_gen/simdAMD64ops.go

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[dev.simd] cmd/compile: generated codes for amd64 SIMD This CL is generated by tool in CL 667155. Change-Id: I3829d0d2c96fe7000e2dd025a3006f96957d777a Reviewed-on: https://go-review.googlesource.com/c/go/+/675618 Reviewed-by: Junyang Shao <shaojunyang@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-05-22 19:59:12 +00:00
// Code generated by x/arch/internal/simdgen using 'go run . -xedPath $XED_PATH -o godefs -goroot $GOROOT go.yaml types.yaml categories.yaml'; DO NOT EDIT.
[dev.simd] cmd/compile: adapters for simd This combines several CLs into a single patch of "glue" for the generated SIMD extensions. This glue includes GOEXPERIMENT checks that disable the creation of user-visible "simd" types and that disable the registration of "simd" intrinsics. The simd type checks were changed to work for either package "simd" or "internal/simd" so that moving that package won't be quite so fragile. cmd/compile, internal/simd: glue for adding SIMD extensions to Go cmd/compile: theft of Cherry's sample SIMD compilation Change-Id: Id44e2f4bafe74032c26de576a8691b6f7d977e01 Reviewed-on: https://go-review.googlesource.com/c/go/+/675598 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-03-31 10:45:23 +11:00
package main
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
func simdAMD64Ops(v11, v21, v2k, vkv, v2kv, v2kk, v31, v3kv, vgpv, vgp, vfpv, vfpkv, w11, w21, w2k, wkw, w2kw, w2kk, w31, w3kw, wgpw, wgp, wfpw, wfpkw regInfo) []opData {
[dev.simd] cmd/compile: adapters for simd This combines several CLs into a single patch of "glue" for the generated SIMD extensions. This glue includes GOEXPERIMENT checks that disable the creation of user-visible "simd" types and that disable the registration of "simd" intrinsics. The simd type checks were changed to work for either package "simd" or "internal/simd" so that moving that package won't be quite so fragile. cmd/compile, internal/simd: glue for adding SIMD extensions to Go cmd/compile: theft of Cherry's sample SIMD compilation Change-Id: Id44e2f4bafe74032c26de576a8691b6f7d977e01 Reviewed-on: https://go-review.googlesource.com/c/go/+/675598 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-03-31 10:45:23 +11:00
return []opData{
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VADDPS512", argLength: 2, reg: w21, asm: "VADDPS", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VADDPSMasked512", argLength: 3, reg: w2kw, asm: "VADDPS", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VRCP14PS512", argLength: 1, reg: w11, asm: "VRCP14PS", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VRCP14PSMasked512", argLength: 2, reg: wkw, asm: "VRCP14PS", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VRSQRT14PS512", argLength: 1, reg: w11, asm: "VRSQRT14PS", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VRSQRT14PSMasked512", argLength: 2, reg: wkw, asm: "VRSQRT14PS", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VDIVPS512", argLength: 2, reg: w21, asm: "VDIVPS", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VDIVPSMasked512", argLength: 3, reg: w2kw, asm: "VDIVPS", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VFMADD213PS512", argLength: 3, reg: w31, asm: "VFMADD213PS", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VFMADD213PSMasked512", argLength: 4, reg: w3kw, asm: "VFMADD213PS", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VFMADDSUB213PS512", argLength: 3, reg: w31, asm: "VFMADDSUB213PS", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VFMADDSUB213PSMasked512", argLength: 4, reg: w3kw, asm: "VFMADDSUB213PS", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VFMSUBADD213PS512", argLength: 3, reg: w31, asm: "VFMSUBADD213PS", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VFMSUBADD213PSMasked512", argLength: 4, reg: w3kw, asm: "VFMSUBADD213PS", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VMAXPS512", argLength: 2, reg: w21, asm: "VMAXPS", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VMAXPSMasked512", argLength: 3, reg: w2kw, asm: "VMAXPS", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VMINPS512", argLength: 2, reg: w21, asm: "VMINPS", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VMINPSMasked512", argLength: 3, reg: w2kw, asm: "VMINPS", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VMULPS512", argLength: 2, reg: w21, asm: "VMULPS", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VSCALEFPS512", argLength: 2, reg: w21, asm: "VSCALEFPS", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VSCALEFPSMasked512", argLength: 3, reg: w2kw, asm: "VSCALEFPS", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VMULPSMasked512", argLength: 3, reg: w2kw, asm: "VMULPS", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VSQRTPS512", argLength: 1, reg: w11, asm: "VSQRTPS", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VSQRTPSMasked512", argLength: 2, reg: wkw, asm: "VSQRTPS", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VSUBPS512", argLength: 2, reg: w21, asm: "VSUBPS", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VSUBPSMasked512", argLength: 3, reg: w2kw, asm: "VSUBPS", commutative: false, typ: "Vec512", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VADDPS128", argLength: 2, reg: v21, asm: "VADDPS", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VADDPSMasked128", argLength: 3, reg: w2kw, asm: "VADDPS", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VADDSUBPS128", argLength: 2, reg: v21, asm: "VADDSUBPS", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VRCP14PS128", argLength: 1, reg: w11, asm: "VRCP14PS", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VRCP14PSMasked128", argLength: 2, reg: wkw, asm: "VRCP14PS", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VRSQRTPS128", argLength: 1, reg: v11, asm: "VRSQRTPS", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VRSQRT14PSMasked128", argLength: 2, reg: wkw, asm: "VRSQRT14PS", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VDIVPS128", argLength: 2, reg: v21, asm: "VDIVPS", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VDIVPSMasked128", argLength: 3, reg: w2kw, asm: "VDIVPS", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VFMADD213PS128", argLength: 3, reg: w31, asm: "VFMADD213PS", commutative: false, typ: "Vec128", resultInArg0: true},
{name: "VFMADD213PSMasked128", argLength: 4, reg: w3kw, asm: "VFMADD213PS", commutative: false, typ: "Vec128", resultInArg0: true},
{name: "VFMADDSUB213PS128", argLength: 3, reg: w31, asm: "VFMADDSUB213PS", commutative: false, typ: "Vec128", resultInArg0: true},
{name: "VFMADDSUB213PSMasked128", argLength: 4, reg: w3kw, asm: "VFMADDSUB213PS", commutative: false, typ: "Vec128", resultInArg0: true},
{name: "VFMSUBADD213PS128", argLength: 3, reg: w31, asm: "VFMSUBADD213PS", commutative: false, typ: "Vec128", resultInArg0: true},
{name: "VFMSUBADD213PSMasked128", argLength: 4, reg: w3kw, asm: "VFMSUBADD213PS", commutative: false, typ: "Vec128", resultInArg0: true},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VMAXPS128", argLength: 2, reg: v21, asm: "VMAXPS", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VMAXPSMasked128", argLength: 3, reg: w2kw, asm: "VMAXPS", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VMINPS128", argLength: 2, reg: v21, asm: "VMINPS", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VMINPSMasked128", argLength: 3, reg: w2kw, asm: "VMINPS", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VMULPS128", argLength: 2, reg: v21, asm: "VMULPS", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VSCALEFPS128", argLength: 2, reg: w21, asm: "VSCALEFPS", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VSCALEFPSMasked128", argLength: 3, reg: w2kw, asm: "VSCALEFPS", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VMULPSMasked128", argLength: 3, reg: w2kw, asm: "VMULPS", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VHADDPS128", argLength: 2, reg: v21, asm: "VHADDPS", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VHSUBPS128", argLength: 2, reg: v21, asm: "VHSUBPS", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VSQRTPS128", argLength: 1, reg: v11, asm: "VSQRTPS", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VSQRTPSMasked128", argLength: 2, reg: wkw, asm: "VSQRTPS", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VSUBPS128", argLength: 2, reg: v21, asm: "VSUBPS", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VSUBPSMasked128", argLength: 3, reg: w2kw, asm: "VSUBPS", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VADDPS256", argLength: 2, reg: v21, asm: "VADDPS", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VADDPSMasked256", argLength: 3, reg: w2kw, asm: "VADDPS", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VADDSUBPS256", argLength: 2, reg: v21, asm: "VADDSUBPS", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VRCP14PS256", argLength: 1, reg: w11, asm: "VRCP14PS", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VRCP14PSMasked256", argLength: 2, reg: wkw, asm: "VRCP14PS", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VRSQRTPS256", argLength: 1, reg: v11, asm: "VRSQRTPS", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VRSQRT14PSMasked256", argLength: 2, reg: wkw, asm: "VRSQRT14PS", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VDIVPS256", argLength: 2, reg: v21, asm: "VDIVPS", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VDIVPSMasked256", argLength: 3, reg: w2kw, asm: "VDIVPS", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VFMADD213PS256", argLength: 3, reg: w31, asm: "VFMADD213PS", commutative: false, typ: "Vec256", resultInArg0: true},
{name: "VFMADD213PSMasked256", argLength: 4, reg: w3kw, asm: "VFMADD213PS", commutative: false, typ: "Vec256", resultInArg0: true},
{name: "VFMADDSUB213PS256", argLength: 3, reg: w31, asm: "VFMADDSUB213PS", commutative: false, typ: "Vec256", resultInArg0: true},
{name: "VFMADDSUB213PSMasked256", argLength: 4, reg: w3kw, asm: "VFMADDSUB213PS", commutative: false, typ: "Vec256", resultInArg0: true},
{name: "VFMSUBADD213PS256", argLength: 3, reg: w31, asm: "VFMSUBADD213PS", commutative: false, typ: "Vec256", resultInArg0: true},
{name: "VFMSUBADD213PSMasked256", argLength: 4, reg: w3kw, asm: "VFMSUBADD213PS", commutative: false, typ: "Vec256", resultInArg0: true},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VMAXPS256", argLength: 2, reg: v21, asm: "VMAXPS", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VMAXPSMasked256", argLength: 3, reg: w2kw, asm: "VMAXPS", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VMINPS256", argLength: 2, reg: v21, asm: "VMINPS", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VMINPSMasked256", argLength: 3, reg: w2kw, asm: "VMINPS", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VMULPS256", argLength: 2, reg: v21, asm: "VMULPS", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VSCALEFPS256", argLength: 2, reg: w21, asm: "VSCALEFPS", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VSCALEFPSMasked256", argLength: 3, reg: w2kw, asm: "VSCALEFPS", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VMULPSMasked256", argLength: 3, reg: w2kw, asm: "VMULPS", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VHADDPS256", argLength: 2, reg: v21, asm: "VHADDPS", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VHSUBPS256", argLength: 2, reg: v21, asm: "VHSUBPS", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VSQRTPS256", argLength: 1, reg: v11, asm: "VSQRTPS", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VSQRTPSMasked256", argLength: 2, reg: wkw, asm: "VSQRTPS", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VSUBPS256", argLength: 2, reg: v21, asm: "VSUBPS", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VSUBPSMasked256", argLength: 3, reg: w2kw, asm: "VSUBPS", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VADDPD128", argLength: 2, reg: v21, asm: "VADDPD", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VADDPDMasked128", argLength: 3, reg: w2kw, asm: "VADDPD", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VADDSUBPD128", argLength: 2, reg: v21, asm: "VADDSUBPD", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VRCP14PD128", argLength: 1, reg: w11, asm: "VRCP14PD", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VRCP14PDMasked128", argLength: 2, reg: wkw, asm: "VRCP14PD", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VRSQRT14PD128", argLength: 1, reg: w11, asm: "VRSQRT14PD", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VRSQRT14PDMasked128", argLength: 2, reg: wkw, asm: "VRSQRT14PD", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VDIVPD128", argLength: 2, reg: v21, asm: "VDIVPD", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VDIVPDMasked128", argLength: 3, reg: w2kw, asm: "VDIVPD", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VFMADD213PD128", argLength: 3, reg: w31, asm: "VFMADD213PD", commutative: false, typ: "Vec128", resultInArg0: true},
{name: "VFMADD213PDMasked128", argLength: 4, reg: w3kw, asm: "VFMADD213PD", commutative: false, typ: "Vec128", resultInArg0: true},
{name: "VFMADDSUB213PD128", argLength: 3, reg: w31, asm: "VFMADDSUB213PD", commutative: false, typ: "Vec128", resultInArg0: true},
{name: "VFMADDSUB213PDMasked128", argLength: 4, reg: w3kw, asm: "VFMADDSUB213PD", commutative: false, typ: "Vec128", resultInArg0: true},
{name: "VFMSUBADD213PD128", argLength: 3, reg: w31, asm: "VFMSUBADD213PD", commutative: false, typ: "Vec128", resultInArg0: true},
{name: "VFMSUBADD213PDMasked128", argLength: 4, reg: w3kw, asm: "VFMSUBADD213PD", commutative: false, typ: "Vec128", resultInArg0: true},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VMAXPD128", argLength: 2, reg: v21, asm: "VMAXPD", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VMAXPDMasked128", argLength: 3, reg: w2kw, asm: "VMAXPD", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VMINPD128", argLength: 2, reg: v21, asm: "VMINPD", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VMINPDMasked128", argLength: 3, reg: w2kw, asm: "VMINPD", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VMULPD128", argLength: 2, reg: v21, asm: "VMULPD", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VSCALEFPD128", argLength: 2, reg: w21, asm: "VSCALEFPD", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VSCALEFPDMasked128", argLength: 3, reg: w2kw, asm: "VSCALEFPD", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VMULPDMasked128", argLength: 3, reg: w2kw, asm: "VMULPD", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VHADDPD128", argLength: 2, reg: v21, asm: "VHADDPD", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VHSUBPD128", argLength: 2, reg: v21, asm: "VHSUBPD", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VSQRTPD128", argLength: 1, reg: v11, asm: "VSQRTPD", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VSQRTPDMasked128", argLength: 2, reg: wkw, asm: "VSQRTPD", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VSUBPD128", argLength: 2, reg: v21, asm: "VSUBPD", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VSUBPDMasked128", argLength: 3, reg: w2kw, asm: "VSUBPD", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VADDPD256", argLength: 2, reg: v21, asm: "VADDPD", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VADDPDMasked256", argLength: 3, reg: w2kw, asm: "VADDPD", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VADDSUBPD256", argLength: 2, reg: v21, asm: "VADDSUBPD", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VRCP14PD256", argLength: 1, reg: w11, asm: "VRCP14PD", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VRCP14PDMasked256", argLength: 2, reg: wkw, asm: "VRCP14PD", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VRSQRT14PD256", argLength: 1, reg: w11, asm: "VRSQRT14PD", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VRSQRT14PDMasked256", argLength: 2, reg: wkw, asm: "VRSQRT14PD", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VDIVPD256", argLength: 2, reg: v21, asm: "VDIVPD", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VDIVPDMasked256", argLength: 3, reg: w2kw, asm: "VDIVPD", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VFMADD213PD256", argLength: 3, reg: w31, asm: "VFMADD213PD", commutative: false, typ: "Vec256", resultInArg0: true},
{name: "VFMADD213PDMasked256", argLength: 4, reg: w3kw, asm: "VFMADD213PD", commutative: false, typ: "Vec256", resultInArg0: true},
{name: "VFMADDSUB213PD256", argLength: 3, reg: w31, asm: "VFMADDSUB213PD", commutative: false, typ: "Vec256", resultInArg0: true},
{name: "VFMADDSUB213PDMasked256", argLength: 4, reg: w3kw, asm: "VFMADDSUB213PD", commutative: false, typ: "Vec256", resultInArg0: true},
{name: "VFMSUBADD213PD256", argLength: 3, reg: w31, asm: "VFMSUBADD213PD", commutative: false, typ: "Vec256", resultInArg0: true},
{name: "VFMSUBADD213PDMasked256", argLength: 4, reg: w3kw, asm: "VFMSUBADD213PD", commutative: false, typ: "Vec256", resultInArg0: true},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VMAXPD256", argLength: 2, reg: v21, asm: "VMAXPD", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VMAXPDMasked256", argLength: 3, reg: w2kw, asm: "VMAXPD", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VMINPD256", argLength: 2, reg: v21, asm: "VMINPD", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VMINPDMasked256", argLength: 3, reg: w2kw, asm: "VMINPD", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VMULPD256", argLength: 2, reg: v21, asm: "VMULPD", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VSCALEFPD256", argLength: 2, reg: w21, asm: "VSCALEFPD", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VSCALEFPDMasked256", argLength: 3, reg: w2kw, asm: "VSCALEFPD", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VMULPDMasked256", argLength: 3, reg: w2kw, asm: "VMULPD", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VHADDPD256", argLength: 2, reg: v21, asm: "VHADDPD", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VHSUBPD256", argLength: 2, reg: v21, asm: "VHSUBPD", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VSQRTPD256", argLength: 1, reg: v11, asm: "VSQRTPD", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VSQRTPDMasked256", argLength: 2, reg: wkw, asm: "VSQRTPD", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VSUBPD256", argLength: 2, reg: v21, asm: "VSUBPD", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VSUBPDMasked256", argLength: 3, reg: w2kw, asm: "VSUBPD", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VADDPD512", argLength: 2, reg: w21, asm: "VADDPD", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VADDPDMasked512", argLength: 3, reg: w2kw, asm: "VADDPD", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VRCP14PD512", argLength: 1, reg: w11, asm: "VRCP14PD", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VRCP14PDMasked512", argLength: 2, reg: wkw, asm: "VRCP14PD", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VRSQRT14PD512", argLength: 1, reg: w11, asm: "VRSQRT14PD", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VRSQRT14PDMasked512", argLength: 2, reg: wkw, asm: "VRSQRT14PD", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VDIVPD512", argLength: 2, reg: w21, asm: "VDIVPD", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VDIVPDMasked512", argLength: 3, reg: w2kw, asm: "VDIVPD", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VFMADD213PD512", argLength: 3, reg: w31, asm: "VFMADD213PD", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VFMADD213PDMasked512", argLength: 4, reg: w3kw, asm: "VFMADD213PD", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VFMADDSUB213PD512", argLength: 3, reg: w31, asm: "VFMADDSUB213PD", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VFMADDSUB213PDMasked512", argLength: 4, reg: w3kw, asm: "VFMADDSUB213PD", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VFMSUBADD213PD512", argLength: 3, reg: w31, asm: "VFMSUBADD213PD", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VFMSUBADD213PDMasked512", argLength: 4, reg: w3kw, asm: "VFMSUBADD213PD", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VMAXPD512", argLength: 2, reg: w21, asm: "VMAXPD", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VMAXPDMasked512", argLength: 3, reg: w2kw, asm: "VMAXPD", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VMINPD512", argLength: 2, reg: w21, asm: "VMINPD", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VMINPDMasked512", argLength: 3, reg: w2kw, asm: "VMINPD", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VMULPD512", argLength: 2, reg: w21, asm: "VMULPD", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VSCALEFPD512", argLength: 2, reg: w21, asm: "VSCALEFPD", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VSCALEFPDMasked512", argLength: 3, reg: w2kw, asm: "VSCALEFPD", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VMULPDMasked512", argLength: 3, reg: w2kw, asm: "VMULPD", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VSQRTPD512", argLength: 1, reg: w11, asm: "VSQRTPD", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VSQRTPDMasked512", argLength: 2, reg: wkw, asm: "VSQRTPD", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VSUBPD512", argLength: 2, reg: w21, asm: "VSUBPD", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VSUBPDMasked512", argLength: 3, reg: w2kw, asm: "VSUBPD", commutative: false, typ: "Vec512", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPABSW256", argLength: 1, reg: v11, asm: "VPABSW", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPABSWMasked256", argLength: 2, reg: wkw, asm: "VPABSW", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPADDW256", argLength: 2, reg: v21, asm: "VPADDW", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPADDWMasked256", argLength: 3, reg: w2kw, asm: "VPADDW", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPCMPEQW256", argLength: 2, reg: v21, asm: "VPCMPEQW", commutative: true, typ: "Vec256", resultInArg0: false},
{name: "VPCMPGTW256", argLength: 2, reg: v21, asm: "VPCMPGTW", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPMAXSW256", argLength: 2, reg: v21, asm: "VPMAXSW", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMAXSWMasked256", argLength: 3, reg: w2kw, asm: "VPMAXSW", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMINSW256", argLength: 2, reg: v21, asm: "VPMINSW", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMINSWMasked256", argLength: 3, reg: w2kw, asm: "VPMINSW", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMULHW256", argLength: 2, reg: v21, asm: "VPMULHW", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMULHWMasked256", argLength: 3, reg: w2kw, asm: "VPMULHW", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMULLW256", argLength: 2, reg: v21, asm: "VPMULLW", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMULLWMasked256", argLength: 3, reg: w2kw, asm: "VPMULLW", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMADDWD256", argLength: 2, reg: v21, asm: "VPMADDWD", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMADDWDMasked256", argLength: 3, reg: w2kw, asm: "VPMADDWD", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPHADDW256", argLength: 2, reg: v21, asm: "VPHADDW", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPHSUBW256", argLength: 2, reg: v21, asm: "VPHSUBW", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPOPCNTW256", argLength: 1, reg: w11, asm: "VPOPCNTW", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPOPCNTWMasked256", argLength: 2, reg: wkw, asm: "VPOPCNTW", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPADDSW256", argLength: 2, reg: v21, asm: "VPADDSW", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPADDSWMasked256", argLength: 3, reg: w2kw, asm: "VPADDSW", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPHADDSW256", argLength: 2, reg: v21, asm: "VPHADDSW", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPHSUBSW256", argLength: 2, reg: v21, asm: "VPHSUBSW", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPSUBSW256", argLength: 2, reg: v21, asm: "VPSUBSW", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSUBSWMasked256", argLength: 3, reg: w2kw, asm: "VPSUBSW", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPSLLW256", argLength: 2, reg: vfpv, asm: "VPSLLW", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPSRLW256", argLength: 2, reg: vfpv, asm: "VPSRLW", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPSRAW256", argLength: 2, reg: vfpv, asm: "VPSRAW", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSLLVW256", argLength: 2, reg: w21, asm: "VPSLLVW", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPSHLDVW256", argLength: 3, reg: w31, asm: "VPSHLDVW", commutative: false, typ: "Vec256", resultInArg0: true},
{name: "VPSHLDVWMasked256", argLength: 4, reg: w3kw, asm: "VPSHLDVW", commutative: false, typ: "Vec256", resultInArg0: true},
{name: "VPSLLVWMasked256", argLength: 3, reg: w2kw, asm: "VPSLLVW", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPSRLVW256", argLength: 2, reg: w21, asm: "VPSRLVW", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPSHRDVW256", argLength: 3, reg: w31, asm: "VPSHRDVW", commutative: false, typ: "Vec256", resultInArg0: true},
{name: "VPSHRDVWMasked256", argLength: 4, reg: w3kw, asm: "VPSHRDVW", commutative: false, typ: "Vec256", resultInArg0: true},
{name: "VPSRLVWMasked256", argLength: 3, reg: w2kw, asm: "VPSRLVW", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPSRAVW256", argLength: 2, reg: w21, asm: "VPSRAVW", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPSRAVWMasked256", argLength: 3, reg: w2kw, asm: "VPSRAVW", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPSIGNW256", argLength: 2, reg: v21, asm: "VPSIGNW", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPSUBW256", argLength: 2, reg: v21, asm: "VPSUBW", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSUBWMasked256", argLength: 3, reg: w2kw, asm: "VPSUBW", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPABSW512", argLength: 1, reg: w11, asm: "VPABSW", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPABSWMasked512", argLength: 2, reg: wkw, asm: "VPABSW", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPADDW512", argLength: 2, reg: w21, asm: "VPADDW", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPADDWMasked512", argLength: 3, reg: w2kw, asm: "VPADDW", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMAXSW512", argLength: 2, reg: w21, asm: "VPMAXSW", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMAXSWMasked512", argLength: 3, reg: w2kw, asm: "VPMAXSW", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMINSW512", argLength: 2, reg: w21, asm: "VPMINSW", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMINSWMasked512", argLength: 3, reg: w2kw, asm: "VPMINSW", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMULHW512", argLength: 2, reg: w21, asm: "VPMULHW", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMULHWMasked512", argLength: 3, reg: w2kw, asm: "VPMULHW", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMULLW512", argLength: 2, reg: w21, asm: "VPMULLW", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMULLWMasked512", argLength: 3, reg: w2kw, asm: "VPMULLW", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMADDWD512", argLength: 2, reg: w21, asm: "VPMADDWD", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPMADDWDMasked512", argLength: 3, reg: w2kw, asm: "VPMADDWD", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPOPCNTW512", argLength: 1, reg: w11, asm: "VPOPCNTW", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPOPCNTWMasked512", argLength: 2, reg: wkw, asm: "VPOPCNTW", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPADDSW512", argLength: 2, reg: w21, asm: "VPADDSW", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPADDSWMasked512", argLength: 3, reg: w2kw, asm: "VPADDSW", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPSUBSW512", argLength: 2, reg: w21, asm: "VPSUBSW", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSUBSWMasked512", argLength: 3, reg: w2kw, asm: "VPSUBSW", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSLLVW512", argLength: 2, reg: w21, asm: "VPSLLVW", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSHLDVW512", argLength: 3, reg: w31, asm: "VPSHLDVW", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VPSHLDVWMasked512", argLength: 4, reg: w3kw, asm: "VPSHLDVW", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VPSLLVWMasked512", argLength: 3, reg: w2kw, asm: "VPSLLVW", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSRLVW512", argLength: 2, reg: w21, asm: "VPSRLVW", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSHRDVW512", argLength: 3, reg: w31, asm: "VPSHRDVW", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VPSHRDVWMasked512", argLength: 4, reg: w3kw, asm: "VPSHRDVW", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VPSRLVWMasked512", argLength: 3, reg: w2kw, asm: "VPSRLVW", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSRAVW512", argLength: 2, reg: w21, asm: "VPSRAVW", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSRAVWMasked512", argLength: 3, reg: w2kw, asm: "VPSRAVW", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSUBW512", argLength: 2, reg: w21, asm: "VPSUBW", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSUBWMasked512", argLength: 3, reg: w2kw, asm: "VPSUBW", commutative: false, typ: "Vec512", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPABSW128", argLength: 1, reg: v11, asm: "VPABSW", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPABSWMasked128", argLength: 2, reg: wkw, asm: "VPABSW", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPADDW128", argLength: 2, reg: v21, asm: "VPADDW", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPADDWMasked128", argLength: 3, reg: w2kw, asm: "VPADDW", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPCMPEQW128", argLength: 2, reg: v21, asm: "VPCMPEQW", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VPCMPGTW128", argLength: 2, reg: v21, asm: "VPCMPGTW", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPMAXSW128", argLength: 2, reg: v21, asm: "VPMAXSW", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMAXSWMasked128", argLength: 3, reg: w2kw, asm: "VPMAXSW", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMINSW128", argLength: 2, reg: v21, asm: "VPMINSW", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMINSWMasked128", argLength: 3, reg: w2kw, asm: "VPMINSW", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMULHW128", argLength: 2, reg: v21, asm: "VPMULHW", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMULHWMasked128", argLength: 3, reg: w2kw, asm: "VPMULHW", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMULLW128", argLength: 2, reg: v21, asm: "VPMULLW", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMULLWMasked128", argLength: 3, reg: w2kw, asm: "VPMULLW", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMADDWD128", argLength: 2, reg: v21, asm: "VPMADDWD", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMADDWDMasked128", argLength: 3, reg: w2kw, asm: "VPMADDWD", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPHADDW128", argLength: 2, reg: v21, asm: "VPHADDW", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPHSUBW128", argLength: 2, reg: v21, asm: "VPHSUBW", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPOPCNTW128", argLength: 1, reg: w11, asm: "VPOPCNTW", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPOPCNTWMasked128", argLength: 2, reg: wkw, asm: "VPOPCNTW", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPADDSW128", argLength: 2, reg: v21, asm: "VPADDSW", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPADDSWMasked128", argLength: 3, reg: w2kw, asm: "VPADDSW", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPHADDSW128", argLength: 2, reg: v21, asm: "VPHADDSW", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPHSUBSW128", argLength: 2, reg: v21, asm: "VPHSUBSW", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPSUBSW128", argLength: 2, reg: v21, asm: "VPSUBSW", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSUBSWMasked128", argLength: 3, reg: w2kw, asm: "VPSUBSW", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPSLLW128", argLength: 2, reg: vfpv, asm: "VPSLLW", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPSRLW128", argLength: 2, reg: vfpv, asm: "VPSRLW", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPSRAW128", argLength: 2, reg: vfpv, asm: "VPSRAW", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSLLVW128", argLength: 2, reg: w21, asm: "VPSLLVW", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPSHLDVW128", argLength: 3, reg: w31, asm: "VPSHLDVW", commutative: false, typ: "Vec128", resultInArg0: true},
{name: "VPSHLDVWMasked128", argLength: 4, reg: w3kw, asm: "VPSHLDVW", commutative: false, typ: "Vec128", resultInArg0: true},
{name: "VPSLLVWMasked128", argLength: 3, reg: w2kw, asm: "VPSLLVW", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPSRLVW128", argLength: 2, reg: w21, asm: "VPSRLVW", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPSHRDVW128", argLength: 3, reg: w31, asm: "VPSHRDVW", commutative: false, typ: "Vec128", resultInArg0: true},
{name: "VPSHRDVWMasked128", argLength: 4, reg: w3kw, asm: "VPSHRDVW", commutative: false, typ: "Vec128", resultInArg0: true},
{name: "VPSRLVWMasked128", argLength: 3, reg: w2kw, asm: "VPSRLVW", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPSRAVW128", argLength: 2, reg: w21, asm: "VPSRAVW", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPSRAVWMasked128", argLength: 3, reg: w2kw, asm: "VPSRAVW", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPSIGNW128", argLength: 2, reg: v21, asm: "VPSIGNW", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPSUBW128", argLength: 2, reg: v21, asm: "VPSUBW", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSUBWMasked128", argLength: 3, reg: w2kw, asm: "VPSUBW", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPABSD512", argLength: 1, reg: w11, asm: "VPABSD", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPABSDMasked512", argLength: 2, reg: wkw, asm: "VPABSD", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPADDD512", argLength: 2, reg: w21, asm: "VPADDD", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPADDDMasked512", argLength: 3, reg: w2kw, asm: "VPADDD", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPANDD512", argLength: 2, reg: w21, asm: "VPANDD", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPANDDMasked512", argLength: 3, reg: w2kw, asm: "VPANDD", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPANDND512", argLength: 2, reg: w21, asm: "VPANDND", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPANDNDMasked512", argLength: 3, reg: w2kw, asm: "VPANDND", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPMAXSD512", argLength: 2, reg: w21, asm: "VPMAXSD", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMAXSDMasked512", argLength: 3, reg: w2kw, asm: "VPMAXSD", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMINSD512", argLength: 2, reg: w21, asm: "VPMINSD", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMINSDMasked512", argLength: 3, reg: w2kw, asm: "VPMINSD", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMULLD512", argLength: 2, reg: w21, asm: "VPMULLD", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMULLDMasked512", argLength: 3, reg: w2kw, asm: "VPMULLD", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPORD512", argLength: 2, reg: w21, asm: "VPORD", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPORDMasked512", argLength: 3, reg: w2kw, asm: "VPORD", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPDPWSSD512", argLength: 3, reg: w31, asm: "VPDPWSSD", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VPDPWSSDMasked512", argLength: 4, reg: w3kw, asm: "VPDPWSSD", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VPOPCNTD512", argLength: 1, reg: w11, asm: "VPOPCNTD", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPOPCNTDMasked512", argLength: 2, reg: wkw, asm: "VPOPCNTD", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPROLVD512", argLength: 2, reg: w21, asm: "VPROLVD", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPROLVDMasked512", argLength: 3, reg: w2kw, asm: "VPROLVD", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPRORVD512", argLength: 2, reg: w21, asm: "VPRORVD", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPRORVDMasked512", argLength: 3, reg: w2kw, asm: "VPRORVD", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPDPWSSDS512", argLength: 3, reg: w31, asm: "VPDPWSSDS", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VPDPWSSDSMasked512", argLength: 4, reg: w3kw, asm: "VPDPWSSDS", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VPDPBUSDS512", argLength: 3, reg: w31, asm: "VPDPBUSDS", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VPDPBUSDSMasked512", argLength: 4, reg: w3kw, asm: "VPDPBUSDS", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VPSLLVD512", argLength: 2, reg: w21, asm: "VPSLLVD", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSHLDVD512", argLength: 3, reg: w31, asm: "VPSHLDVD", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VPSHLDVDMasked512", argLength: 4, reg: w3kw, asm: "VPSHLDVD", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VPSLLVDMasked512", argLength: 3, reg: w2kw, asm: "VPSLLVD", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSRLVD512", argLength: 2, reg: w21, asm: "VPSRLVD", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSHRDVD512", argLength: 3, reg: w31, asm: "VPSHRDVD", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VPSHRDVDMasked512", argLength: 4, reg: w3kw, asm: "VPSHRDVD", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VPSRLVDMasked512", argLength: 3, reg: w2kw, asm: "VPSRLVD", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSRAVD512", argLength: 2, reg: w21, asm: "VPSRAVD", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSRAVDMasked512", argLength: 3, reg: w2kw, asm: "VPSRAVD", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSUBD512", argLength: 2, reg: w21, asm: "VPSUBD", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSUBDMasked512", argLength: 3, reg: w2kw, asm: "VPSUBD", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPDPBUSD512", argLength: 3, reg: w31, asm: "VPDPBUSD", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VPDPBUSDMasked512", argLength: 4, reg: w3kw, asm: "VPDPBUSD", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VPXORD512", argLength: 2, reg: w21, asm: "VPXORD", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPXORDMasked512", argLength: 3, reg: w2kw, asm: "VPXORD", commutative: true, typ: "Vec512", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPABSD128", argLength: 1, reg: v11, asm: "VPABSD", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPABSDMasked128", argLength: 2, reg: wkw, asm: "VPABSD", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPADDD128", argLength: 2, reg: v21, asm: "VPADDD", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPADDDMasked128", argLength: 3, reg: w2kw, asm: "VPADDD", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VPANDDMasked128", argLength: 3, reg: w2kw, asm: "VPANDD", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VPANDNDMasked128", argLength: 3, reg: w2kw, asm: "VPANDND", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPCMPEQD128", argLength: 2, reg: v21, asm: "VPCMPEQD", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VPCMPGTD128", argLength: 2, reg: v21, asm: "VPCMPGTD", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPMAXSD128", argLength: 2, reg: v21, asm: "VPMAXSD", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMAXSDMasked128", argLength: 3, reg: w2kw, asm: "VPMAXSD", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMINSD128", argLength: 2, reg: v21, asm: "VPMINSD", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMINSDMasked128", argLength: 3, reg: w2kw, asm: "VPMINSD", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMULDQ128", argLength: 2, reg: v21, asm: "VPMULDQ", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VPMULLD128", argLength: 2, reg: v21, asm: "VPMULLD", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMULLDMasked128", argLength: 3, reg: w2kw, asm: "VPMULLD", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VPORDMasked128", argLength: 3, reg: w2kw, asm: "VPORD", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPDPWSSD128", argLength: 3, reg: v31, asm: "VPDPWSSD", commutative: false, typ: "Vec128", resultInArg0: true},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPDPWSSDMasked128", argLength: 4, reg: w3kw, asm: "VPDPWSSD", commutative: false, typ: "Vec128", resultInArg0: true},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPHADDD128", argLength: 2, reg: v21, asm: "VPHADDD", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPHSUBD128", argLength: 2, reg: v21, asm: "VPHSUBD", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPOPCNTD128", argLength: 1, reg: w11, asm: "VPOPCNTD", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPOPCNTDMasked128", argLength: 2, reg: wkw, asm: "VPOPCNTD", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPROLVD128", argLength: 2, reg: w21, asm: "VPROLVD", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPROLVDMasked128", argLength: 3, reg: w2kw, asm: "VPROLVD", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPRORVD128", argLength: 2, reg: w21, asm: "VPRORVD", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPRORVDMasked128", argLength: 3, reg: w2kw, asm: "VPRORVD", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPDPWSSDS128", argLength: 3, reg: v31, asm: "VPDPWSSDS", commutative: false, typ: "Vec128", resultInArg0: true},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPDPWSSDSMasked128", argLength: 4, reg: w3kw, asm: "VPDPWSSDS", commutative: false, typ: "Vec128", resultInArg0: true},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPDPBUSDS128", argLength: 3, reg: v31, asm: "VPDPBUSDS", commutative: false, typ: "Vec128", resultInArg0: true},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPDPBUSDSMasked128", argLength: 4, reg: w3kw, asm: "VPDPBUSDS", commutative: false, typ: "Vec128", resultInArg0: true},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPSLLD128", argLength: 2, reg: vfpv, asm: "VPSLLD", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPSRLD128", argLength: 2, reg: vfpv, asm: "VPSRLD", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPSRAD128", argLength: 2, reg: vfpv, asm: "VPSRAD", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPSLLVD128", argLength: 2, reg: v21, asm: "VPSLLVD", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSHLDVD128", argLength: 3, reg: w31, asm: "VPSHLDVD", commutative: false, typ: "Vec128", resultInArg0: true},
{name: "VPSHLDVDMasked128", argLength: 4, reg: w3kw, asm: "VPSHLDVD", commutative: false, typ: "Vec128", resultInArg0: true},
{name: "VPSLLVDMasked128", argLength: 3, reg: w2kw, asm: "VPSLLVD", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPSRLVD128", argLength: 2, reg: v21, asm: "VPSRLVD", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSHRDVD128", argLength: 3, reg: w31, asm: "VPSHRDVD", commutative: false, typ: "Vec128", resultInArg0: true},
{name: "VPSHRDVDMasked128", argLength: 4, reg: w3kw, asm: "VPSHRDVD", commutative: false, typ: "Vec128", resultInArg0: true},
{name: "VPSRLVDMasked128", argLength: 3, reg: w2kw, asm: "VPSRLVD", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPSRAVD128", argLength: 2, reg: v21, asm: "VPSRAVD", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSRAVDMasked128", argLength: 3, reg: w2kw, asm: "VPSRAVD", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPSIGND128", argLength: 2, reg: v21, asm: "VPSIGND", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPSUBD128", argLength: 2, reg: v21, asm: "VPSUBD", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSUBDMasked128", argLength: 3, reg: w2kw, asm: "VPSUBD", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPDPBUSD128", argLength: 3, reg: v31, asm: "VPDPBUSD", commutative: false, typ: "Vec128", resultInArg0: true},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPDPBUSDMasked128", argLength: 4, reg: w3kw, asm: "VPDPBUSD", commutative: false, typ: "Vec128", resultInArg0: true},
{name: "VPXORDMasked128", argLength: 3, reg: w2kw, asm: "VPXORD", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPABSD256", argLength: 1, reg: v11, asm: "VPABSD", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPABSDMasked256", argLength: 2, reg: wkw, asm: "VPABSD", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPADDD256", argLength: 2, reg: v21, asm: "VPADDD", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPADDDMasked256", argLength: 3, reg: w2kw, asm: "VPADDD", commutative: true, typ: "Vec256", resultInArg0: false},
{name: "VPANDDMasked256", argLength: 3, reg: w2kw, asm: "VPANDD", commutative: true, typ: "Vec256", resultInArg0: false},
{name: "VPANDNDMasked256", argLength: 3, reg: w2kw, asm: "VPANDND", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPCMPEQD256", argLength: 2, reg: v21, asm: "VPCMPEQD", commutative: true, typ: "Vec256", resultInArg0: false},
{name: "VPCMPGTD256", argLength: 2, reg: v21, asm: "VPCMPGTD", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPMAXSD256", argLength: 2, reg: v21, asm: "VPMAXSD", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMAXSDMasked256", argLength: 3, reg: w2kw, asm: "VPMAXSD", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMINSD256", argLength: 2, reg: v21, asm: "VPMINSD", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMINSDMasked256", argLength: 3, reg: w2kw, asm: "VPMINSD", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMULDQ256", argLength: 2, reg: v21, asm: "VPMULDQ", commutative: true, typ: "Vec256", resultInArg0: false},
{name: "VPMULLD256", argLength: 2, reg: v21, asm: "VPMULLD", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMULLDMasked256", argLength: 3, reg: w2kw, asm: "VPMULLD", commutative: true, typ: "Vec256", resultInArg0: false},
{name: "VPORDMasked256", argLength: 3, reg: w2kw, asm: "VPORD", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPDPWSSD256", argLength: 3, reg: v31, asm: "VPDPWSSD", commutative: false, typ: "Vec256", resultInArg0: true},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPDPWSSDMasked256", argLength: 4, reg: w3kw, asm: "VPDPWSSD", commutative: false, typ: "Vec256", resultInArg0: true},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPHADDD256", argLength: 2, reg: v21, asm: "VPHADDD", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPHSUBD256", argLength: 2, reg: v21, asm: "VPHSUBD", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPOPCNTD256", argLength: 1, reg: w11, asm: "VPOPCNTD", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPOPCNTDMasked256", argLength: 2, reg: wkw, asm: "VPOPCNTD", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPROLVD256", argLength: 2, reg: w21, asm: "VPROLVD", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPROLVDMasked256", argLength: 3, reg: w2kw, asm: "VPROLVD", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPRORVD256", argLength: 2, reg: w21, asm: "VPRORVD", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPRORVDMasked256", argLength: 3, reg: w2kw, asm: "VPRORVD", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPDPWSSDS256", argLength: 3, reg: v31, asm: "VPDPWSSDS", commutative: false, typ: "Vec256", resultInArg0: true},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPDPWSSDSMasked256", argLength: 4, reg: w3kw, asm: "VPDPWSSDS", commutative: false, typ: "Vec256", resultInArg0: true},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPDPBUSDS256", argLength: 3, reg: v31, asm: "VPDPBUSDS", commutative: false, typ: "Vec256", resultInArg0: true},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPDPBUSDSMasked256", argLength: 4, reg: w3kw, asm: "VPDPBUSDS", commutative: false, typ: "Vec256", resultInArg0: true},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPSLLD256", argLength: 2, reg: vfpv, asm: "VPSLLD", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPSRLD256", argLength: 2, reg: vfpv, asm: "VPSRLD", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPSRAD256", argLength: 2, reg: vfpv, asm: "VPSRAD", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPSLLVD256", argLength: 2, reg: v21, asm: "VPSLLVD", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSHLDVD256", argLength: 3, reg: w31, asm: "VPSHLDVD", commutative: false, typ: "Vec256", resultInArg0: true},
{name: "VPSHLDVDMasked256", argLength: 4, reg: w3kw, asm: "VPSHLDVD", commutative: false, typ: "Vec256", resultInArg0: true},
{name: "VPSLLVDMasked256", argLength: 3, reg: w2kw, asm: "VPSLLVD", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPSRLVD256", argLength: 2, reg: v21, asm: "VPSRLVD", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSHRDVD256", argLength: 3, reg: w31, asm: "VPSHRDVD", commutative: false, typ: "Vec256", resultInArg0: true},
{name: "VPSHRDVDMasked256", argLength: 4, reg: w3kw, asm: "VPSHRDVD", commutative: false, typ: "Vec256", resultInArg0: true},
{name: "VPSRLVDMasked256", argLength: 3, reg: w2kw, asm: "VPSRLVD", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPSRAVD256", argLength: 2, reg: v21, asm: "VPSRAVD", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSRAVDMasked256", argLength: 3, reg: w2kw, asm: "VPSRAVD", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPSIGND256", argLength: 2, reg: v21, asm: "VPSIGND", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPSUBD256", argLength: 2, reg: v21, asm: "VPSUBD", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSUBDMasked256", argLength: 3, reg: w2kw, asm: "VPSUBD", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPDPBUSD256", argLength: 3, reg: v31, asm: "VPDPBUSD", commutative: false, typ: "Vec256", resultInArg0: true},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPDPBUSDMasked256", argLength: 4, reg: w3kw, asm: "VPDPBUSD", commutative: false, typ: "Vec256", resultInArg0: true},
{name: "VPXORDMasked256", argLength: 3, reg: w2kw, asm: "VPXORD", commutative: true, typ: "Vec256", resultInArg0: false},
{name: "VPABSQ128", argLength: 1, reg: w11, asm: "VPABSQ", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPABSQMasked128", argLength: 2, reg: wkw, asm: "VPABSQ", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPADDQ128", argLength: 2, reg: v21, asm: "VPADDQ", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPADDQMasked128", argLength: 3, reg: w2kw, asm: "VPADDQ", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VPANDQMasked128", argLength: 3, reg: w2kw, asm: "VPANDQ", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VPANDNQMasked128", argLength: 3, reg: w2kw, asm: "VPANDNQ", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPCMPEQQ128", argLength: 2, reg: v21, asm: "VPCMPEQQ", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile, simd: Int64x2 Greater and Uint* Equal This CL is generated by CL 686817. Change-Id: I19b8e468594514b2b1c99f8ad766f78b5e194c80 Reviewed-on: https://go-review.googlesource.com/c/go/+/686876 TryBot-Bypass: David Chase <drchase@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-09 16:24:34 +00:00
{name: "VPCMPGTQ128", argLength: 2, reg: v21, asm: "VPCMPGTQ", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMAXSQ128", argLength: 2, reg: w21, asm: "VPMAXSQ", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VPMAXSQMasked128", argLength: 3, reg: w2kw, asm: "VPMAXSQ", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VPMINSQ128", argLength: 2, reg: w21, asm: "VPMINSQ", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VPMINSQMasked128", argLength: 3, reg: w2kw, asm: "VPMINSQ", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VPMULDQMasked128", argLength: 3, reg: w2kw, asm: "VPMULDQ", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VPMULLQ128", argLength: 2, reg: w21, asm: "VPMULLQ", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VPMULLQMasked128", argLength: 3, reg: w2kw, asm: "VPMULLQ", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VPORQMasked128", argLength: 3, reg: w2kw, asm: "VPORQ", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VPOPCNTQ128", argLength: 1, reg: w11, asm: "VPOPCNTQ", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPOPCNTQMasked128", argLength: 2, reg: wkw, asm: "VPOPCNTQ", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPROLVQ128", argLength: 2, reg: w21, asm: "VPROLVQ", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPROLVQMasked128", argLength: 3, reg: w2kw, asm: "VPROLVQ", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPRORVQ128", argLength: 2, reg: w21, asm: "VPRORVQ", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPRORVQMasked128", argLength: 3, reg: w2kw, asm: "VPRORVQ", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPSLLQ128", argLength: 2, reg: vfpv, asm: "VPSLLQ", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSLLQMasked128", argLength: 3, reg: wfpkw, asm: "VPSLLQ", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPSRLQ128", argLength: 2, reg: vfpv, asm: "VPSRLQ", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSRLQMasked128", argLength: 3, reg: wfpkw, asm: "VPSRLQ", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPSRAQ128", argLength: 2, reg: wfpw, asm: "VPSRAQ", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPSRAQMasked128", argLength: 3, reg: wfpkw, asm: "VPSRAQ", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPSLLVQ128", argLength: 2, reg: v21, asm: "VPSLLVQ", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSHLDVQ128", argLength: 3, reg: w31, asm: "VPSHLDVQ", commutative: false, typ: "Vec128", resultInArg0: true},
{name: "VPSHLDVQMasked128", argLength: 4, reg: w3kw, asm: "VPSHLDVQ", commutative: false, typ: "Vec128", resultInArg0: true},
{name: "VPSLLVQMasked128", argLength: 3, reg: w2kw, asm: "VPSLLVQ", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPSRLVQ128", argLength: 2, reg: v21, asm: "VPSRLVQ", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSHRDVQ128", argLength: 3, reg: w31, asm: "VPSHRDVQ", commutative: false, typ: "Vec128", resultInArg0: true},
{name: "VPSHRDVQMasked128", argLength: 4, reg: w3kw, asm: "VPSHRDVQ", commutative: false, typ: "Vec128", resultInArg0: true},
{name: "VPSRLVQMasked128", argLength: 3, reg: w2kw, asm: "VPSRLVQ", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPSRAVQ128", argLength: 2, reg: w21, asm: "VPSRAVQ", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPSRAVQMasked128", argLength: 3, reg: w2kw, asm: "VPSRAVQ", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPSUBQ128", argLength: 2, reg: v21, asm: "VPSUBQ", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSUBQMasked128", argLength: 3, reg: w2kw, asm: "VPSUBQ", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPXORQMasked128", argLength: 3, reg: w2kw, asm: "VPXORQ", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VPABSQ256", argLength: 1, reg: w11, asm: "VPABSQ", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPABSQMasked256", argLength: 2, reg: wkw, asm: "VPABSQ", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPADDQ256", argLength: 2, reg: v21, asm: "VPADDQ", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPADDQMasked256", argLength: 3, reg: w2kw, asm: "VPADDQ", commutative: true, typ: "Vec256", resultInArg0: false},
{name: "VPANDQMasked256", argLength: 3, reg: w2kw, asm: "VPANDQ", commutative: true, typ: "Vec256", resultInArg0: false},
{name: "VPANDNQMasked256", argLength: 3, reg: w2kw, asm: "VPANDNQ", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPCMPEQQ256", argLength: 2, reg: v21, asm: "VPCMPEQQ", commutative: true, typ: "Vec256", resultInArg0: false},
{name: "VPCMPGTQ256", argLength: 2, reg: v21, asm: "VPCMPGTQ", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMAXSQ256", argLength: 2, reg: w21, asm: "VPMAXSQ", commutative: true, typ: "Vec256", resultInArg0: false},
{name: "VPMAXSQMasked256", argLength: 3, reg: w2kw, asm: "VPMAXSQ", commutative: true, typ: "Vec256", resultInArg0: false},
{name: "VPMINSQ256", argLength: 2, reg: w21, asm: "VPMINSQ", commutative: true, typ: "Vec256", resultInArg0: false},
{name: "VPMINSQMasked256", argLength: 3, reg: w2kw, asm: "VPMINSQ", commutative: true, typ: "Vec256", resultInArg0: false},
{name: "VPMULDQMasked256", argLength: 3, reg: w2kw, asm: "VPMULDQ", commutative: true, typ: "Vec256", resultInArg0: false},
{name: "VPMULLQ256", argLength: 2, reg: w21, asm: "VPMULLQ", commutative: true, typ: "Vec256", resultInArg0: false},
{name: "VPMULLQMasked256", argLength: 3, reg: w2kw, asm: "VPMULLQ", commutative: true, typ: "Vec256", resultInArg0: false},
{name: "VPORQMasked256", argLength: 3, reg: w2kw, asm: "VPORQ", commutative: true, typ: "Vec256", resultInArg0: false},
{name: "VPOPCNTQ256", argLength: 1, reg: w11, asm: "VPOPCNTQ", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPOPCNTQMasked256", argLength: 2, reg: wkw, asm: "VPOPCNTQ", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPROLVQ256", argLength: 2, reg: w21, asm: "VPROLVQ", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPROLVQMasked256", argLength: 3, reg: w2kw, asm: "VPROLVQ", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPRORVQ256", argLength: 2, reg: w21, asm: "VPRORVQ", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPRORVQMasked256", argLength: 3, reg: w2kw, asm: "VPRORVQ", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPSLLQ256", argLength: 2, reg: vfpv, asm: "VPSLLQ", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSLLQMasked256", argLength: 3, reg: wfpkw, asm: "VPSLLQ", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPSRLQ256", argLength: 2, reg: vfpv, asm: "VPSRLQ", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSRLQMasked256", argLength: 3, reg: wfpkw, asm: "VPSRLQ", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPSRAQ256", argLength: 2, reg: wfpw, asm: "VPSRAQ", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPSRAQMasked256", argLength: 3, reg: wfpkw, asm: "VPSRAQ", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPSLLVQ256", argLength: 2, reg: v21, asm: "VPSLLVQ", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSHLDVQ256", argLength: 3, reg: w31, asm: "VPSHLDVQ", commutative: false, typ: "Vec256", resultInArg0: true},
{name: "VPSHLDVQMasked256", argLength: 4, reg: w3kw, asm: "VPSHLDVQ", commutative: false, typ: "Vec256", resultInArg0: true},
{name: "VPSLLVQMasked256", argLength: 3, reg: w2kw, asm: "VPSLLVQ", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPSRLVQ256", argLength: 2, reg: v21, asm: "VPSRLVQ", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSHRDVQ256", argLength: 3, reg: w31, asm: "VPSHRDVQ", commutative: false, typ: "Vec256", resultInArg0: true},
{name: "VPSHRDVQMasked256", argLength: 4, reg: w3kw, asm: "VPSHRDVQ", commutative: false, typ: "Vec256", resultInArg0: true},
{name: "VPSRLVQMasked256", argLength: 3, reg: w2kw, asm: "VPSRLVQ", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPSRAVQ256", argLength: 2, reg: w21, asm: "VPSRAVQ", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPSRAVQMasked256", argLength: 3, reg: w2kw, asm: "VPSRAVQ", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPSUBQ256", argLength: 2, reg: v21, asm: "VPSUBQ", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSUBQMasked256", argLength: 3, reg: w2kw, asm: "VPSUBQ", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPXORQMasked256", argLength: 3, reg: w2kw, asm: "VPXORQ", commutative: true, typ: "Vec256", resultInArg0: false},
{name: "VPABSQ512", argLength: 1, reg: w11, asm: "VPABSQ", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPABSQMasked512", argLength: 2, reg: wkw, asm: "VPABSQ", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPADDQ512", argLength: 2, reg: w21, asm: "VPADDQ", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPADDQMasked512", argLength: 3, reg: w2kw, asm: "VPADDQ", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPANDQ512", argLength: 2, reg: w21, asm: "VPANDQ", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPANDQMasked512", argLength: 3, reg: w2kw, asm: "VPANDQ", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPANDNQ512", argLength: 2, reg: w21, asm: "VPANDNQ", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPANDNQMasked512", argLength: 3, reg: w2kw, asm: "VPANDNQ", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPMAXSQ512", argLength: 2, reg: w21, asm: "VPMAXSQ", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMAXSQMasked512", argLength: 3, reg: w2kw, asm: "VPMAXSQ", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMINSQ512", argLength: 2, reg: w21, asm: "VPMINSQ", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMINSQMasked512", argLength: 3, reg: w2kw, asm: "VPMINSQ", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMULDQ512", argLength: 2, reg: w21, asm: "VPMULDQ", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMULDQMasked512", argLength: 3, reg: w2kw, asm: "VPMULDQ", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMULLQ512", argLength: 2, reg: w21, asm: "VPMULLQ", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMULLQMasked512", argLength: 3, reg: w2kw, asm: "VPMULLQ", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPORQ512", argLength: 2, reg: w21, asm: "VPORQ", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPORQMasked512", argLength: 3, reg: w2kw, asm: "VPORQ", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPOPCNTQ512", argLength: 1, reg: w11, asm: "VPOPCNTQ", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPOPCNTQMasked512", argLength: 2, reg: wkw, asm: "VPOPCNTQ", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPROLVQ512", argLength: 2, reg: w21, asm: "VPROLVQ", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPROLVQMasked512", argLength: 3, reg: w2kw, asm: "VPROLVQ", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPRORVQ512", argLength: 2, reg: w21, asm: "VPRORVQ", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPRORVQMasked512", argLength: 3, reg: w2kw, asm: "VPRORVQ", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSLLQ512", argLength: 2, reg: wfpw, asm: "VPSLLQ", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSLLQMasked512", argLength: 3, reg: wfpkw, asm: "VPSLLQ", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSRLQ512", argLength: 2, reg: wfpw, asm: "VPSRLQ", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSRLQMasked512", argLength: 3, reg: wfpkw, asm: "VPSRLQ", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSRAQ512", argLength: 2, reg: wfpw, asm: "VPSRAQ", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSRAQMasked512", argLength: 3, reg: wfpkw, asm: "VPSRAQ", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSLLVQ512", argLength: 2, reg: w21, asm: "VPSLLVQ", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSHLDVQ512", argLength: 3, reg: w31, asm: "VPSHLDVQ", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VPSHLDVQMasked512", argLength: 4, reg: w3kw, asm: "VPSHLDVQ", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VPSLLVQMasked512", argLength: 3, reg: w2kw, asm: "VPSLLVQ", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSRLVQ512", argLength: 2, reg: w21, asm: "VPSRLVQ", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSHRDVQ512", argLength: 3, reg: w31, asm: "VPSHRDVQ", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VPSHRDVQMasked512", argLength: 4, reg: w3kw, asm: "VPSHRDVQ", commutative: false, typ: "Vec512", resultInArg0: true},
{name: "VPSRLVQMasked512", argLength: 3, reg: w2kw, asm: "VPSRLVQ", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSRAVQ512", argLength: 2, reg: w21, asm: "VPSRAVQ", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSRAVQMasked512", argLength: 3, reg: w2kw, asm: "VPSRAVQ", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSUBQ512", argLength: 2, reg: w21, asm: "VPSUBQ", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSUBQMasked512", argLength: 3, reg: w2kw, asm: "VPSUBQ", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPXORQ512", argLength: 2, reg: w21, asm: "VPXORQ", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPXORQMasked512", argLength: 3, reg: w2kw, asm: "VPXORQ", commutative: true, typ: "Vec512", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPABSB128", argLength: 1, reg: v11, asm: "VPABSB", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPABSBMasked128", argLength: 2, reg: wkw, asm: "VPABSB", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPADDB128", argLength: 2, reg: v21, asm: "VPADDB", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPADDBMasked128", argLength: 3, reg: w2kw, asm: "VPADDB", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPAND128", argLength: 2, reg: v21, asm: "VPAND", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VPANDN128", argLength: 2, reg: v21, asm: "VPANDN", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPCMPEQB128", argLength: 2, reg: v21, asm: "VPCMPEQB", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VPCMPGTB128", argLength: 2, reg: v21, asm: "VPCMPGTB", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPMAXSB128", argLength: 2, reg: v21, asm: "VPMAXSB", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMAXSBMasked128", argLength: 3, reg: w2kw, asm: "VPMAXSB", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMINSB128", argLength: 2, reg: v21, asm: "VPMINSB", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMINSBMasked128", argLength: 3, reg: w2kw, asm: "VPMINSB", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPOR128", argLength: 2, reg: v21, asm: "VPOR", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPOPCNTB128", argLength: 1, reg: w11, asm: "VPOPCNTB", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPOPCNTBMasked128", argLength: 2, reg: wkw, asm: "VPOPCNTB", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPADDSB128", argLength: 2, reg: v21, asm: "VPADDSB", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPADDSBMasked128", argLength: 3, reg: w2kw, asm: "VPADDSB", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPSUBSB128", argLength: 2, reg: v21, asm: "VPSUBSB", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSUBSBMasked128", argLength: 3, reg: w2kw, asm: "VPSUBSB", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPSIGNB128", argLength: 2, reg: v21, asm: "VPSIGNB", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPSUBB128", argLength: 2, reg: v21, asm: "VPSUBB", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSUBBMasked128", argLength: 3, reg: w2kw, asm: "VPSUBB", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPXOR128", argLength: 2, reg: v21, asm: "VPXOR", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VPABSB256", argLength: 1, reg: v11, asm: "VPABSB", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPABSBMasked256", argLength: 2, reg: wkw, asm: "VPABSB", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPADDB256", argLength: 2, reg: v21, asm: "VPADDB", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPADDBMasked256", argLength: 3, reg: w2kw, asm: "VPADDB", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPAND256", argLength: 2, reg: v21, asm: "VPAND", commutative: true, typ: "Vec256", resultInArg0: false},
{name: "VPANDN256", argLength: 2, reg: v21, asm: "VPANDN", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPCMPEQB256", argLength: 2, reg: v21, asm: "VPCMPEQB", commutative: true, typ: "Vec256", resultInArg0: false},
{name: "VPCMPGTB256", argLength: 2, reg: v21, asm: "VPCMPGTB", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPMAXSB256", argLength: 2, reg: v21, asm: "VPMAXSB", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMAXSBMasked256", argLength: 3, reg: w2kw, asm: "VPMAXSB", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMINSB256", argLength: 2, reg: v21, asm: "VPMINSB", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMINSBMasked256", argLength: 3, reg: w2kw, asm: "VPMINSB", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPOR256", argLength: 2, reg: v21, asm: "VPOR", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPOPCNTB256", argLength: 1, reg: w11, asm: "VPOPCNTB", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPOPCNTBMasked256", argLength: 2, reg: wkw, asm: "VPOPCNTB", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPADDSB256", argLength: 2, reg: v21, asm: "VPADDSB", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPADDSBMasked256", argLength: 3, reg: w2kw, asm: "VPADDSB", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPSUBSB256", argLength: 2, reg: v21, asm: "VPSUBSB", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSUBSBMasked256", argLength: 3, reg: w2kw, asm: "VPSUBSB", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPSIGNB256", argLength: 2, reg: v21, asm: "VPSIGNB", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPSUBB256", argLength: 2, reg: v21, asm: "VPSUBB", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSUBBMasked256", argLength: 3, reg: w2kw, asm: "VPSUBB", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPXOR256", argLength: 2, reg: v21, asm: "VPXOR", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPABSB512", argLength: 1, reg: w11, asm: "VPABSB", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPABSBMasked512", argLength: 2, reg: wkw, asm: "VPABSB", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPADDB512", argLength: 2, reg: w21, asm: "VPADDB", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPADDBMasked512", argLength: 3, reg: w2kw, asm: "VPADDB", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMAXSB512", argLength: 2, reg: w21, asm: "VPMAXSB", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMAXSBMasked512", argLength: 3, reg: w2kw, asm: "VPMAXSB", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMINSB512", argLength: 2, reg: w21, asm: "VPMINSB", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMINSBMasked512", argLength: 3, reg: w2kw, asm: "VPMINSB", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPOPCNTB512", argLength: 1, reg: w11, asm: "VPOPCNTB", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPOPCNTBMasked512", argLength: 2, reg: wkw, asm: "VPOPCNTB", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPADDSB512", argLength: 2, reg: w21, asm: "VPADDSB", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPADDSBMasked512", argLength: 3, reg: w2kw, asm: "VPADDSB", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPSUBSB512", argLength: 2, reg: w21, asm: "VPSUBSB", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSUBSBMasked512", argLength: 3, reg: w2kw, asm: "VPSUBSB", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSUBB512", argLength: 2, reg: w21, asm: "VPSUBB", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSUBBMasked512", argLength: 3, reg: w2kw, asm: "VPSUBB", commutative: false, typ: "Vec512", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPAVGW256", argLength: 2, reg: v21, asm: "VPAVGW", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPAVGWMasked256", argLength: 3, reg: w2kw, asm: "VPAVGW", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMAXUW256", argLength: 2, reg: v21, asm: "VPMAXUW", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMAXUWMasked256", argLength: 3, reg: w2kw, asm: "VPMAXUW", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMINUW256", argLength: 2, reg: v21, asm: "VPMINUW", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMINUWMasked256", argLength: 3, reg: w2kw, asm: "VPMINUW", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMULHUW256", argLength: 2, reg: v21, asm: "VPMULHUW", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMULHUWMasked256", argLength: 3, reg: w2kw, asm: "VPMULHUW", commutative: true, typ: "Vec256", resultInArg0: false},
{name: "VPAVGW512", argLength: 2, reg: w21, asm: "VPAVGW", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPAVGWMasked512", argLength: 3, reg: w2kw, asm: "VPAVGW", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMAXUW512", argLength: 2, reg: w21, asm: "VPMAXUW", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMAXUWMasked512", argLength: 3, reg: w2kw, asm: "VPMAXUW", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMINUW512", argLength: 2, reg: w21, asm: "VPMINUW", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMINUWMasked512", argLength: 3, reg: w2kw, asm: "VPMINUW", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMULHUW512", argLength: 2, reg: w21, asm: "VPMULHUW", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMULHUWMasked512", argLength: 3, reg: w2kw, asm: "VPMULHUW", commutative: true, typ: "Vec512", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPAVGW128", argLength: 2, reg: v21, asm: "VPAVGW", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPAVGWMasked128", argLength: 3, reg: w2kw, asm: "VPAVGW", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMAXUW128", argLength: 2, reg: v21, asm: "VPMAXUW", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMAXUWMasked128", argLength: 3, reg: w2kw, asm: "VPMAXUW", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMINUW128", argLength: 2, reg: v21, asm: "VPMINUW", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMINUWMasked128", argLength: 3, reg: w2kw, asm: "VPMINUW", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMULHUW128", argLength: 2, reg: v21, asm: "VPMULHUW", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMULHUWMasked128", argLength: 3, reg: w2kw, asm: "VPMULHUW", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VPMAXUD512", argLength: 2, reg: w21, asm: "VPMAXUD", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMAXUDMasked512", argLength: 3, reg: w2kw, asm: "VPMAXUD", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMINUD512", argLength: 2, reg: w21, asm: "VPMINUD", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMINUDMasked512", argLength: 3, reg: w2kw, asm: "VPMINUD", commutative: true, typ: "Vec512", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMAXUD128", argLength: 2, reg: v21, asm: "VPMAXUD", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMAXUDMasked128", argLength: 3, reg: w2kw, asm: "VPMAXUD", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMINUD128", argLength: 2, reg: v21, asm: "VPMINUD", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMINUDMasked128", argLength: 3, reg: w2kw, asm: "VPMINUD", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMULUDQ128", argLength: 2, reg: v21, asm: "VPMULUDQ", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VPMAXUD256", argLength: 2, reg: v21, asm: "VPMAXUD", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMAXUDMasked256", argLength: 3, reg: w2kw, asm: "VPMAXUD", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMINUD256", argLength: 2, reg: v21, asm: "VPMINUD", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMINUDMasked256", argLength: 3, reg: w2kw, asm: "VPMINUD", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMULUDQ256", argLength: 2, reg: v21, asm: "VPMULUDQ", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMAXUQ128", argLength: 2, reg: w21, asm: "VPMAXUQ", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VPMAXUQMasked128", argLength: 3, reg: w2kw, asm: "VPMAXUQ", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VPMINUQ128", argLength: 2, reg: w21, asm: "VPMINUQ", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VPMINUQMasked128", argLength: 3, reg: w2kw, asm: "VPMINUQ", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VPMULUDQMasked128", argLength: 3, reg: w2kw, asm: "VPMULUDQ", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VPMAXUQ256", argLength: 2, reg: w21, asm: "VPMAXUQ", commutative: true, typ: "Vec256", resultInArg0: false},
{name: "VPMAXUQMasked256", argLength: 3, reg: w2kw, asm: "VPMAXUQ", commutative: true, typ: "Vec256", resultInArg0: false},
{name: "VPMINUQ256", argLength: 2, reg: w21, asm: "VPMINUQ", commutative: true, typ: "Vec256", resultInArg0: false},
{name: "VPMINUQMasked256", argLength: 3, reg: w2kw, asm: "VPMINUQ", commutative: true, typ: "Vec256", resultInArg0: false},
{name: "VPMULUDQMasked256", argLength: 3, reg: w2kw, asm: "VPMULUDQ", commutative: true, typ: "Vec256", resultInArg0: false},
{name: "VPMAXUQ512", argLength: 2, reg: w21, asm: "VPMAXUQ", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMAXUQMasked512", argLength: 3, reg: w2kw, asm: "VPMAXUQ", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMINUQ512", argLength: 2, reg: w21, asm: "VPMINUQ", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMINUQMasked512", argLength: 3, reg: w2kw, asm: "VPMINUQ", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMULUDQ512", argLength: 2, reg: w21, asm: "VPMULUDQ", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMULUDQMasked512", argLength: 3, reg: w2kw, asm: "VPMULUDQ", commutative: true, typ: "Vec512", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPAVGB128", argLength: 2, reg: v21, asm: "VPAVGB", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPAVGBMasked128", argLength: 3, reg: w2kw, asm: "VPAVGB", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VGF2P8MULB128", argLength: 2, reg: w21, asm: "VGF2P8MULB", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VGF2P8MULBMasked128", argLength: 3, reg: w2kw, asm: "VGF2P8MULB", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMAXUB128", argLength: 2, reg: v21, asm: "VPMAXUB", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMAXUBMasked128", argLength: 3, reg: w2kw, asm: "VPMAXUB", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMINUB128", argLength: 2, reg: v21, asm: "VPMINUB", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMINUBMasked128", argLength: 3, reg: w2kw, asm: "VPMINUB", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMADDUBSW128", argLength: 2, reg: v21, asm: "VPMADDUBSW", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMADDUBSWMasked128", argLength: 3, reg: w2kw, asm: "VPMADDUBSW", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPAVGB256", argLength: 2, reg: v21, asm: "VPAVGB", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPAVGBMasked256", argLength: 3, reg: w2kw, asm: "VPAVGB", commutative: true, typ: "Vec256", resultInArg0: false},
{name: "VGF2P8MULB256", argLength: 2, reg: w21, asm: "VGF2P8MULB", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VGF2P8MULBMasked256", argLength: 3, reg: w2kw, asm: "VGF2P8MULB", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMAXUB256", argLength: 2, reg: v21, asm: "VPMAXUB", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMAXUBMasked256", argLength: 3, reg: w2kw, asm: "VPMAXUB", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMINUB256", argLength: 2, reg: v21, asm: "VPMINUB", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMINUBMasked256", argLength: 3, reg: w2kw, asm: "VPMINUB", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPMADDUBSW256", argLength: 2, reg: v21, asm: "VPMADDUBSW", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPMADDUBSWMasked256", argLength: 3, reg: w2kw, asm: "VPMADDUBSW", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPAVGB512", argLength: 2, reg: w21, asm: "VPAVGB", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPAVGBMasked512", argLength: 3, reg: w2kw, asm: "VPAVGB", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VGF2P8MULB512", argLength: 2, reg: w21, asm: "VGF2P8MULB", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VGF2P8MULBMasked512", argLength: 3, reg: w2kw, asm: "VGF2P8MULB", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPMAXUB512", argLength: 2, reg: w21, asm: "VPMAXUB", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMAXUBMasked512", argLength: 3, reg: w2kw, asm: "VPMAXUB", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMINUB512", argLength: 2, reg: w21, asm: "VPMINUB", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMINUBMasked512", argLength: 3, reg: w2kw, asm: "VPMINUB", commutative: true, typ: "Vec512", resultInArg0: false},
{name: "VPMADDUBSW512", argLength: 2, reg: w21, asm: "VPMADDUBSW", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPMADDUBSWMasked512", argLength: 3, reg: w2kw, asm: "VPMADDUBSW", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VRNDSCALEPS512", argLength: 1, reg: w11, asm: "VRNDSCALEPS", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VRNDSCALEPSMasked512", argLength: 2, reg: wkw, asm: "VRNDSCALEPS", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VREDUCEPS512", argLength: 1, reg: w11, asm: "VREDUCEPS", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VREDUCEPSMasked512", argLength: 2, reg: wkw, asm: "VREDUCEPS", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VCMPPS512", argLength: 2, reg: w2k, asm: "VCMPPS", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
{name: "VCMPPSMasked512", argLength: 3, reg: w2kk, asm: "VCMPPS", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VROUNDPS128", argLength: 1, reg: v11, asm: "VROUNDPS", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VRNDSCALEPS128", argLength: 1, reg: w11, asm: "VRNDSCALEPS", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VRNDSCALEPSMasked128", argLength: 2, reg: wkw, asm: "VRNDSCALEPS", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VREDUCEPS128", argLength: 1, reg: w11, asm: "VREDUCEPS", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VREDUCEPSMasked128", argLength: 2, reg: wkw, asm: "VREDUCEPS", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VCMPPS128", argLength: 2, reg: v21, asm: "VCMPPS", aux: "Int8", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VCMPPSMasked128", argLength: 3, reg: w2kk, asm: "VCMPPS", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VROUNDPS256", argLength: 1, reg: v11, asm: "VROUNDPS", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VRNDSCALEPS256", argLength: 1, reg: w11, asm: "VRNDSCALEPS", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VRNDSCALEPSMasked256", argLength: 2, reg: wkw, asm: "VRNDSCALEPS", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VREDUCEPS256", argLength: 1, reg: w11, asm: "VREDUCEPS", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VREDUCEPSMasked256", argLength: 2, reg: wkw, asm: "VREDUCEPS", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VCMPPS256", argLength: 2, reg: v21, asm: "VCMPPS", aux: "Int8", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VCMPPSMasked256", argLength: 3, reg: w2kk, asm: "VCMPPS", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VEXTRACTF128128", argLength: 1, reg: v11, asm: "VEXTRACTF128", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VINSERTF128256", argLength: 2, reg: v21, asm: "VINSERTF128", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VROUNDPD128", argLength: 1, reg: v11, asm: "VROUNDPD", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VRNDSCALEPD128", argLength: 1, reg: w11, asm: "VRNDSCALEPD", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VRNDSCALEPDMasked128", argLength: 2, reg: wkw, asm: "VRNDSCALEPD", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VREDUCEPD128", argLength: 1, reg: w11, asm: "VREDUCEPD", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VREDUCEPDMasked128", argLength: 2, reg: wkw, asm: "VREDUCEPD", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VDPPD128", argLength: 2, reg: v21, asm: "VDPPD", aux: "Int8", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VCMPPD128", argLength: 2, reg: v21, asm: "VCMPPD", aux: "Int8", commutative: true, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VCMPPDMasked128", argLength: 3, reg: w2kk, asm: "VCMPPD", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VROUNDPD256", argLength: 1, reg: v11, asm: "VROUNDPD", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VRNDSCALEPD256", argLength: 1, reg: w11, asm: "VRNDSCALEPD", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VRNDSCALEPDMasked256", argLength: 2, reg: wkw, asm: "VRNDSCALEPD", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VREDUCEPD256", argLength: 1, reg: w11, asm: "VREDUCEPD", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VREDUCEPDMasked256", argLength: 2, reg: wkw, asm: "VREDUCEPD", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VCMPPD256", argLength: 2, reg: v21, asm: "VCMPPD", aux: "Int8", commutative: true, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VCMPPDMasked256", argLength: 3, reg: w2kk, asm: "VCMPPD", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
{name: "VRNDSCALEPD512", argLength: 1, reg: w11, asm: "VRNDSCALEPD", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VRNDSCALEPDMasked512", argLength: 2, reg: wkw, asm: "VRNDSCALEPD", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VREDUCEPD512", argLength: 1, reg: w11, asm: "VREDUCEPD", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VREDUCEPDMasked512", argLength: 2, reg: wkw, asm: "VREDUCEPD", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VCMPPD512", argLength: 2, reg: w2k, asm: "VCMPPD", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
{name: "VCMPPDMasked512", argLength: 3, reg: w2kk, asm: "VCMPPD", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
{name: "VPCMPWMasked256", argLength: 3, reg: w2kk, asm: "VPCMPW", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
{name: "VPCMPW256", argLength: 2, reg: w2k, asm: "VPCMPW", aux: "Int8", commutative: false, typ: "Mask", resultInArg0: false},
{name: "VPSHLDW256", argLength: 2, reg: w21, asm: "VPSHLDW", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPSHLDWMasked256", argLength: 3, reg: w2kw, asm: "VPSHLDW", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPSHRDW256", argLength: 2, reg: w21, asm: "VPSHRDW", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPSHRDWMasked256", argLength: 3, reg: w2kw, asm: "VPSHRDW", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPCMPW512", argLength: 2, reg: w2k, asm: "VPCMPW", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
{name: "VPCMPWMasked512", argLength: 3, reg: w2kk, asm: "VPCMPW", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
{name: "VPSHLDW512", argLength: 2, reg: w21, asm: "VPSHLDW", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSHLDWMasked512", argLength: 3, reg: w2kw, asm: "VPSHLDW", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSHRDW512", argLength: 2, reg: w21, asm: "VPSHRDW", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSHRDWMasked512", argLength: 3, reg: w2kw, asm: "VPSHRDW", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPCMPWMasked128", argLength: 3, reg: w2kk, asm: "VPCMPW", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
{name: "VPEXTRW128", argLength: 1, reg: wgp, asm: "VPEXTRW", aux: "Int8", commutative: false, typ: "int16", resultInArg0: false},
{name: "VPCMPW128", argLength: 2, reg: w2k, asm: "VPCMPW", aux: "Int8", commutative: false, typ: "Mask", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPINSRW128", argLength: 2, reg: vgpv, asm: "VPINSRW", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSHLDW128", argLength: 2, reg: w21, asm: "VPSHLDW", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPSHLDWMasked128", argLength: 3, reg: w2kw, asm: "VPSHLDW", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPSHRDW128", argLength: 2, reg: w21, asm: "VPSHRDW", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPSHRDWMasked128", argLength: 3, reg: w2kw, asm: "VPSHRDW", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPCMPD512", argLength: 2, reg: w2k, asm: "VPCMPD", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
{name: "VPCMPDMasked512", argLength: 3, reg: w2kk, asm: "VPCMPD", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
{name: "VPROLD512", argLength: 1, reg: w11, asm: "VPROLD", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPROLDMasked512", argLength: 2, reg: wkw, asm: "VPROLD", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPRORD512", argLength: 1, reg: w11, asm: "VPRORD", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPRORDMasked512", argLength: 2, reg: wkw, asm: "VPRORD", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSHLDD512", argLength: 2, reg: w21, asm: "VPSHLDD", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSHLDDMasked512", argLength: 3, reg: w2kw, asm: "VPSHLDD", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSHRDD512", argLength: 2, reg: w21, asm: "VPSHRDD", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSHRDDMasked512", argLength: 3, reg: w2kw, asm: "VPSHRDD", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPCMPDMasked128", argLength: 3, reg: w2kk, asm: "VPCMPD", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPEXTRD128", argLength: 1, reg: vgp, asm: "VPEXTRD", aux: "Int8", commutative: false, typ: "int32", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPCMPD128", argLength: 2, reg: w2k, asm: "VPCMPD", aux: "Int8", commutative: false, typ: "Mask", resultInArg0: false},
{name: "VPROLD128", argLength: 1, reg: w11, asm: "VPROLD", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPROLDMasked128", argLength: 2, reg: wkw, asm: "VPROLD", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPRORD128", argLength: 1, reg: w11, asm: "VPRORD", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPRORDMasked128", argLength: 2, reg: wkw, asm: "VPRORD", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPINSRD128", argLength: 2, reg: vgpv, asm: "VPINSRD", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSHLDD128", argLength: 2, reg: w21, asm: "VPSHLDD", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPSHLDDMasked128", argLength: 3, reg: w2kw, asm: "VPSHLDD", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPSHRDD128", argLength: 2, reg: w21, asm: "VPSHRDD", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPSHRDDMasked128", argLength: 3, reg: w2kw, asm: "VPSHRDD", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPCMPDMasked256", argLength: 3, reg: w2kk, asm: "VPCMPD", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
{name: "VPCMPD256", argLength: 2, reg: w2k, asm: "VPCMPD", aux: "Int8", commutative: false, typ: "Mask", resultInArg0: false},
{name: "VPROLD256", argLength: 1, reg: w11, asm: "VPROLD", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPROLDMasked256", argLength: 2, reg: wkw, asm: "VPROLD", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPRORD256", argLength: 1, reg: w11, asm: "VPRORD", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPRORDMasked256", argLength: 2, reg: wkw, asm: "VPRORD", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPSHLDD256", argLength: 2, reg: w21, asm: "VPSHLDD", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPSHLDDMasked256", argLength: 3, reg: w2kw, asm: "VPSHLDD", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPSHRDD256", argLength: 2, reg: w21, asm: "VPSHRDD", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPSHRDDMasked256", argLength: 3, reg: w2kw, asm: "VPSHRDD", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPCMPQMasked128", argLength: 3, reg: w2kk, asm: "VPCMPQ", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPEXTRQ128", argLength: 1, reg: vgp, asm: "VPEXTRQ", aux: "Int8", commutative: false, typ: "int64", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPCMPQ128", argLength: 2, reg: w2k, asm: "VPCMPQ", aux: "Int8", commutative: false, typ: "Mask", resultInArg0: false},
{name: "VPROLQ128", argLength: 1, reg: w11, asm: "VPROLQ", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPROLQMasked128", argLength: 2, reg: wkw, asm: "VPROLQ", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPRORQ128", argLength: 1, reg: w11, asm: "VPRORQ", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPRORQMasked128", argLength: 2, reg: wkw, asm: "VPRORQ", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPINSRQ128", argLength: 2, reg: vgpv, asm: "VPINSRQ", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPSHLDQ128", argLength: 2, reg: w21, asm: "VPSHLDQ", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPSHLDQMasked128", argLength: 3, reg: w2kw, asm: "VPSHLDQ", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPSHRDQ128", argLength: 2, reg: w21, asm: "VPSHRDQ", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPSHRDQMasked128", argLength: 3, reg: w2kw, asm: "VPSHRDQ", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPCMPQMasked256", argLength: 3, reg: w2kk, asm: "VPCMPQ", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
{name: "VPCMPQ256", argLength: 2, reg: w2k, asm: "VPCMPQ", aux: "Int8", commutative: false, typ: "Mask", resultInArg0: false},
{name: "VPROLQ256", argLength: 1, reg: w11, asm: "VPROLQ", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPROLQMasked256", argLength: 2, reg: wkw, asm: "VPROLQ", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPRORQ256", argLength: 1, reg: w11, asm: "VPRORQ", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPRORQMasked256", argLength: 2, reg: wkw, asm: "VPRORQ", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPSHLDQ256", argLength: 2, reg: w21, asm: "VPSHLDQ", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPSHLDQMasked256", argLength: 3, reg: w2kw, asm: "VPSHLDQ", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPSHRDQ256", argLength: 2, reg: w21, asm: "VPSHRDQ", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPSHRDQMasked256", argLength: 3, reg: w2kw, asm: "VPSHRDQ", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPCMPQ512", argLength: 2, reg: w2k, asm: "VPCMPQ", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
{name: "VPCMPQMasked512", argLength: 3, reg: w2kk, asm: "VPCMPQ", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
{name: "VPROLQ512", argLength: 1, reg: w11, asm: "VPROLQ", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPROLQMasked512", argLength: 2, reg: wkw, asm: "VPROLQ", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPRORQ512", argLength: 1, reg: w11, asm: "VPRORQ", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPRORQMasked512", argLength: 2, reg: wkw, asm: "VPRORQ", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSHLDQ512", argLength: 2, reg: w21, asm: "VPSHLDQ", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSHLDQMasked512", argLength: 3, reg: w2kw, asm: "VPSHLDQ", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSHRDQ512", argLength: 2, reg: w21, asm: "VPSHRDQ", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPSHRDQMasked512", argLength: 3, reg: w2kw, asm: "VPSHRDQ", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VPCMPBMasked128", argLength: 3, reg: w2kk, asm: "VPCMPB", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
{name: "VPEXTRB128", argLength: 1, reg: wgp, asm: "VPEXTRB", aux: "Int8", commutative: false, typ: "int8", resultInArg0: false},
{name: "VPCMPB128", argLength: 2, reg: w2k, asm: "VPCMPB", aux: "Int8", commutative: false, typ: "Mask", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VPINSRB128", argLength: 2, reg: vgpv, asm: "VPINSRB", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPCMPBMasked256", argLength: 3, reg: w2kk, asm: "VPCMPB", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VEXTRACTI128128", argLength: 1, reg: v11, asm: "VEXTRACTI128", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPCMPB256", argLength: 2, reg: w2k, asm: "VPCMPB", aux: "Int8", commutative: false, typ: "Mask", resultInArg0: false},
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
{name: "VINSERTI128256", argLength: 2, reg: v21, asm: "VINSERTI128", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPCMPB512", argLength: 2, reg: w2k, asm: "VPCMPB", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
{name: "VPCMPBMasked512", argLength: 3, reg: w2kk, asm: "VPCMPB", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
{name: "VPCMPUWMasked256", argLength: 3, reg: w2kk, asm: "VPCMPUW", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
[dev.simd] cmd/compile, simd: Int64x2 Greater and Uint* Equal This CL is generated by CL 686817. Change-Id: I19b8e468594514b2b1c99f8ad766f78b5e194c80 Reviewed-on: https://go-review.googlesource.com/c/go/+/686876 TryBot-Bypass: David Chase <drchase@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-09 16:24:34 +00:00
{name: "VPCMPUW256", argLength: 2, reg: w2k, asm: "VPCMPUW", aux: "Int8", commutative: false, typ: "Mask", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPCMPUW512", argLength: 2, reg: w2k, asm: "VPCMPUW", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
{name: "VPCMPUWMasked512", argLength: 3, reg: w2kk, asm: "VPCMPUW", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
{name: "VPCMPUWMasked128", argLength: 3, reg: w2kk, asm: "VPCMPUW", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
[dev.simd] cmd/compile, simd: Int64x2 Greater and Uint* Equal This CL is generated by CL 686817. Change-Id: I19b8e468594514b2b1c99f8ad766f78b5e194c80 Reviewed-on: https://go-review.googlesource.com/c/go/+/686876 TryBot-Bypass: David Chase <drchase@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-09 16:24:34 +00:00
{name: "VPCMPUW128", argLength: 2, reg: w2k, asm: "VPCMPUW", aux: "Int8", commutative: false, typ: "Mask", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPCMPUD512", argLength: 2, reg: w2k, asm: "VPCMPUD", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
{name: "VPCMPUDMasked512", argLength: 3, reg: w2kk, asm: "VPCMPUD", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
{name: "VPCMPUDMasked128", argLength: 3, reg: w2kk, asm: "VPCMPUD", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
[dev.simd] cmd/compile, simd: Int64x2 Greater and Uint* Equal This CL is generated by CL 686817. Change-Id: I19b8e468594514b2b1c99f8ad766f78b5e194c80 Reviewed-on: https://go-review.googlesource.com/c/go/+/686876 TryBot-Bypass: David Chase <drchase@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-09 16:24:34 +00:00
{name: "VPCMPUD128", argLength: 2, reg: w2k, asm: "VPCMPUD", aux: "Int8", commutative: false, typ: "Mask", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPCMPUDMasked256", argLength: 3, reg: w2kk, asm: "VPCMPUD", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
[dev.simd] cmd/compile, simd: Int64x2 Greater and Uint* Equal This CL is generated by CL 686817. Change-Id: I19b8e468594514b2b1c99f8ad766f78b5e194c80 Reviewed-on: https://go-review.googlesource.com/c/go/+/686876 TryBot-Bypass: David Chase <drchase@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-09 16:24:34 +00:00
{name: "VPCMPUD256", argLength: 2, reg: w2k, asm: "VPCMPUD", aux: "Int8", commutative: false, typ: "Mask", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPCMPUQMasked128", argLength: 3, reg: w2kk, asm: "VPCMPUQ", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
[dev.simd] cmd/compile, simd: Int64x2 Greater and Uint* Equal This CL is generated by CL 686817. Change-Id: I19b8e468594514b2b1c99f8ad766f78b5e194c80 Reviewed-on: https://go-review.googlesource.com/c/go/+/686876 TryBot-Bypass: David Chase <drchase@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-09 16:24:34 +00:00
{name: "VPCMPUQ128", argLength: 2, reg: w2k, asm: "VPCMPUQ", aux: "Int8", commutative: false, typ: "Mask", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPCMPUQMasked256", argLength: 3, reg: w2kk, asm: "VPCMPUQ", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
[dev.simd] cmd/compile, simd: Int64x2 Greater and Uint* Equal This CL is generated by CL 686817. Change-Id: I19b8e468594514b2b1c99f8ad766f78b5e194c80 Reviewed-on: https://go-review.googlesource.com/c/go/+/686876 TryBot-Bypass: David Chase <drchase@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-09 16:24:34 +00:00
{name: "VPCMPUQ256", argLength: 2, reg: w2k, asm: "VPCMPUQ", aux: "Int8", commutative: false, typ: "Mask", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPCMPUQ512", argLength: 2, reg: w2k, asm: "VPCMPUQ", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
{name: "VPCMPUQMasked512", argLength: 3, reg: w2kk, asm: "VPCMPUQ", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
{name: "VPCMPUBMasked128", argLength: 3, reg: w2kk, asm: "VPCMPUB", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
{name: "VGF2P8AFFINEQB128", argLength: 2, reg: w21, asm: "VGF2P8AFFINEQB", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VGF2P8AFFINEINVQB128", argLength: 2, reg: w21, asm: "VGF2P8AFFINEINVQB", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VGF2P8AFFINEINVQBMasked128", argLength: 3, reg: w2kw, asm: "VGF2P8AFFINEINVQB", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VGF2P8AFFINEQBMasked128", argLength: 3, reg: w2kw, asm: "VGF2P8AFFINEQB", aux: "Int8", commutative: false, typ: "Vec128", resultInArg0: false},
[dev.simd] cmd/compile, simd: Int64x2 Greater and Uint* Equal This CL is generated by CL 686817. Change-Id: I19b8e468594514b2b1c99f8ad766f78b5e194c80 Reviewed-on: https://go-review.googlesource.com/c/go/+/686876 TryBot-Bypass: David Chase <drchase@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-09 16:24:34 +00:00
{name: "VPCMPUB128", argLength: 2, reg: w2k, asm: "VPCMPUB", aux: "Int8", commutative: false, typ: "Mask", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPCMPUBMasked256", argLength: 3, reg: w2kk, asm: "VPCMPUB", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
{name: "VGF2P8AFFINEQB256", argLength: 2, reg: w21, asm: "VGF2P8AFFINEQB", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VGF2P8AFFINEINVQB256", argLength: 2, reg: w21, asm: "VGF2P8AFFINEINVQB", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VGF2P8AFFINEINVQBMasked256", argLength: 3, reg: w2kw, asm: "VGF2P8AFFINEINVQB", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VGF2P8AFFINEQBMasked256", argLength: 3, reg: w2kw, asm: "VGF2P8AFFINEQB", aux: "Int8", commutative: false, typ: "Vec256", resultInArg0: false},
[dev.simd] cmd/compile, simd: Int64x2 Greater and Uint* Equal This CL is generated by CL 686817. Change-Id: I19b8e468594514b2b1c99f8ad766f78b5e194c80 Reviewed-on: https://go-review.googlesource.com/c/go/+/686876 TryBot-Bypass: David Chase <drchase@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-09 16:24:34 +00:00
{name: "VPCMPUB256", argLength: 2, reg: w2k, asm: "VPCMPUB", aux: "Int8", commutative: false, typ: "Mask", resultInArg0: false},
[dev.simd] cmd/compile: use upper registers for AVX512 simd ops This CL is generated by CL 686775. Change-Id: I10606cfdd4be015c8d251ba4275e1191d5bf0944 Reviewed-on: https://go-review.googlesource.com/c/go/+/686695 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 21:06:59 +00:00
{name: "VPCMPUB512", argLength: 2, reg: w2k, asm: "VPCMPUB", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
{name: "VPCMPUBMasked512", argLength: 3, reg: w2kk, asm: "VPCMPUB", aux: "Int8", commutative: true, typ: "Mask", resultInArg0: false},
{name: "VGF2P8AFFINEQB512", argLength: 2, reg: w21, asm: "VGF2P8AFFINEQB", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VGF2P8AFFINEINVQB512", argLength: 2, reg: w21, asm: "VGF2P8AFFINEINVQB", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VGF2P8AFFINEINVQBMasked512", argLength: 3, reg: w2kw, asm: "VGF2P8AFFINEINVQB", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
{name: "VGF2P8AFFINEQBMasked512", argLength: 3, reg: w2kw, asm: "VGF2P8AFFINEQB", aux: "Int8", commutative: false, typ: "Vec512", resultInArg0: false},
[dev.simd] cmd/compile: adapters for simd This combines several CLs into a single patch of "glue" for the generated SIMD extensions. This glue includes GOEXPERIMENT checks that disable the creation of user-visible "simd" types and that disable the registration of "simd" intrinsics. The simd type checks were changed to work for either package "simd" or "internal/simd" so that moving that package won't be quite so fragile. cmd/compile, internal/simd: glue for adding SIMD extensions to Go cmd/compile: theft of Cherry's sample SIMD compilation Change-Id: Id44e2f4bafe74032c26de576a8691b6f7d977e01 Reviewed-on: https://go-review.googlesource.com/c/go/+/675598 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-03-31 10:45:23 +11:00
}
}
Reference in a new issue Copy permalink