2015-01-19 14:34:58 -05:00
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// Copyright 2015 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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package obj
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import (
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"bufio"
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"bytes"
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"fmt"
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"io"
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"log"
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"os"
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"strconv"
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2015-02-25 09:07:02 -08:00
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"strings"
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2015-01-19 14:34:58 -05:00
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"time"
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)
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2015-02-25 09:07:02 -08:00
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const REG_NONE = 0
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2015-01-19 14:34:58 -05:00
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var start time.Time
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func Cputime() float64 {
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if start.IsZero() {
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start = time.Now()
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}
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return time.Since(start).Seconds()
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}
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type Biobuf struct {
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unget [2]int
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numUnget int
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f *os.File
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r *bufio.Reader
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w *bufio.Writer
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linelen int
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}
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[dev.cc] cmd/internal/obj: reconvert from liblink
cmd/internal/obj reconverted using rsc.io/c2go rev 2a95256.
- Brings in new, more regular Prog, Addr definitions
- Add Prog* argument to oclass in liblink/asm[68].c, for c2go conversion.
- Update objwriter for change in TEXT size encoding.
- Merge 5a, 6a, 8a, 9a changes into new5a, new6a, new8a, new9a (by hand).
- Add +build ignore to cmd/asm/internal/{addr,arch,asm}, cmd/asm.
They need to be updated for the changes.
- Reenable verifyAsm in cmd/go.
- Reenable GOOBJ=2 mode by default in liblink.
All architectures build successfully again.
Change-Id: I2c845c5d365aa484b570476898171bee657b626d
Reviewed-on: https://go-review.googlesource.com/3963
Reviewed-by: Rob Pike <r@golang.org>
2015-02-05 03:57:44 -05:00
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func Bopenw(name string) (*Biobuf, error) {
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f, err := os.Create(name)
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[dev.cc] cmd/internal/obj: reconvert from liblink
cmd/internal/obj reconverted using rsc.io/c2go rev 2a95256.
- Brings in new, more regular Prog, Addr definitions
- Add Prog* argument to oclass in liblink/asm[68].c, for c2go conversion.
- Update objwriter for change in TEXT size encoding.
- Merge 5a, 6a, 8a, 9a changes into new5a, new6a, new8a, new9a (by hand).
- Add +build ignore to cmd/asm/internal/{addr,arch,asm}, cmd/asm.
They need to be updated for the changes.
- Reenable verifyAsm in cmd/go.
- Reenable GOOBJ=2 mode by default in liblink.
All architectures build successfully again.
Change-Id: I2c845c5d365aa484b570476898171bee657b626d
Reviewed-on: https://go-review.googlesource.com/3963
Reviewed-by: Rob Pike <r@golang.org>
2015-02-05 03:57:44 -05:00
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if err != nil {
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return nil, err
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}
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return &Biobuf{f: f, w: bufio.NewWriter(f)}, nil
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}
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func Bopenr(name string) (*Biobuf, error) {
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f, err := os.Open(name)
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if err != nil {
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return nil, err
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}
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return &Biobuf{f: f, r: bufio.NewReader(f)}, nil
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}
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func Binitw(w io.Writer) *Biobuf {
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return &Biobuf{w: bufio.NewWriter(w)}
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}
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func (b *Biobuf) Write(p []byte) (int, error) {
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return b.w.Write(p)
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}
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func Bwritestring(b *Biobuf, p string) (int, error) {
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return b.w.WriteString(p)
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}
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func Bseek(b *Biobuf, offset int64, whence int) int64 {
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if b.w != nil {
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if err := b.w.Flush(); err != nil {
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log.Fatalf("writing output: %v", err)
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}
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} else if b.r != nil {
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if whence == 1 {
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offset -= int64(b.r.Buffered())
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}
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}
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off, err := b.f.Seek(offset, whence)
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if err != nil {
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log.Fatalf("seeking in output: %v", err)
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}
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if b.r != nil {
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b.r.Reset(b.f)
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}
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return off
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}
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func Boffset(b *Biobuf) int64 {
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if err := b.w.Flush(); err != nil {
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log.Fatalf("writing output: %v", err)
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}
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off, err := b.f.Seek(0, 1)
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if err != nil {
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log.Fatalf("seeking in output: %v", err)
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}
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return off
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}
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2015-01-19 14:34:58 -05:00
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func (b *Biobuf) Flush() error {
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return b.w.Flush()
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}
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func Bwrite(b *Biobuf, p []byte) (int, error) {
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return b.w.Write(p)
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}
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func Bputc(b *Biobuf, c byte) {
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b.w.WriteByte(c)
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}
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const Beof = -1
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func Bread(b *Biobuf, p []byte) int {
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n, err := io.ReadFull(b.r, p)
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if n == 0 {
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if err != nil && err != io.EOF {
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n = -1
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}
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}
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return n
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}
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func Bgetc(b *Biobuf) int {
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if b.numUnget > 0 {
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b.numUnget--
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return int(b.unget[b.numUnget])
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}
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c, err := b.r.ReadByte()
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r := int(c)
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if err != nil {
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r = -1
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}
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b.unget[1] = b.unget[0]
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b.unget[0] = r
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return r
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}
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func Bgetrune(b *Biobuf) int {
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r, _, err := b.r.ReadRune()
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if err != nil {
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return -1
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}
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return int(r)
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}
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func Bungetrune(b *Biobuf) {
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b.r.UnreadRune()
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}
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func (b *Biobuf) Read(p []byte) (int, error) {
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return b.r.Read(p)
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}
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func Brdline(b *Biobuf, delim int) string {
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s, err := b.r.ReadBytes(byte(delim))
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if err != nil {
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log.Fatalf("reading input: %v", err)
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}
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b.linelen = len(s)
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return string(s)
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}
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func Brdstr(b *Biobuf, delim int, cut int) string {
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s, err := b.r.ReadString(byte(delim))
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if err != nil {
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log.Fatalf("reading input: %v", err)
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}
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if len(s) > 0 && cut > 0 {
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s = s[:len(s)-1]
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}
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return s
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}
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func Access(name string, mode int) int {
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if mode != 0 {
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panic("bad access")
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}
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_, err := os.Stat(name)
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if err != nil {
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return -1
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}
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return 0
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}
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func Blinelen(b *Biobuf) int {
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return b.linelen
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}
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func Bungetc(b *Biobuf) {
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b.numUnget++
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}
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func Bflush(b *Biobuf) error {
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return b.w.Flush()
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}
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[dev.cc] cmd/internal/obj: reconvert from liblink
cmd/internal/obj reconverted using rsc.io/c2go rev 2a95256.
- Brings in new, more regular Prog, Addr definitions
- Add Prog* argument to oclass in liblink/asm[68].c, for c2go conversion.
- Update objwriter for change in TEXT size encoding.
- Merge 5a, 6a, 8a, 9a changes into new5a, new6a, new8a, new9a (by hand).
- Add +build ignore to cmd/asm/internal/{addr,arch,asm}, cmd/asm.
They need to be updated for the changes.
- Reenable verifyAsm in cmd/go.
- Reenable GOOBJ=2 mode by default in liblink.
All architectures build successfully again.
Change-Id: I2c845c5d365aa484b570476898171bee657b626d
Reviewed-on: https://go-review.googlesource.com/3963
Reviewed-by: Rob Pike <r@golang.org>
2015-02-05 03:57:44 -05:00
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func Bterm(b *Biobuf) error {
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var err error
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if b.w != nil {
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err = b.w.Flush()
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}
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[dev.cc] cmd/internal/obj: reconvert from liblink
cmd/internal/obj reconverted using rsc.io/c2go rev 2a95256.
- Brings in new, more regular Prog, Addr definitions
- Add Prog* argument to oclass in liblink/asm[68].c, for c2go conversion.
- Update objwriter for change in TEXT size encoding.
- Merge 5a, 6a, 8a, 9a changes into new5a, new6a, new8a, new9a (by hand).
- Add +build ignore to cmd/asm/internal/{addr,arch,asm}, cmd/asm.
They need to be updated for the changes.
- Reenable verifyAsm in cmd/go.
- Reenable GOOBJ=2 mode by default in liblink.
All architectures build successfully again.
Change-Id: I2c845c5d365aa484b570476898171bee657b626d
Reviewed-on: https://go-review.googlesource.com/3963
Reviewed-by: Rob Pike <r@golang.org>
2015-02-05 03:57:44 -05:00
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err1 := b.f.Close()
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if err == nil {
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err = err1
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}
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return err
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}
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2015-01-21 12:27:36 -05:00
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func envOr(key, value string) string {
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if x := os.Getenv(key); x != "" {
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return x
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}
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return value
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}
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func Getgoroot() string {
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return envOr("GOROOT", defaultGOROOT)
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}
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func Getgoarch() string {
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return envOr("GOARCH", defaultGOARCH)
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}
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func Getgoos() string {
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return envOr("GOOS", defaultGOOS)
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}
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func Getgoarm() string {
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return envOr("GOARM", defaultGOARM)
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}
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func Getgo386() string {
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return envOr("GO386", defaultGO386)
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}
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2015-02-27 22:50:01 -05:00
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func Getgoextlinkenabled() string {
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return envOr("GO_EXTLINK_ENABLED", defaultGO_EXTLINK_ENABLED)
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}
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func Getgoversion() string {
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return version
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}
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func Atoi(s string) int {
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i, _ := strconv.Atoi(s)
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return i
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}
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func (p *Prog) Line() string {
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[dev.cc] cmd/internal/obj: reconvert from liblink
cmd/internal/obj reconverted using rsc.io/c2go rev 2a95256.
- Brings in new, more regular Prog, Addr definitions
- Add Prog* argument to oclass in liblink/asm[68].c, for c2go conversion.
- Update objwriter for change in TEXT size encoding.
- Merge 5a, 6a, 8a, 9a changes into new5a, new6a, new8a, new9a (by hand).
- Add +build ignore to cmd/asm/internal/{addr,arch,asm}, cmd/asm.
They need to be updated for the changes.
- Reenable verifyAsm in cmd/go.
- Reenable GOOBJ=2 mode by default in liblink.
All architectures build successfully again.
Change-Id: I2c845c5d365aa484b570476898171bee657b626d
Reviewed-on: https://go-review.googlesource.com/3963
Reviewed-by: Rob Pike <r@golang.org>
2015-02-05 03:57:44 -05:00
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return Linklinefmt(p.Ctxt, int(p.Lineno), false, false)
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}
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2015-03-05 10:39:23 -08:00
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var armCondCode = []string{
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".EQ",
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".NE",
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".CS",
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".CC",
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".MI",
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".PL",
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".VS",
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".VC",
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".HI",
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".LS",
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".GE",
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".LT",
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".GT",
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".LE",
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"",
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".NV",
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}
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/* ARM scond byte */
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const (
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C_SCOND = (1 << 4) - 1
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C_SBIT = 1 << 4
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|
C_PBIT = 1 << 5
|
|
|
|
|
C_WBIT = 1 << 6
|
|
|
|
|
C_FBIT = 1 << 7
|
|
|
|
|
C_UBIT = 1 << 7
|
|
|
|
|
C_SCOND_XOR = 14
|
|
|
|
|
)
|
|
|
|
|
|
|
|
|
|
// CConv formats ARM condition codes.
|
|
|
|
|
func CConv(s uint8) string {
|
|
|
|
|
if s == 0 {
|
|
|
|
|
return ""
|
|
|
|
|
}
|
|
|
|
|
sc := armCondCode[(s&C_SCOND)^C_SCOND_XOR]
|
|
|
|
|
if s&C_SBIT != 0 {
|
|
|
|
|
sc += ".S"
|
|
|
|
|
}
|
|
|
|
|
if s&C_PBIT != 0 {
|
|
|
|
|
sc += ".P"
|
|
|
|
|
}
|
|
|
|
|
if s&C_WBIT != 0 {
|
|
|
|
|
sc += ".W"
|
|
|
|
|
}
|
|
|
|
|
if s&C_UBIT != 0 { /* ambiguous with FBIT */
|
|
|
|
|
sc += ".U"
|
|
|
|
|
}
|
|
|
|
|
return sc
|
|
|
|
|
}
|
|
|
|
|
|
2015-01-19 14:34:58 -05:00
|
|
|
func (p *Prog) String() string {
|
|
|
|
|
if p.Ctxt == nil {
|
2015-02-28 20:31:32 +00:00
|
|
|
return "<Prog without ctxt>"
|
2015-01-19 14:34:58 -05:00
|
|
|
}
|
2015-03-05 10:39:23 -08:00
|
|
|
|
|
|
|
|
sc := CConv(p.Scond)
|
|
|
|
|
|
|
|
|
|
var buf bytes.Buffer
|
|
|
|
|
|
|
|
|
|
fmt.Fprintf(&buf, "%.5d (%v)\t%v%s", p.Pc, p.Line(), Aconv(int(p.As)), sc)
|
|
|
|
|
sep := "\t"
|
|
|
|
|
if p.From.Type != TYPE_NONE {
|
|
|
|
|
fmt.Fprintf(&buf, "%s%v", sep, Dconv(p, &p.From))
|
|
|
|
|
sep = ", "
|
|
|
|
|
}
|
|
|
|
|
if p.Reg != REG_NONE {
|
|
|
|
|
// Should not happen but might as well show it if it does.
|
|
|
|
|
fmt.Fprintf(&buf, "%s%v", sep, Rconv(int(p.Reg)))
|
|
|
|
|
sep = ", "
|
|
|
|
|
}
|
|
|
|
|
if p.From3.Type != TYPE_NONE {
|
|
|
|
|
if p.From3.Type == TYPE_CONST && (p.As == ADATA || p.As == ATEXT || p.As == AGLOBL) {
|
|
|
|
|
// Special case - omit $.
|
|
|
|
|
fmt.Fprintf(&buf, "%s%d", sep, p.From3.Offset)
|
|
|
|
|
} else {
|
|
|
|
|
fmt.Fprintf(&buf, "%s%v", sep, Dconv(p, &p.From3))
|
|
|
|
|
}
|
|
|
|
|
sep = ", "
|
|
|
|
|
}
|
|
|
|
|
if p.To.Type != TYPE_NONE {
|
|
|
|
|
fmt.Fprintf(&buf, "%s%v", sep, Dconv(p, &p.To))
|
|
|
|
|
}
|
cmd/internal/obj, cmd/internal/obj/arm64: add support for GOARCH=arm64
ARM64 (ARMv8) has 32 general purpose, 64-bit integer registers
(R0-R31), 32 64-bit scalar floating point registers (F0-F31), and
32 128-bit vector registers (unused, V0-V31).
R31 is either the stack pointer (RSP), or the zero register (ZR),
depending on the instruction. Note the distinction between the
hardware stack pointer, RSP, and the virtual stack pointer SP.
The (hardware) stack pointer must be 16-byte aligned at all times;
the RSP register itself must be aligned, offset(RSP) only has to
have natural alignment.
Instructions are fixed-width, and are 32-bit wide. ARM64 supports
ARMv7 too (32-bit ARM), but not in the same process. In general,
there is not much in common between 32-bit ARM and ARM64, it's a
new architecture.
All implementations have floating point instructions.
This change adds a Prog.To3 field analogous to Prog.To. It is used
by exclusive load/store instructions such as STLXR which read from
one register, and write to both a register and a memory address.
STLXRW R1, (R0), R3
This will store the word contained in R1 to the memory address
pointed by R0. R3 will be updated with the status result of the
store. It is used to implement atomic operations.
No other changes are made to the portable Prog and Addr structures.
Change-Id: Ie839029aa5265bbad35769d9689eca11e1c48c47
Reviewed-on: https://go-review.googlesource.com/7046
Reviewed-by: Russ Cox <rsc@golang.org>
2015-03-08 13:58:16 +01:00
|
|
|
if p.To2.Type != TYPE_NONE {
|
|
|
|
|
fmt.Fprintf(&buf, "%s%v", sep, Dconv(p, &p.To2))
|
|
|
|
|
}
|
2015-03-05 10:39:23 -08:00
|
|
|
return buf.String()
|
2015-01-19 14:34:58 -05:00
|
|
|
}
|
2015-01-21 21:45:29 -05:00
|
|
|
|
|
|
|
|
func (ctxt *Link) NewProg() *Prog {
|
[dev.cc] cmd/internal/obj: reconvert from liblink
cmd/internal/obj reconverted using rsc.io/c2go rev 2a95256.
- Brings in new, more regular Prog, Addr definitions
- Add Prog* argument to oclass in liblink/asm[68].c, for c2go conversion.
- Update objwriter for change in TEXT size encoding.
- Merge 5a, 6a, 8a, 9a changes into new5a, new6a, new8a, new9a (by hand).
- Add +build ignore to cmd/asm/internal/{addr,arch,asm}, cmd/asm.
They need to be updated for the changes.
- Reenable verifyAsm in cmd/go.
- Reenable GOOBJ=2 mode by default in liblink.
All architectures build successfully again.
Change-Id: I2c845c5d365aa484b570476898171bee657b626d
Reviewed-on: https://go-review.googlesource.com/3963
Reviewed-by: Rob Pike <r@golang.org>
2015-02-05 03:57:44 -05:00
|
|
|
p := new(Prog) // should be the only call to this; all others should use ctxt.NewProg
|
2015-01-21 21:45:29 -05:00
|
|
|
p.Ctxt = ctxt
|
|
|
|
|
return p
|
|
|
|
|
}
|
[dev.cc] cmd/internal/obj: reconvert from liblink
cmd/internal/obj reconverted using rsc.io/c2go rev 2a95256.
- Brings in new, more regular Prog, Addr definitions
- Add Prog* argument to oclass in liblink/asm[68].c, for c2go conversion.
- Update objwriter for change in TEXT size encoding.
- Merge 5a, 6a, 8a, 9a changes into new5a, new6a, new8a, new9a (by hand).
- Add +build ignore to cmd/asm/internal/{addr,arch,asm}, cmd/asm.
They need to be updated for the changes.
- Reenable verifyAsm in cmd/go.
- Reenable GOOBJ=2 mode by default in liblink.
All architectures build successfully again.
Change-Id: I2c845c5d365aa484b570476898171bee657b626d
Reviewed-on: https://go-review.googlesource.com/3963
Reviewed-by: Rob Pike <r@golang.org>
2015-02-05 03:57:44 -05:00
|
|
|
|
|
|
|
|
func (ctxt *Link) Line(n int) string {
|
|
|
|
|
return Linklinefmt(ctxt, n, false, false)
|
|
|
|
|
}
|
2015-02-13 14:40:36 -05:00
|
|
|
|
|
|
|
|
func Getcallerpc(interface{}) uintptr {
|
|
|
|
|
return 1
|
|
|
|
|
}
|
2015-02-25 09:07:02 -08:00
|
|
|
|
|
|
|
|
func (ctxt *Link) Dconv(a *Addr) string {
|
2015-02-26 17:09:16 -08:00
|
|
|
return Dconv(nil, a)
|
2015-02-25 09:07:02 -08:00
|
|
|
}
|
|
|
|
|
|
2015-02-26 17:09:16 -08:00
|
|
|
func Dconv(p *Prog, a *Addr) string {
|
2015-02-25 09:07:02 -08:00
|
|
|
var str string
|
|
|
|
|
|
|
|
|
|
switch a.Type {
|
|
|
|
|
default:
|
|
|
|
|
str = fmt.Sprintf("type=%d", a.Type)
|
|
|
|
|
|
|
|
|
|
case TYPE_NONE:
|
|
|
|
|
str = ""
|
|
|
|
|
if a.Name != NAME_NONE || a.Reg != 0 || a.Sym != nil {
|
2015-02-26 17:09:16 -08:00
|
|
|
str = fmt.Sprintf("%v(%v)(NONE)", Mconv(a), Rconv(int(a.Reg)))
|
2015-02-25 09:07:02 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case TYPE_REG:
|
|
|
|
|
// TODO(rsc): This special case is for x86 instructions like
|
|
|
|
|
// PINSRQ CX,$1,X6
|
|
|
|
|
// where the $1 is included in the p->to Addr.
|
|
|
|
|
// Move into a new field.
|
|
|
|
|
if a.Offset != 0 {
|
|
|
|
|
str = fmt.Sprintf("$%d,%v", a.Offset, Rconv(int(a.Reg)))
|
|
|
|
|
break
|
|
|
|
|
}
|
|
|
|
|
|
2015-04-20 13:50:46 -07:00
|
|
|
str = Rconv(int(a.Reg))
|
2015-02-25 09:07:02 -08:00
|
|
|
if a.Name != TYPE_NONE || a.Sym != nil {
|
2015-02-26 17:09:16 -08:00
|
|
|
str = fmt.Sprintf("%v(%v)(REG)", Mconv(a), Rconv(int(a.Reg)))
|
2015-02-25 09:07:02 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case TYPE_BRANCH:
|
|
|
|
|
if a.Sym != nil {
|
|
|
|
|
str = fmt.Sprintf("%s(SB)", a.Sym.Name)
|
|
|
|
|
} else if p != nil && p.Pcond != nil {
|
2015-04-20 13:50:46 -07:00
|
|
|
str = fmt.Sprint(p.Pcond.Pc)
|
2015-03-16 15:54:44 -04:00
|
|
|
} else if a.Val != nil {
|
2015-04-20 13:50:46 -07:00
|
|
|
str = fmt.Sprint(a.Val.(*Prog).Pc)
|
2015-02-25 09:07:02 -08:00
|
|
|
} else {
|
|
|
|
|
str = fmt.Sprintf("%d(PC)", a.Offset)
|
|
|
|
|
}
|
|
|
|
|
|
2015-02-26 10:58:48 -08:00
|
|
|
case TYPE_INDIR:
|
2015-02-26 17:09:16 -08:00
|
|
|
str = fmt.Sprintf("*%s", Mconv(a))
|
2015-02-26 10:58:48 -08:00
|
|
|
|
2015-02-25 09:07:02 -08:00
|
|
|
case TYPE_MEM:
|
2015-02-26 17:09:16 -08:00
|
|
|
str = Mconv(a)
|
2015-02-25 09:07:02 -08:00
|
|
|
if a.Index != REG_NONE {
|
|
|
|
|
str += fmt.Sprintf("(%v*%d)", Rconv(int(a.Index)), int(a.Scale))
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case TYPE_CONST:
|
|
|
|
|
if a.Reg != 0 {
|
2015-02-26 17:09:16 -08:00
|
|
|
str = fmt.Sprintf("$%v(%v)", Mconv(a), Rconv(int(a.Reg)))
|
2015-02-25 09:07:02 -08:00
|
|
|
} else {
|
2015-02-26 17:09:16 -08:00
|
|
|
str = fmt.Sprintf("$%v", Mconv(a))
|
2015-02-25 09:07:02 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case TYPE_TEXTSIZE:
|
2015-03-16 15:54:44 -04:00
|
|
|
if a.Val.(int32) == ArgsSizeUnknown {
|
2015-02-25 09:07:02 -08:00
|
|
|
str = fmt.Sprintf("$%d", a.Offset)
|
|
|
|
|
} else {
|
2015-03-16 15:54:44 -04:00
|
|
|
str = fmt.Sprintf("$%d-%d", a.Offset, a.Val.(int32))
|
2015-02-25 09:07:02 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case TYPE_FCONST:
|
2015-03-16 15:54:44 -04:00
|
|
|
str = fmt.Sprintf("%.17g", a.Val.(float64))
|
2015-02-25 09:07:02 -08:00
|
|
|
// Make sure 1 prints as 1.0
|
|
|
|
|
if !strings.ContainsAny(str, ".e") {
|
|
|
|
|
str += ".0"
|
|
|
|
|
}
|
|
|
|
|
str = fmt.Sprintf("$(%s)", str)
|
|
|
|
|
|
|
|
|
|
case TYPE_SCONST:
|
2015-03-16 15:54:44 -04:00
|
|
|
str = fmt.Sprintf("$%q", a.Val.(string))
|
2015-02-25 09:07:02 -08:00
|
|
|
|
|
|
|
|
case TYPE_ADDR:
|
2015-02-26 17:09:16 -08:00
|
|
|
str = fmt.Sprintf("$%s", Mconv(a))
|
2015-02-25 09:07:02 -08:00
|
|
|
|
|
|
|
|
case TYPE_SHIFT:
|
|
|
|
|
v := int(a.Offset)
|
|
|
|
|
op := string("<<>>->@>"[((v>>5)&3)<<1:])
|
|
|
|
|
if v&(1<<4) != 0 {
|
|
|
|
|
str = fmt.Sprintf("R%d%c%cR%d", v&15, op[0], op[1], (v>>8)&15)
|
|
|
|
|
} else {
|
|
|
|
|
str = fmt.Sprintf("R%d%c%c%d", v&15, op[0], op[1], (v>>7)&31)
|
|
|
|
|
}
|
|
|
|
|
if a.Reg != 0 {
|
|
|
|
|
str += fmt.Sprintf("(%v)", Rconv(int(a.Reg)))
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case TYPE_REGREG:
|
|
|
|
|
str = fmt.Sprintf("(%v, %v)", Rconv(int(a.Reg)), Rconv(int(a.Offset)))
|
|
|
|
|
|
|
|
|
|
case TYPE_REGREG2:
|
|
|
|
|
str = fmt.Sprintf("%v, %v", Rconv(int(a.Reg)), Rconv(int(a.Offset)))
|
2015-02-27 13:50:26 -08:00
|
|
|
|
|
|
|
|
case TYPE_REGLIST:
|
|
|
|
|
str = regListConv(int(a.Offset))
|
2015-02-25 09:07:02 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return str
|
|
|
|
|
}
|
|
|
|
|
|
2015-02-26 17:09:16 -08:00
|
|
|
func Mconv(a *Addr) string {
|
2015-02-25 09:07:02 -08:00
|
|
|
var str string
|
|
|
|
|
|
|
|
|
|
switch a.Name {
|
|
|
|
|
default:
|
|
|
|
|
str = fmt.Sprintf("name=%d", a.Name)
|
|
|
|
|
|
|
|
|
|
case NAME_NONE:
|
|
|
|
|
switch {
|
|
|
|
|
case a.Reg == REG_NONE:
|
2015-04-20 13:50:46 -07:00
|
|
|
str = fmt.Sprint(a.Offset)
|
2015-02-25 09:07:02 -08:00
|
|
|
case a.Offset == 0:
|
|
|
|
|
str = fmt.Sprintf("(%v)", Rconv(int(a.Reg)))
|
|
|
|
|
case a.Offset != 0:
|
|
|
|
|
str = fmt.Sprintf("%d(%v)", a.Offset, Rconv(int(a.Reg)))
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case NAME_EXTERN:
|
|
|
|
|
str = fmt.Sprintf("%s%s(SB)", a.Sym.Name, offConv(a.Offset))
|
|
|
|
|
|
2015-03-30 00:49:25 +00:00
|
|
|
case NAME_GOTREF:
|
|
|
|
|
str = fmt.Sprintf("%s%s@GOT(SB)", a.Sym.Name, offConv(a.Offset))
|
|
|
|
|
|
2015-02-25 09:07:02 -08:00
|
|
|
case NAME_STATIC:
|
|
|
|
|
str = fmt.Sprintf("%s<>%s(SB)", a.Sym.Name, offConv(a.Offset))
|
|
|
|
|
|
|
|
|
|
case NAME_AUTO:
|
|
|
|
|
if a.Sym != nil {
|
|
|
|
|
str = fmt.Sprintf("%s%s(SP)", a.Sym.Name, offConv(a.Offset))
|
|
|
|
|
} else {
|
|
|
|
|
str = fmt.Sprintf("%s(SP)", offConv(a.Offset))
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case NAME_PARAM:
|
|
|
|
|
if a.Sym != nil {
|
|
|
|
|
str = fmt.Sprintf("%s%s(FP)", a.Sym.Name, offConv(a.Offset))
|
|
|
|
|
} else {
|
|
|
|
|
str = fmt.Sprintf("%s(FP)", offConv(a.Offset))
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
return str
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
func offConv(off int64) string {
|
|
|
|
|
if off == 0 {
|
|
|
|
|
return ""
|
|
|
|
|
}
|
|
|
|
|
return fmt.Sprintf("%+d", off)
|
|
|
|
|
}
|
2015-02-26 17:09:16 -08:00
|
|
|
|
|
|
|
|
type regSet struct {
|
|
|
|
|
lo int
|
|
|
|
|
hi int
|
|
|
|
|
Rconv func(int) string
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Few enough architectures that a linear scan is fastest.
|
|
|
|
|
// Not even worth sorting.
|
|
|
|
|
var regSpace []regSet
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
Each architecture defines a register space as a unique
|
|
|
|
|
integer range.
|
|
|
|
|
Here is the list of architectures and the base of their register spaces.
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
const (
|
|
|
|
|
// Because of masking operations in the encodings, each register
|
|
|
|
|
// space should start at 0 modulo some power of 2.
|
|
|
|
|
RBase386 = 1 * 1024
|
|
|
|
|
RBaseAMD64 = 2 * 1024
|
|
|
|
|
RBaseARM = 3 * 1024
|
cmd/internal/obj, cmd/internal/obj/arm64: add support for GOARCH=arm64
ARM64 (ARMv8) has 32 general purpose, 64-bit integer registers
(R0-R31), 32 64-bit scalar floating point registers (F0-F31), and
32 128-bit vector registers (unused, V0-V31).
R31 is either the stack pointer (RSP), or the zero register (ZR),
depending on the instruction. Note the distinction between the
hardware stack pointer, RSP, and the virtual stack pointer SP.
The (hardware) stack pointer must be 16-byte aligned at all times;
the RSP register itself must be aligned, offset(RSP) only has to
have natural alignment.
Instructions are fixed-width, and are 32-bit wide. ARM64 supports
ARMv7 too (32-bit ARM), but not in the same process. In general,
there is not much in common between 32-bit ARM and ARM64, it's a
new architecture.
All implementations have floating point instructions.
This change adds a Prog.To3 field analogous to Prog.To. It is used
by exclusive load/store instructions such as STLXR which read from
one register, and write to both a register and a memory address.
STLXRW R1, (R0), R3
This will store the word contained in R1 to the memory address
pointed by R0. R3 will be updated with the status result of the
store. It is used to implement atomic operations.
No other changes are made to the portable Prog and Addr structures.
Change-Id: Ie839029aa5265bbad35769d9689eca11e1c48c47
Reviewed-on: https://go-review.googlesource.com/7046
Reviewed-by: Russ Cox <rsc@golang.org>
2015-03-08 13:58:16 +01:00
|
|
|
RBasePPC64 = 4 * 1024 // range [4k, 8k)
|
|
|
|
|
RBaseARM64 = 8 * 1024 // range [8k, 12k)
|
2015-02-26 17:09:16 -08:00
|
|
|
)
|
|
|
|
|
|
|
|
|
|
// RegisterRegister binds a pretty-printer (Rconv) for register
|
|
|
|
|
// numbers to a given register number range. Lo is inclusive,
|
|
|
|
|
// hi exclusive (valid registers are lo through hi-1).
|
|
|
|
|
func RegisterRegister(lo, hi int, Rconv func(int) string) {
|
|
|
|
|
regSpace = append(regSpace, regSet{lo, hi, Rconv})
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
func Rconv(reg int) string {
|
|
|
|
|
if reg == REG_NONE {
|
|
|
|
|
return "NONE"
|
|
|
|
|
}
|
|
|
|
|
for i := range regSpace {
|
|
|
|
|
rs := ®Space[i]
|
|
|
|
|
if rs.lo <= reg && reg < rs.hi {
|
|
|
|
|
return rs.Rconv(reg)
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
return fmt.Sprintf("R???%d", reg)
|
|
|
|
|
}
|
2015-02-27 13:50:26 -08:00
|
|
|
|
|
|
|
|
func regListConv(list int) string {
|
|
|
|
|
str := ""
|
|
|
|
|
|
|
|
|
|
for i := 0; i < 16; i++ { // TODO: 16 is ARM-specific.
|
|
|
|
|
if list&(1<<uint(i)) != 0 {
|
|
|
|
|
if str == "" {
|
|
|
|
|
str += "["
|
|
|
|
|
} else {
|
|
|
|
|
str += ","
|
|
|
|
|
}
|
|
|
|
|
// This is ARM-specific; R10 is g.
|
|
|
|
|
if i == 10 {
|
|
|
|
|
str += "g"
|
|
|
|
|
} else {
|
|
|
|
|
str += fmt.Sprintf("R%d", i)
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
str += "]"
|
|
|
|
|
return str
|
|
|
|
|
}
|
2015-03-02 20:17:20 -08:00
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
Each architecture defines an instruction (A*) space as a unique
|
|
|
|
|
integer range.
|
|
|
|
|
Global opcodes like CALL start at 0; the architecture-specific ones
|
|
|
|
|
start at a distinct, big-maskable offsets.
|
|
|
|
|
Here is the list of architectures and the base of their opcode spaces.
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
const (
|
|
|
|
|
ABase386 = (1 + iota) << 12
|
|
|
|
|
ABaseARM
|
|
|
|
|
ABaseAMD64
|
|
|
|
|
ABasePPC64
|
cmd/internal/obj, cmd/internal/obj/arm64: add support for GOARCH=arm64
ARM64 (ARMv8) has 32 general purpose, 64-bit integer registers
(R0-R31), 32 64-bit scalar floating point registers (F0-F31), and
32 128-bit vector registers (unused, V0-V31).
R31 is either the stack pointer (RSP), or the zero register (ZR),
depending on the instruction. Note the distinction between the
hardware stack pointer, RSP, and the virtual stack pointer SP.
The (hardware) stack pointer must be 16-byte aligned at all times;
the RSP register itself must be aligned, offset(RSP) only has to
have natural alignment.
Instructions are fixed-width, and are 32-bit wide. ARM64 supports
ARMv7 too (32-bit ARM), but not in the same process. In general,
there is not much in common between 32-bit ARM and ARM64, it's a
new architecture.
All implementations have floating point instructions.
This change adds a Prog.To3 field analogous to Prog.To. It is used
by exclusive load/store instructions such as STLXR which read from
one register, and write to both a register and a memory address.
STLXRW R1, (R0), R3
This will store the word contained in R1 to the memory address
pointed by R0. R3 will be updated with the status result of the
store. It is used to implement atomic operations.
No other changes are made to the portable Prog and Addr structures.
Change-Id: Ie839029aa5265bbad35769d9689eca11e1c48c47
Reviewed-on: https://go-review.googlesource.com/7046
Reviewed-by: Russ Cox <rsc@golang.org>
2015-03-08 13:58:16 +01:00
|
|
|
ABaseARM64
|
2015-03-02 20:17:20 -08:00
|
|
|
AMask = 1<<12 - 1 // AND with this to use the opcode as an array index.
|
|
|
|
|
)
|
|
|
|
|
|
|
|
|
|
type opSet struct {
|
|
|
|
|
lo int
|
|
|
|
|
names []string
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Not even worth sorting
|
|
|
|
|
var aSpace []opSet
|
|
|
|
|
|
|
|
|
|
// RegisterOpcode binds a list of instruction names
|
|
|
|
|
// to a given instruction number range.
|
|
|
|
|
func RegisterOpcode(lo int, Anames []string) {
|
|
|
|
|
aSpace = append(aSpace, opSet{lo, Anames})
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
func Aconv(a int) string {
|
|
|
|
|
if a < A_ARCHSPECIFIC {
|
|
|
|
|
return Anames[a]
|
|
|
|
|
}
|
|
|
|
|
for i := range aSpace {
|
|
|
|
|
as := &aSpace[i]
|
|
|
|
|
if as.lo <= a && a < as.lo+len(as.names) {
|
|
|
|
|
return as.names[a-as.lo]
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
return fmt.Sprintf("A???%d", a)
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
var Anames = []string{
|
|
|
|
|
"XXX",
|
|
|
|
|
"CALL",
|
|
|
|
|
"CHECKNIL",
|
|
|
|
|
"DATA",
|
|
|
|
|
"DUFFCOPY",
|
|
|
|
|
"DUFFZERO",
|
|
|
|
|
"END",
|
|
|
|
|
"FUNCDATA",
|
|
|
|
|
"GLOBL",
|
|
|
|
|
"JMP",
|
|
|
|
|
"NOP",
|
|
|
|
|
"PCDATA",
|
|
|
|
|
"RET",
|
|
|
|
|
"TEXT",
|
|
|
|
|
"TYPE",
|
|
|
|
|
"UNDEF",
|
|
|
|
|
"USEFIELD",
|
|
|
|
|
"VARDEF",
|
|
|
|
|
"VARKILL",
|
|
|
|
|
}
|