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go/src/cmd/compile/internal/amd64/simdssa.go

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[dev.simd] cmd/compile: generated codes for amd64 SIMD This CL is generated by tool in CL 667155. Change-Id: I3829d0d2c96fe7000e2dd025a3006f96957d777a Reviewed-on: https://go-review.googlesource.com/c/go/+/675618 Reviewed-by: Junyang Shao <shaojunyang@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-05-22 19:59:12 +00:00
// Code generated by x/arch/internal/simdgen using 'go run . -xedPath $XED_PATH -o godefs -goroot $GOROOT go.yaml types.yaml categories.yaml'; DO NOT EDIT.
[dev.simd] cmd/compile: adapters for simd This combines several CLs into a single patch of "glue" for the generated SIMD extensions. This glue includes GOEXPERIMENT checks that disable the creation of user-visible "simd" types and that disable the registration of "simd" intrinsics. The simd type checks were changed to work for either package "simd" or "internal/simd" so that moving that package won't be quite so fragile. cmd/compile, internal/simd: glue for adding SIMD extensions to Go cmd/compile: theft of Cherry's sample SIMD compilation Change-Id: Id44e2f4bafe74032c26de576a8691b6f7d977e01 Reviewed-on: https://go-review.googlesource.com/c/go/+/675598 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-03-31 10:45:23 +11:00
package amd64
import (
"cmd/compile/internal/ssa"
"cmd/compile/internal/ssagen"
[dev.simd] cmd/compile: generated codes for amd64 SIMD This CL is generated by tool in CL 667155. Change-Id: I3829d0d2c96fe7000e2dd025a3006f96957d777a Reviewed-on: https://go-review.googlesource.com/c/go/+/675618 Reviewed-by: Junyang Shao <shaojunyang@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-05-22 19:59:12 +00:00
"cmd/internal/obj"
"cmd/internal/obj/x86"
[dev.simd] cmd/compile: adapters for simd This combines several CLs into a single patch of "glue" for the generated SIMD extensions. This glue includes GOEXPERIMENT checks that disable the creation of user-visible "simd" types and that disable the registration of "simd" intrinsics. The simd type checks were changed to work for either package "simd" or "internal/simd" so that moving that package won't be quite so fragile. cmd/compile, internal/simd: glue for adding SIMD extensions to Go cmd/compile: theft of Cherry's sample SIMD compilation Change-Id: Id44e2f4bafe74032c26de576a8691b6f7d977e01 Reviewed-on: https://go-review.googlesource.com/c/go/+/675598 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-03-31 10:45:23 +11:00
)
func ssaGenSIMDValue(s *ssagen.State, v *ssa.Value) bool {
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
var p *obj.Prog
[dev.simd] cmd/compile: adapters for simd This combines several CLs into a single patch of "glue" for the generated SIMD extensions. This glue includes GOEXPERIMENT checks that disable the creation of user-visible "simd" types and that disable the registration of "simd" intrinsics. The simd type checks were changed to work for either package "simd" or "internal/simd" so that moving that package won't be quite so fragile. cmd/compile, internal/simd: glue for adding SIMD extensions to Go cmd/compile: theft of Cherry's sample SIMD compilation Change-Id: Id44e2f4bafe74032c26de576a8691b6f7d977e01 Reviewed-on: https://go-review.googlesource.com/c/go/+/675598 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-03-31 10:45:23 +11:00
switch v.Op {
[dev.simd] cmd/compile, simd: add AES instructions AVXAES is a composite feature set, Intel did listed it as "AVXAES" in the XED data instead of separating them. The tests will be in the next CL. Change-Id: I89c97261f2228b2fdafb48f63e82ef6239bdd5ca Reviewed-on: https://go-review.googlesource.com/c/go/+/706055 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-09-23 05:16:30 +00:00
case ssa.OpAMD64VAESIMC128,
ssa.OpAMD64VPABSB128,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPABSB256,
ssa.OpAMD64VPABSB512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPABSW128,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPABSW256,
ssa.OpAMD64VPABSW512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPABSD128,
ssa.OpAMD64VPABSD256,
ssa.OpAMD64VPABSD512,
ssa.OpAMD64VPABSQ128,
ssa.OpAMD64VPABSQ256,
ssa.OpAMD64VPABSQ512,
[dev.simd] simd, cmd/compile: generated code for Broadcast Generated by simdgen CL 693599 This turned out to require some additional work in other places, including filling in missing methods (use OverwriteBase to get FP versions). Also includes a test. Change-Id: I2efe8967837834745f9cae661d4d4dcbb5390b6f Reviewed-on: https://go-review.googlesource.com/c/go/+/693758 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-08-05 17:34:05 -04:00
ssa.OpAMD64VBROADCASTSS128,
ssa.OpAMD64VPBROADCASTQ128,
ssa.OpAMD64VPBROADCASTB128,
ssa.OpAMD64VPBROADCASTW128,
ssa.OpAMD64VPBROADCASTD128,
ssa.OpAMD64VBROADCASTSS256,
ssa.OpAMD64VBROADCASTSD256,
ssa.OpAMD64VPBROADCASTB256,
ssa.OpAMD64VPBROADCASTW256,
ssa.OpAMD64VPBROADCASTD256,
ssa.OpAMD64VPBROADCASTQ256,
ssa.OpAMD64VBROADCASTSS512,
ssa.OpAMD64VBROADCASTSD512,
ssa.OpAMD64VPBROADCASTB512,
ssa.OpAMD64VPBROADCASTW512,
ssa.OpAMD64VPBROADCASTD512,
ssa.OpAMD64VPBROADCASTQ512,
[dev.simd] cmd/compile, simd: complete truncating u?int conversions. Downsizing conversions' truncating version complete. Saturation ver not done. Change-Id: I710976c2b5329e2882763d60fcef2a827213df09 Reviewed-on: https://go-review.googlesource.com/c/go/+/697975 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 04:33:46 +00:00
ssa.OpAMD64VPMOVWB128,
ssa.OpAMD64VPMOVWB256,
ssa.OpAMD64VPMOVDB128,
ssa.OpAMD64VPMOVQB128,
[dev.simd] cmd/compile, simd: add saturated u?int conversions Change-Id: I0c7f2d7ec31c59c95568ff8d4560989de849427e Reviewed-on: https://go-review.googlesource.com/c/go/+/698235 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 17:33:50 +00:00
ssa.OpAMD64VPMOVSWB128,
ssa.OpAMD64VPMOVSWB256,
ssa.OpAMD64VPMOVSDB128,
ssa.OpAMD64VPMOVSQB128,
[dev.simd] cmd/compile, simd: complete u?int widening conversions Change-Id: I21da09261b6b278768d99229fe2db387aef1e812 Reviewed-on: https://go-review.googlesource.com/c/go/+/697915 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 02:47:53 +00:00
ssa.OpAMD64VPMOVSXBW256,
ssa.OpAMD64VPMOVSXBW512,
[dev.simd] cmd/compile, simd: complete truncating u?int conversions. Downsizing conversions' truncating version complete. Saturation ver not done. Change-Id: I710976c2b5329e2882763d60fcef2a827213df09 Reviewed-on: https://go-review.googlesource.com/c/go/+/697975 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 04:33:46 +00:00
ssa.OpAMD64VPMOVDW128,
ssa.OpAMD64VPMOVDW256,
ssa.OpAMD64VPMOVQW128,
[dev.simd] cmd/compile, simd: add saturated u?int conversions Change-Id: I0c7f2d7ec31c59c95568ff8d4560989de849427e Reviewed-on: https://go-review.googlesource.com/c/go/+/698235 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 17:33:50 +00:00
ssa.OpAMD64VPMOVSDW128,
ssa.OpAMD64VPMOVSDW256,
ssa.OpAMD64VPMOVSQW128,
[dev.simd] cmd/compile, simd: complete u?int widening conversions Change-Id: I21da09261b6b278768d99229fe2db387aef1e812 Reviewed-on: https://go-review.googlesource.com/c/go/+/697915 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 02:47:53 +00:00
ssa.OpAMD64VPMOVSXBW128,
[dev.simd] cmd/compile: generated simd code to add some conversions Generated by arch/internal/simdgen CL 689735 A small number of conversions for testing purposes Change-Id: I4d52c643d08c02794c3fea9778bb1ecbb5507de4 Reviewed-on: https://go-review.googlesource.com/c/go/+/689716 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-22 15:02:45 -04:00
ssa.OpAMD64VCVTTPS2DQ128,
ssa.OpAMD64VCVTTPS2DQ256,
ssa.OpAMD64VCVTTPS2DQ512,
[dev.simd] cmd/compile, simd: complete u?int widening conversions Change-Id: I21da09261b6b278768d99229fe2db387aef1e812 Reviewed-on: https://go-review.googlesource.com/c/go/+/697915 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 02:47:53 +00:00
ssa.OpAMD64VPMOVSXBD512,
ssa.OpAMD64VPMOVSXWD256,
ssa.OpAMD64VPMOVSXWD512,
[dev.simd] cmd/compile, simd: complete truncating u?int conversions. Downsizing conversions' truncating version complete. Saturation ver not done. Change-Id: I710976c2b5329e2882763d60fcef2a827213df09 Reviewed-on: https://go-review.googlesource.com/c/go/+/697975 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 04:33:46 +00:00
ssa.OpAMD64VPMOVQD128,
ssa.OpAMD64VPMOVQD256,
[dev.simd] cmd/compile, simd: add saturated u?int conversions Change-Id: I0c7f2d7ec31c59c95568ff8d4560989de849427e Reviewed-on: https://go-review.googlesource.com/c/go/+/698235 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 17:33:50 +00:00
ssa.OpAMD64VPMOVSQD128,
ssa.OpAMD64VPMOVSQD256,
[dev.simd] cmd/compile, simd: complete u?int widening conversions Change-Id: I21da09261b6b278768d99229fe2db387aef1e812 Reviewed-on: https://go-review.googlesource.com/c/go/+/697915 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 02:47:53 +00:00
ssa.OpAMD64VPMOVSXBD128,
ssa.OpAMD64VPMOVSXWD128,
ssa.OpAMD64VPMOVSXBD256,
ssa.OpAMD64VPMOVSXWQ512,
ssa.OpAMD64VPMOVSXDQ256,
ssa.OpAMD64VPMOVSXDQ512,
ssa.OpAMD64VPMOVSXBQ128,
ssa.OpAMD64VPMOVSXWQ128,
ssa.OpAMD64VPMOVSXDQ128,
ssa.OpAMD64VPMOVSXBQ256,
ssa.OpAMD64VPMOVSXBQ512,
[dev.simd] cmd/compile, simd: add saturated u?int conversions Change-Id: I0c7f2d7ec31c59c95568ff8d4560989de849427e Reviewed-on: https://go-review.googlesource.com/c/go/+/698235 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 17:33:50 +00:00
ssa.OpAMD64VPMOVUSWB128,
ssa.OpAMD64VPMOVUSWB256,
ssa.OpAMD64VPMOVUSDB128,
ssa.OpAMD64VPMOVUSQB128,
[dev.simd] simd, cmd/compile: add widening unsigned converts 8->16->32 Change-Id: If0bde7154bd622573375eba5539fd642b8ef9d2f Reviewed-on: https://go-review.googlesource.com/c/go/+/696555 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-08-15 17:05:05 -04:00
ssa.OpAMD64VPMOVZXBW256,
ssa.OpAMD64VPMOVZXBW512,
[dev.simd] cmd/compile, simd: add saturated u?int conversions Change-Id: I0c7f2d7ec31c59c95568ff8d4560989de849427e Reviewed-on: https://go-review.googlesource.com/c/go/+/698235 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 17:33:50 +00:00
ssa.OpAMD64VPMOVUSDW128,
ssa.OpAMD64VPMOVUSDW256,
ssa.OpAMD64VPMOVUSQW128,
[dev.simd] simd, cmd/compile: add widening unsigned converts 8->16->32 Change-Id: If0bde7154bd622573375eba5539fd642b8ef9d2f Reviewed-on: https://go-review.googlesource.com/c/go/+/696555 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-08-15 17:05:05 -04:00
ssa.OpAMD64VPMOVZXBW128,
[dev.simd] cmd/compile: generated simd code to add some conversions Generated by arch/internal/simdgen CL 689735 A small number of conversions for testing purposes Change-Id: I4d52c643d08c02794c3fea9778bb1ecbb5507de4 Reviewed-on: https://go-review.googlesource.com/c/go/+/689716 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-22 15:02:45 -04:00
ssa.OpAMD64VCVTPS2UDQ128,
ssa.OpAMD64VCVTPS2UDQ256,
ssa.OpAMD64VCVTPS2UDQ512,
[dev.simd] cmd/compile, simd: complete u?int widening conversions Change-Id: I21da09261b6b278768d99229fe2db387aef1e812 Reviewed-on: https://go-review.googlesource.com/c/go/+/697915 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 02:47:53 +00:00
ssa.OpAMD64VPMOVZXBD512,
[dev.simd] simd, cmd/compile: add widening unsigned converts 8->16->32 Change-Id: If0bde7154bd622573375eba5539fd642b8ef9d2f Reviewed-on: https://go-review.googlesource.com/c/go/+/696555 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-08-15 17:05:05 -04:00
ssa.OpAMD64VPMOVZXWD256,
ssa.OpAMD64VPMOVZXWD512,
[dev.simd] cmd/compile, simd: add saturated u?int conversions Change-Id: I0c7f2d7ec31c59c95568ff8d4560989de849427e Reviewed-on: https://go-review.googlesource.com/c/go/+/698235 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 17:33:50 +00:00
ssa.OpAMD64VPMOVUSQD128,
ssa.OpAMD64VPMOVUSQD256,
[dev.simd] cmd/compile, simd: complete u?int widening conversions Change-Id: I21da09261b6b278768d99229fe2db387aef1e812 Reviewed-on: https://go-review.googlesource.com/c/go/+/697915 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 02:47:53 +00:00
ssa.OpAMD64VPMOVZXBD128,
[dev.simd] simd, cmd/compile: add widening unsigned converts 8->16->32 Change-Id: If0bde7154bd622573375eba5539fd642b8ef9d2f Reviewed-on: https://go-review.googlesource.com/c/go/+/696555 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-08-15 17:05:05 -04:00
ssa.OpAMD64VPMOVZXWD128,
[dev.simd] cmd/compile, simd: complete u?int widening conversions Change-Id: I21da09261b6b278768d99229fe2db387aef1e812 Reviewed-on: https://go-review.googlesource.com/c/go/+/697915 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 02:47:53 +00:00
ssa.OpAMD64VPMOVZXBD256,
ssa.OpAMD64VPMOVZXWQ512,
ssa.OpAMD64VPMOVZXDQ256,
ssa.OpAMD64VPMOVZXDQ512,
ssa.OpAMD64VPMOVZXBQ128,
ssa.OpAMD64VPMOVZXWQ128,
ssa.OpAMD64VPMOVZXDQ128,
ssa.OpAMD64VPMOVSXWQ256,
ssa.OpAMD64VPMOVZXBQ256,
ssa.OpAMD64VPMOVZXWQ256,
ssa.OpAMD64VPMOVZXBQ512,
[dev.simd] cmd/compile, simd: add VPLZCNT[DQ] Change-Id: Ifd6d8c12deac9c41722fdf2511d860a334e83438 Reviewed-on: https://go-review.googlesource.com/c/go/+/701915 Reviewed-by: Cherry Mui <cherryyz@google.com> TryBot-Bypass: Junyang Shao <shaojunyang@google.com>
2025-09-08 19:38:56 +00:00
ssa.OpAMD64VPLZCNTD128,
ssa.OpAMD64VPLZCNTD256,
ssa.OpAMD64VPLZCNTD512,
ssa.OpAMD64VPLZCNTQ128,
ssa.OpAMD64VPLZCNTQ256,
ssa.OpAMD64VPLZCNTQ512,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPOPCNTB128,
ssa.OpAMD64VPOPCNTB256,
ssa.OpAMD64VPOPCNTB512,
ssa.OpAMD64VPOPCNTW128,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPOPCNTW256,
[dev.simd] cmd/compile: generated codes for amd64 SIMD This CL is generated by tool in CL 667155. Change-Id: I3829d0d2c96fe7000e2dd025a3006f96957d777a Reviewed-on: https://go-review.googlesource.com/c/go/+/675618 Reviewed-by: Junyang Shao <shaojunyang@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-05-22 19:59:12 +00:00
ssa.OpAMD64VPOPCNTW512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPOPCNTD128,
ssa.OpAMD64VPOPCNTD256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPOPCNTD512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPOPCNTQ128,
ssa.OpAMD64VPOPCNTQ256,
ssa.OpAMD64VPOPCNTQ512,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VRCPPS128,
ssa.OpAMD64VRCPPS256,
ssa.OpAMD64VRCP14PS512,
ssa.OpAMD64VRCP14PD128,
ssa.OpAMD64VRCP14PD256,
ssa.OpAMD64VRCP14PD512,
ssa.OpAMD64VRSQRTPS128,
ssa.OpAMD64VRSQRTPS256,
ssa.OpAMD64VRSQRT14PS512,
ssa.OpAMD64VRSQRT14PD128,
ssa.OpAMD64VRSQRT14PD256,
ssa.OpAMD64VRSQRT14PD512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VSQRTPS128,
ssa.OpAMD64VSQRTPS256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VSQRTPS512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VSQRTPD128,
ssa.OpAMD64VSQRTPD256,
ssa.OpAMD64VSQRTPD512:
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
p = simdV11(s, v)
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
[dev.simd] cmd/compile, simd: add AES instructions AVXAES is a composite feature set, Intel did listed it as "AVXAES" in the XED data instead of separating them. The tests will be in the next CL. Change-Id: I89c97261f2228b2fdafb48f63e82ef6239bdd5ca Reviewed-on: https://go-review.googlesource.com/c/go/+/706055 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-09-23 05:16:30 +00:00
case ssa.OpAMD64VAESDECLAST128,
ssa.OpAMD64VAESDECLAST256,
ssa.OpAMD64VAESDEC128,
ssa.OpAMD64VAESDEC256,
ssa.OpAMD64VAESENCLAST128,
ssa.OpAMD64VAESENCLAST256,
ssa.OpAMD64VAESENC128,
ssa.OpAMD64VAESENC256,
ssa.OpAMD64VADDPS128,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VADDPS256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VADDPS512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VADDPD128,
ssa.OpAMD64VADDPD256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VADDPD512,
ssa.OpAMD64VPADDB128,
ssa.OpAMD64VPADDB256,
ssa.OpAMD64VPADDB512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPADDW128,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPADDW256,
ssa.OpAMD64VPADDW512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPADDD128,
ssa.OpAMD64VPADDD256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPADDD512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPADDQ128,
ssa.OpAMD64VPADDQ256,
ssa.OpAMD64VPADDQ512,
[dev.simd] simd, cmd/compile: rename some methods generated by simdgen CL 692556 these are the "easy" ones SaturatedOp -> OpSaturated PairwiseOp -> OpPairs OpWithPrecision -> OpScaled DiffWithOpWithPrecision -> OpScaledResidue Change-Id: I036bf89c0690bcf9922c376d62cef48392942af3 Reviewed-on: https://go-review.googlesource.com/c/go/+/692357 Reviewed-by: Junyang Shao <shaojunyang@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-01 15:58:29 -04:00
ssa.OpAMD64VHADDPS128,
ssa.OpAMD64VHADDPS256,
ssa.OpAMD64VHADDPD128,
ssa.OpAMD64VHADDPD256,
ssa.OpAMD64VPHADDW128,
ssa.OpAMD64VPHADDW256,
ssa.OpAMD64VPHADDD128,
ssa.OpAMD64VPHADDD256,
ssa.OpAMD64VPHADDSW128,
ssa.OpAMD64VPHADDSW256,
ssa.OpAMD64VPADDSB128,
ssa.OpAMD64VPADDSB256,
ssa.OpAMD64VPADDSB512,
ssa.OpAMD64VPADDSW128,
ssa.OpAMD64VPADDSW256,
ssa.OpAMD64VPADDSW512,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VPADDUSB128,
ssa.OpAMD64VPADDUSB256,
ssa.OpAMD64VPADDUSB512,
ssa.OpAMD64VPADDUSW128,
ssa.OpAMD64VPADDUSW256,
ssa.OpAMD64VPADDUSW512,
[dev.simd] cmd/compile: add round simd ops This CL is generated by CL 678195. Change-Id: Ica600229a4e9623fa45f3b5aa370cdd6d9c31686 Reviewed-on: https://go-review.googlesource.com/c/go/+/681295 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-12 16:21:35 +00:00
ssa.OpAMD64VADDSUBPS128,
ssa.OpAMD64VADDSUBPS256,
ssa.OpAMD64VADDSUBPD128,
ssa.OpAMD64VADDSUBPD256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPAND128,
ssa.OpAMD64VPAND256,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPANDD512,
ssa.OpAMD64VPANDQ512,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPANDN128,
ssa.OpAMD64VPANDN256,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPANDND512,
ssa.OpAMD64VPANDNQ512,
ssa.OpAMD64VPAVGB128,
ssa.OpAMD64VPAVGB256,
ssa.OpAMD64VPAVGB512,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPAVGW128,
ssa.OpAMD64VPAVGW256,
ssa.OpAMD64VPAVGW512,
[dev.simd] cmd/compile, simd: add packed saturated u?int conversions This CL should complete the conversions between int and uint. Change-Id: I46742a62214f346e014a68b9c72a9b116a127f67 Reviewed-on: https://go-review.googlesource.com/c/go/+/698236 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Commit-Queue: David Chase <drchase@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-21 17:45:37 +00:00
ssa.OpAMD64VPACKSSDW128,
ssa.OpAMD64VPACKSSDW256,
ssa.OpAMD64VPACKSSDW512,
ssa.OpAMD64VPACKUSDW128,
ssa.OpAMD64VPACKUSDW256,
ssa.OpAMD64VPACKUSDW512,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VPSIGNB128,
ssa.OpAMD64VPSIGNB256,
ssa.OpAMD64VPSIGNW128,
ssa.OpAMD64VPSIGNW256,
ssa.OpAMD64VPSIGND128,
ssa.OpAMD64VPSIGND256,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VDIVPS128,
ssa.OpAMD64VDIVPS256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VDIVPS512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VDIVPD128,
ssa.OpAMD64VDIVPD256,
ssa.OpAMD64VDIVPD512,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VPMADDWD128,
ssa.OpAMD64VPMADDWD256,
ssa.OpAMD64VPMADDWD512,
ssa.OpAMD64VPMADDUBSW128,
ssa.OpAMD64VPMADDUBSW256,
ssa.OpAMD64VPMADDUBSW512,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPCMPEQB128,
ssa.OpAMD64VPCMPEQB256,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPCMPEQW128,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPCMPEQW256,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPCMPEQD128,
ssa.OpAMD64VPCMPEQD256,
ssa.OpAMD64VPCMPEQQ128,
ssa.OpAMD64VPCMPEQQ256,
[dev.simd] cmd/compile, simd: add galois field operations This CL is generated by CL 684275. Change-Id: Ie1efd0979af0ef0a56781bf9013071bf4d2c52c5 Reviewed-on: https://go-review.googlesource.com/c/go/+/684175 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-26 04:07:48 +00:00
ssa.OpAMD64VGF2P8MULB128,
ssa.OpAMD64VGF2P8MULB256,
ssa.OpAMD64VGF2P8MULB512,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPCMPGTB128,
ssa.OpAMD64VPCMPGTB256,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPCMPGTW128,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPCMPGTW256,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPCMPGTD128,
ssa.OpAMD64VPCMPGTD256,
[dev.simd] cmd/compile, simd: Int64x2 Greater and Uint* Equal This CL is generated by CL 686817. Change-Id: I19b8e468594514b2b1c99f8ad766f78b5e194c80 Reviewed-on: https://go-review.googlesource.com/c/go/+/686876 TryBot-Bypass: David Chase <drchase@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-09 16:24:34 +00:00
ssa.OpAMD64VPCMPGTQ128,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPCMPGTQ256,
[dev.simd] simd, cmd/compile: add Interleave{Hi,Lo} (VPUNPCK*) these are building blocks for transpose, not sure of their best names yet. Change-Id: I3800a55de9fa7fde2590ca822894c8a75387dec3 Reviewed-on: https://go-review.googlesource.com/c/go/+/698576 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-20 16:58:55 -04:00
ssa.OpAMD64VPUNPCKHWD128,
ssa.OpAMD64VPUNPCKHDQ128,
ssa.OpAMD64VPUNPCKHQDQ128,
ssa.OpAMD64VPUNPCKHWD256,
ssa.OpAMD64VPUNPCKHWD512,
ssa.OpAMD64VPUNPCKHDQ256,
ssa.OpAMD64VPUNPCKHDQ512,
ssa.OpAMD64VPUNPCKHQDQ256,
ssa.OpAMD64VPUNPCKHQDQ512,
ssa.OpAMD64VPUNPCKLWD128,
ssa.OpAMD64VPUNPCKLDQ128,
ssa.OpAMD64VPUNPCKLQDQ128,
ssa.OpAMD64VPUNPCKLWD256,
ssa.OpAMD64VPUNPCKLWD512,
ssa.OpAMD64VPUNPCKLDQ256,
ssa.OpAMD64VPUNPCKLDQ512,
ssa.OpAMD64VPUNPCKLQDQ256,
ssa.OpAMD64VPUNPCKLQDQ512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VMAXPS128,
ssa.OpAMD64VMAXPS256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VMAXPS512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VMAXPD128,
ssa.OpAMD64VMAXPD256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VMAXPD512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMAXSB128,
ssa.OpAMD64VPMAXSB256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPMAXSB512,
ssa.OpAMD64VPMAXSW128,
ssa.OpAMD64VPMAXSW256,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMAXSW512,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPMAXSD128,
ssa.OpAMD64VPMAXSD256,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMAXSD512,
ssa.OpAMD64VPMAXSQ128,
ssa.OpAMD64VPMAXSQ256,
ssa.OpAMD64VPMAXSQ512,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPMAXUB128,
ssa.OpAMD64VPMAXUB256,
ssa.OpAMD64VPMAXUB512,
ssa.OpAMD64VPMAXUW128,
ssa.OpAMD64VPMAXUW256,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMAXUW512,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPMAXUD128,
ssa.OpAMD64VPMAXUD256,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMAXUD512,
ssa.OpAMD64VPMAXUQ128,
ssa.OpAMD64VPMAXUQ256,
ssa.OpAMD64VPMAXUQ512,
[dev.simd] cmd/compile: generated codes for amd64 SIMD This CL is generated by tool in CL 667155. Change-Id: I3829d0d2c96fe7000e2dd025a3006f96957d777a Reviewed-on: https://go-review.googlesource.com/c/go/+/675618 Reviewed-by: Junyang Shao <shaojunyang@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-05-22 19:59:12 +00:00
ssa.OpAMD64VMINPS128,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VMINPS256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VMINPS512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VMINPD128,
ssa.OpAMD64VMINPD256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VMINPD512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMINSB128,
ssa.OpAMD64VPMINSB256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPMINSB512,
ssa.OpAMD64VPMINSW128,
ssa.OpAMD64VPMINSW256,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMINSW512,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPMINSD128,
ssa.OpAMD64VPMINSD256,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMINSD512,
ssa.OpAMD64VPMINSQ128,
ssa.OpAMD64VPMINSQ256,
ssa.OpAMD64VPMINSQ512,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPMINUB128,
ssa.OpAMD64VPMINUB256,
ssa.OpAMD64VPMINUB512,
ssa.OpAMD64VPMINUW128,
ssa.OpAMD64VPMINUW256,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMINUW512,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPMINUD128,
ssa.OpAMD64VPMINUD256,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMINUD512,
ssa.OpAMD64VPMINUQ128,
ssa.OpAMD64VPMINUQ256,
ssa.OpAMD64VPMINUQ512,
ssa.OpAMD64VMULPS128,
ssa.OpAMD64VMULPS256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VMULPS512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VMULPD128,
ssa.OpAMD64VMULPD256,
ssa.OpAMD64VMULPD512,
[dev.simd] simd, cmd/compile: rename some methods generated by simdgen CL 692556 these are the "easy" ones SaturatedOp -> OpSaturated PairwiseOp -> OpPairs OpWithPrecision -> OpScaled DiffWithOpWithPrecision -> OpScaledResidue Change-Id: I036bf89c0690bcf9922c376d62cef48392942af3 Reviewed-on: https://go-review.googlesource.com/c/go/+/692357 Reviewed-by: Junyang Shao <shaojunyang@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-01 15:58:29 -04:00
ssa.OpAMD64VPMULLW128,
ssa.OpAMD64VPMULLW256,
ssa.OpAMD64VPMULLW512,
ssa.OpAMD64VPMULLD128,
ssa.OpAMD64VPMULLD256,
ssa.OpAMD64VPMULLD512,
ssa.OpAMD64VPMULLQ128,
ssa.OpAMD64VPMULLQ256,
ssa.OpAMD64VPMULLQ512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMULDQ128,
ssa.OpAMD64VPMULDQ256,
ssa.OpAMD64VPMULUDQ128,
ssa.OpAMD64VPMULUDQ256,
[dev.simd] cmd/compile, simd: update generated files This CL is generated by x/arch CL 694857. Change-Id: I9745fa8c9b2e3f49bd2cff5ff6b5578c0c67bfa1 Reviewed-on: https://go-review.googlesource.com/c/go/+/694915 Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Austin Clements <austin@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-11 15:58:31 -04:00
ssa.OpAMD64VPMULHW128,
ssa.OpAMD64VPMULHW256,
ssa.OpAMD64VPMULHW512,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPMULHUW128,
ssa.OpAMD64VPMULHUW256,
[dev.simd] cmd/compile, simd: update generated files This CL is generated by x/arch CL 694857. Change-Id: I9745fa8c9b2e3f49bd2cff5ff6b5578c0c67bfa1 Reviewed-on: https://go-review.googlesource.com/c/go/+/694915 Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Austin Clements <austin@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-11 15:58:31 -04:00
ssa.OpAMD64VPMULHUW512,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPOR128,
ssa.OpAMD64VPOR256,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPORD512,
ssa.OpAMD64VPORQ512,
[dev.simd] cmd/compile, simd: make Permute 128-bit use AVX VPSHUFB Change-Id: Ib89f602f797065e411eb0cbc95ccf2748b25fdec Reviewed-on: https://go-review.googlesource.com/c/go/+/698295 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-21 19:11:30 +00:00
ssa.OpAMD64VPSHUFB128,
[dev.simd] cmd/compile, simd: add variable Permute This CL also added some tests for them. This CL is generated by CL 687919. Change-Id: I9ddd2cd23bb98ecca91bfbeaffd62faa4bd85e0d Reviewed-on: https://go-review.googlesource.com/c/go/+/687939 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-14 19:39:44 +00:00
ssa.OpAMD64VPERMB256,
ssa.OpAMD64VPERMB512,
ssa.OpAMD64VPERMW128,
ssa.OpAMD64VPERMW256,
ssa.OpAMD64VPERMW512,
ssa.OpAMD64VPERMPS256,
ssa.OpAMD64VPERMD256,
ssa.OpAMD64VPERMPS512,
ssa.OpAMD64VPERMD512,
ssa.OpAMD64VPERMPD256,
ssa.OpAMD64VPERMQ256,
ssa.OpAMD64VPERMPD512,
ssa.OpAMD64VPERMQ512,
[dev.simd] cmd/compile, simd: complete AVX2? u?int shuffles The namings follow the following convention: - If its indices are from constant, amend "Constant" to the name. - If its indices are used by multiple groups, mend "Grouped" to the name. - If its indexing only the low part, amend "Lo", similarly "Hi". Change-Id: I6a58f5dae54c882ebd59f39b5288f6f3f14d957f Reviewed-on: https://go-review.googlesource.com/c/go/+/698296 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-21 20:37:57 +00:00
ssa.OpAMD64VPSHUFB256,
ssa.OpAMD64VPSHUFB512,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPROLVD128,
ssa.OpAMD64VPROLVD256,
ssa.OpAMD64VPROLVD512,
ssa.OpAMD64VPROLVQ128,
ssa.OpAMD64VPROLVQ256,
ssa.OpAMD64VPROLVQ512,
ssa.OpAMD64VPRORVD128,
ssa.OpAMD64VPRORVD256,
ssa.OpAMD64VPRORVD512,
ssa.OpAMD64VPRORVQ128,
ssa.OpAMD64VPRORVQ256,
ssa.OpAMD64VPRORVQ512,
[dev.simd] simd, cmd/compile: rename some methods generated by simdgen CL 692556 these are the "easy" ones SaturatedOp -> OpSaturated PairwiseOp -> OpPairs OpWithPrecision -> OpScaled DiffWithOpWithPrecision -> OpScaledResidue Change-Id: I036bf89c0690bcf9922c376d62cef48392942af3 Reviewed-on: https://go-review.googlesource.com/c/go/+/692357 Reviewed-by: Junyang Shao <shaojunyang@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-01 15:58:29 -04:00
ssa.OpAMD64VSCALEFPS128,
ssa.OpAMD64VSCALEFPS256,
ssa.OpAMD64VSCALEFPS512,
ssa.OpAMD64VSCALEFPD128,
ssa.OpAMD64VSCALEFPD256,
ssa.OpAMD64VSCALEFPD512,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSLLVW128,
ssa.OpAMD64VPSLLVW256,
ssa.OpAMD64VPSLLVW512,
ssa.OpAMD64VPSLLVD128,
ssa.OpAMD64VPSLLVD256,
ssa.OpAMD64VPSLLVD512,
ssa.OpAMD64VPSLLVQ128,
ssa.OpAMD64VPSLLVQ256,
ssa.OpAMD64VPSLLVQ512,
ssa.OpAMD64VPSRAVW128,
ssa.OpAMD64VPSRAVW256,
ssa.OpAMD64VPSRAVW512,
ssa.OpAMD64VPSRAVD128,
ssa.OpAMD64VPSRAVD256,
ssa.OpAMD64VPSRAVD512,
ssa.OpAMD64VPSRAVQ128,
ssa.OpAMD64VPSRAVQ256,
ssa.OpAMD64VPSRAVQ512,
[dev.simd] cmd/compile, simd: adjust Shift.* operations This CL does: 1. Removes ShiftRightSignExtended, default signed vectors to shift arithmetic, and unsigned to shift logical. 2. Add the missing Shifts which were left out by YAML error in the generator. This CL is generated by CL 687595. Change-Id: I663115498adb91c82e89a8476e6748794e997cfa Reviewed-on: https://go-review.googlesource.com/c/go/+/687596 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-07-11 17:56:22 +00:00
ssa.OpAMD64VPSRLVW128,
ssa.OpAMD64VPSRLVW256,
ssa.OpAMD64VPSRLVW512,
ssa.OpAMD64VPSRLVD128,
ssa.OpAMD64VPSRLVD256,
ssa.OpAMD64VPSRLVD512,
ssa.OpAMD64VPSRLVQ128,
ssa.OpAMD64VPSRLVQ256,
ssa.OpAMD64VPSRLVQ512,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VSUBPS128,
ssa.OpAMD64VSUBPS256,
ssa.OpAMD64VSUBPS512,
ssa.OpAMD64VSUBPD128,
ssa.OpAMD64VSUBPD256,
ssa.OpAMD64VSUBPD512,
ssa.OpAMD64VPSUBB128,
ssa.OpAMD64VPSUBB256,
ssa.OpAMD64VPSUBB512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPSUBW128,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPSUBW256,
ssa.OpAMD64VPSUBW512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPSUBD128,
[dev.simd] cmd/compile: generated codes for amd64 SIMD This CL is generated by tool in CL 667155. Change-Id: I3829d0d2c96fe7000e2dd025a3006f96957d777a Reviewed-on: https://go-review.googlesource.com/c/go/+/675618 Reviewed-by: Junyang Shao <shaojunyang@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-05-22 19:59:12 +00:00
ssa.OpAMD64VPSUBD256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPSUBD512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPSUBQ128,
ssa.OpAMD64VPSUBQ256,
ssa.OpAMD64VPSUBQ512,
[dev.simd] simd, cmd/compile: rename some methods generated by simdgen CL 692556 these are the "easy" ones SaturatedOp -> OpSaturated PairwiseOp -> OpPairs OpWithPrecision -> OpScaled DiffWithOpWithPrecision -> OpScaledResidue Change-Id: I036bf89c0690bcf9922c376d62cef48392942af3 Reviewed-on: https://go-review.googlesource.com/c/go/+/692357 Reviewed-by: Junyang Shao <shaojunyang@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-01 15:58:29 -04:00
ssa.OpAMD64VHSUBPS128,
ssa.OpAMD64VHSUBPS256,
ssa.OpAMD64VHSUBPD128,
ssa.OpAMD64VHSUBPD256,
ssa.OpAMD64VPHSUBW128,
ssa.OpAMD64VPHSUBW256,
ssa.OpAMD64VPHSUBD128,
ssa.OpAMD64VPHSUBD256,
ssa.OpAMD64VPHSUBSW128,
ssa.OpAMD64VPHSUBSW256,
ssa.OpAMD64VPSUBSB128,
ssa.OpAMD64VPSUBSB256,
ssa.OpAMD64VPSUBSB512,
ssa.OpAMD64VPSUBSW128,
ssa.OpAMD64VPSUBSW256,
ssa.OpAMD64VPSUBSW512,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VPSUBUSB128,
ssa.OpAMD64VPSUBUSB256,
ssa.OpAMD64VPSUBUSB512,
ssa.OpAMD64VPSUBUSW128,
ssa.OpAMD64VPSUBUSW256,
ssa.OpAMD64VPSUBUSW512,
[dev.simd] cmd/compile, simd: add VPSADBW This new API is given the name SumAbsDiff, a slightly-longer name for its canonical abbreviation SAD(Sum-Absolute-Differences). This instruction has some similar semantic's one, but their semantic is much more specific and complex: MPSADBW, VDBPSADBW. They should have a more specific name given this fact. Change-Id: Ied9144440f82919c3c2d45ae4ce5b961ae91a020 Reviewed-on: https://go-review.googlesource.com/c/go/+/697776 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-20 18:42:52 +00:00
ssa.OpAMD64VPSADBW128,
ssa.OpAMD64VPSADBW256,
ssa.OpAMD64VPSADBW512,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPXOR128,
ssa.OpAMD64VPXOR256,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPXORD512,
ssa.OpAMD64VPXORQ512:
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
p = simdV21(s, v)
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
[dev.simd] cmd/compile, simd: support store to bits for mask This CL is partially generated by CL 689775. Change-Id: I0c36fd2a44706c88db1a1d5ea4a6d0b9f891d85f Reviewed-on: https://go-review.googlesource.com/c/go/+/689795 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-23 07:37:14 +00:00
case ssa.OpAMD64VPCMPEQB512,
ssa.OpAMD64VPCMPEQW512,
ssa.OpAMD64VPCMPEQD512,
ssa.OpAMD64VPCMPEQQ512,
ssa.OpAMD64VPCMPGTB512,
ssa.OpAMD64VPCMPGTW512,
ssa.OpAMD64VPCMPGTD512,
ssa.OpAMD64VPCMPGTQ512:
p = simdV2k(s, v)
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
case ssa.OpAMD64VADDPSMasked128,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VADDPSMasked256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VADDPSMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VADDPDMasked128,
ssa.OpAMD64VADDPDMasked256,
ssa.OpAMD64VADDPDMasked512,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPADDBMasked128,
ssa.OpAMD64VPADDBMasked256,
ssa.OpAMD64VPADDBMasked512,
ssa.OpAMD64VPADDWMasked128,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPADDWMasked256,
ssa.OpAMD64VPADDWMasked512,
ssa.OpAMD64VPADDDMasked128,
ssa.OpAMD64VPADDDMasked256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPADDDMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPADDQMasked128,
ssa.OpAMD64VPADDQMasked256,
ssa.OpAMD64VPADDQMasked512,
[dev.simd] simd, cmd/compile: rename some methods generated by simdgen CL 692556 these are the "easy" ones SaturatedOp -> OpSaturated PairwiseOp -> OpPairs OpWithPrecision -> OpScaled DiffWithOpWithPrecision -> OpScaledResidue Change-Id: I036bf89c0690bcf9922c376d62cef48392942af3 Reviewed-on: https://go-review.googlesource.com/c/go/+/692357 Reviewed-by: Junyang Shao <shaojunyang@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-01 15:58:29 -04:00
ssa.OpAMD64VPADDSBMasked128,
ssa.OpAMD64VPADDSBMasked256,
ssa.OpAMD64VPADDSBMasked512,
ssa.OpAMD64VPADDSWMasked128,
ssa.OpAMD64VPADDSWMasked256,
ssa.OpAMD64VPADDSWMasked512,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VPADDUSBMasked128,
ssa.OpAMD64VPADDUSBMasked256,
ssa.OpAMD64VPADDUSBMasked512,
ssa.OpAMD64VPADDUSWMasked128,
ssa.OpAMD64VPADDUSWMasked256,
ssa.OpAMD64VPADDUSWMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPANDDMasked128,
ssa.OpAMD64VPANDDMasked256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPANDDMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPANDQMasked128,
ssa.OpAMD64VPANDQMasked256,
ssa.OpAMD64VPANDQMasked512,
[dev.simd] cmd/compile: generated codes for amd64 SIMD This CL is generated by tool in CL 667155. Change-Id: I3829d0d2c96fe7000e2dd025a3006f96957d777a Reviewed-on: https://go-review.googlesource.com/c/go/+/675618 Reviewed-by: Junyang Shao <shaojunyang@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-05-22 19:59:12 +00:00
ssa.OpAMD64VPANDNDMasked128,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPANDNDMasked256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPANDNDMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPANDNQMasked128,
ssa.OpAMD64VPANDNQMasked256,
ssa.OpAMD64VPANDNQMasked512,
ssa.OpAMD64VPAVGBMasked128,
ssa.OpAMD64VPAVGBMasked256,
ssa.OpAMD64VPAVGBMasked512,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPAVGWMasked128,
ssa.OpAMD64VPAVGWMasked256,
ssa.OpAMD64VPAVGWMasked512,
[dev.simd] cmd/compile, simd: add packed saturated u?int conversions This CL should complete the conversions between int and uint. Change-Id: I46742a62214f346e014a68b9c72a9b116a127f67 Reviewed-on: https://go-review.googlesource.com/c/go/+/698236 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Commit-Queue: David Chase <drchase@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-21 17:45:37 +00:00
ssa.OpAMD64VPACKSSDWMasked128,
ssa.OpAMD64VPACKSSDWMasked256,
ssa.OpAMD64VPACKSSDWMasked512,
ssa.OpAMD64VPACKUSDWMasked128,
ssa.OpAMD64VPACKUSDWMasked256,
ssa.OpAMD64VPACKUSDWMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VDIVPSMasked128,
[dev.simd] cmd/compile: generated codes for amd64 SIMD This CL is generated by tool in CL 667155. Change-Id: I3829d0d2c96fe7000e2dd025a3006f96957d777a Reviewed-on: https://go-review.googlesource.com/c/go/+/675618 Reviewed-by: Junyang Shao <shaojunyang@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-05-22 19:59:12 +00:00
ssa.OpAMD64VDIVPSMasked256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VDIVPSMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VDIVPDMasked128,
[dev.simd] cmd/compile: generated codes for amd64 SIMD This CL is generated by tool in CL 667155. Change-Id: I3829d0d2c96fe7000e2dd025a3006f96957d777a Reviewed-on: https://go-review.googlesource.com/c/go/+/675618 Reviewed-by: Junyang Shao <shaojunyang@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-05-22 19:59:12 +00:00
ssa.OpAMD64VDIVPDMasked256,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VDIVPDMasked512,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VPMADDWDMasked128,
ssa.OpAMD64VPMADDWDMasked256,
ssa.OpAMD64VPMADDWDMasked512,
ssa.OpAMD64VPMADDUBSWMasked128,
ssa.OpAMD64VPMADDUBSWMasked256,
ssa.OpAMD64VPMADDUBSWMasked512,
[dev.simd] cmd/compile, simd: add galois field operations This CL is generated by CL 684275. Change-Id: Ie1efd0979af0ef0a56781bf9013071bf4d2c52c5 Reviewed-on: https://go-review.googlesource.com/c/go/+/684175 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-26 04:07:48 +00:00
ssa.OpAMD64VGF2P8MULBMasked128,
ssa.OpAMD64VGF2P8MULBMasked256,
ssa.OpAMD64VGF2P8MULBMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VMAXPSMasked128,
ssa.OpAMD64VMAXPSMasked256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VMAXPSMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VMAXPDMasked128,
ssa.OpAMD64VMAXPDMasked256,
ssa.OpAMD64VMAXPDMasked512,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPMAXSBMasked128,
ssa.OpAMD64VPMAXSBMasked256,
ssa.OpAMD64VPMAXSBMasked512,
ssa.OpAMD64VPMAXSWMasked128,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMAXSWMasked256,
ssa.OpAMD64VPMAXSWMasked512,
ssa.OpAMD64VPMAXSDMasked128,
[dev.simd] cmd/compile: generated codes for amd64 SIMD This CL is generated by tool in CL 667155. Change-Id: I3829d0d2c96fe7000e2dd025a3006f96957d777a Reviewed-on: https://go-review.googlesource.com/c/go/+/675618 Reviewed-by: Junyang Shao <shaojunyang@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-05-22 19:59:12 +00:00
ssa.OpAMD64VPMAXSDMasked256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPMAXSDMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMAXSQMasked128,
ssa.OpAMD64VPMAXSQMasked256,
ssa.OpAMD64VPMAXSQMasked512,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPMAXUBMasked128,
ssa.OpAMD64VPMAXUBMasked256,
ssa.OpAMD64VPMAXUBMasked512,
ssa.OpAMD64VPMAXUWMasked128,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMAXUWMasked256,
ssa.OpAMD64VPMAXUWMasked512,
ssa.OpAMD64VPMAXUDMasked128,
ssa.OpAMD64VPMAXUDMasked256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPMAXUDMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMAXUQMasked128,
ssa.OpAMD64VPMAXUQMasked256,
ssa.OpAMD64VPMAXUQMasked512,
ssa.OpAMD64VMINPSMasked128,
ssa.OpAMD64VMINPSMasked256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VMINPSMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VMINPDMasked128,
ssa.OpAMD64VMINPDMasked256,
ssa.OpAMD64VMINPDMasked512,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPMINSBMasked128,
ssa.OpAMD64VPMINSBMasked256,
ssa.OpAMD64VPMINSBMasked512,
ssa.OpAMD64VPMINSWMasked128,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMINSWMasked256,
ssa.OpAMD64VPMINSWMasked512,
ssa.OpAMD64VPMINSDMasked128,
ssa.OpAMD64VPMINSDMasked256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPMINSDMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMINSQMasked128,
[dev.simd] cmd/compile: generated codes for amd64 SIMD This CL is generated by tool in CL 667155. Change-Id: I3829d0d2c96fe7000e2dd025a3006f96957d777a Reviewed-on: https://go-review.googlesource.com/c/go/+/675618 Reviewed-by: Junyang Shao <shaojunyang@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-05-22 19:59:12 +00:00
ssa.OpAMD64VPMINSQMasked256,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMINSQMasked512,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPMINUBMasked128,
ssa.OpAMD64VPMINUBMasked256,
ssa.OpAMD64VPMINUBMasked512,
ssa.OpAMD64VPMINUWMasked128,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMINUWMasked256,
ssa.OpAMD64VPMINUWMasked512,
ssa.OpAMD64VPMINUDMasked128,
ssa.OpAMD64VPMINUDMasked256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPMINUDMasked512,
[dev.simd] cmd/compile: generated codes for amd64 SIMD This CL is generated by tool in CL 667155. Change-Id: I3829d0d2c96fe7000e2dd025a3006f96957d777a Reviewed-on: https://go-review.googlesource.com/c/go/+/675618 Reviewed-by: Junyang Shao <shaojunyang@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-05-22 19:59:12 +00:00
ssa.OpAMD64VPMINUQMasked128,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMINUQMasked256,
ssa.OpAMD64VPMINUQMasked512,
[dev.simd] cmd/compile, simd: update generated files This CL is generated by x/arch CL 694857. Change-Id: I9745fa8c9b2e3f49bd2cff5ff6b5578c0c67bfa1 Reviewed-on: https://go-review.googlesource.com/c/go/+/694915 Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Austin Clements <austin@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-11 15:58:31 -04:00
ssa.OpAMD64VPMULHWMasked128,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VPMULHWMasked256,
[dev.simd] cmd/compile, simd: update generated files This CL is generated by x/arch CL 694857. Change-Id: I9745fa8c9b2e3f49bd2cff5ff6b5578c0c67bfa1 Reviewed-on: https://go-review.googlesource.com/c/go/+/694915 Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Austin Clements <austin@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-11 15:58:31 -04:00
ssa.OpAMD64VPMULHWMasked512,
ssa.OpAMD64VPMULHUWMasked128,
ssa.OpAMD64VPMULHUWMasked256,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMULHUWMasked512,
[dev.simd] simd, cmd/compile: rename some methods generated by simdgen CL 692556 these are the "easy" ones SaturatedOp -> OpSaturated PairwiseOp -> OpPairs OpWithPrecision -> OpScaled DiffWithOpWithPrecision -> OpScaledResidue Change-Id: I036bf89c0690bcf9922c376d62cef48392942af3 Reviewed-on: https://go-review.googlesource.com/c/go/+/692357 Reviewed-by: Junyang Shao <shaojunyang@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-01 15:58:29 -04:00
ssa.OpAMD64VMULPSMasked128,
ssa.OpAMD64VMULPSMasked256,
ssa.OpAMD64VMULPSMasked512,
ssa.OpAMD64VMULPDMasked128,
ssa.OpAMD64VMULPDMasked256,
ssa.OpAMD64VMULPDMasked512,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPMULLWMasked128,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMULLWMasked256,
ssa.OpAMD64VPMULLWMasked512,
ssa.OpAMD64VPMULLDMasked128,
ssa.OpAMD64VPMULLDMasked256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPMULLDMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMULLQMasked128,
ssa.OpAMD64VPMULLQMasked256,
ssa.OpAMD64VPMULLQMasked512,
ssa.OpAMD64VPORDMasked128,
ssa.OpAMD64VPORDMasked256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPORDMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPORQMasked128,
ssa.OpAMD64VPORQMasked256,
ssa.OpAMD64VPORQMasked512,
[dev.simd] cmd/compile, simd: complete AVX2? u?int shuffles The namings follow the following convention: - If its indices are from constant, amend "Constant" to the name. - If its indices are used by multiple groups, mend "Grouped" to the name. - If its indexing only the low part, amend "Lo", similarly "Hi". Change-Id: I6a58f5dae54c882ebd59f39b5288f6f3f14d957f Reviewed-on: https://go-review.googlesource.com/c/go/+/698296 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-21 20:37:57 +00:00
ssa.OpAMD64VPSHUFBMasked256,
ssa.OpAMD64VPSHUFBMasked512,
[dev.simd] cmd/compile, simd: make Permute 128-bit use AVX VPSHUFB Change-Id: Ib89f602f797065e411eb0cbc95ccf2748b25fdec Reviewed-on: https://go-review.googlesource.com/c/go/+/698295 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-21 19:11:30 +00:00
ssa.OpAMD64VPSHUFBMasked128,
[dev.simd] cmd/compile, simd: add variable Permute This CL also added some tests for them. This CL is generated by CL 687919. Change-Id: I9ddd2cd23bb98ecca91bfbeaffd62faa4bd85e0d Reviewed-on: https://go-review.googlesource.com/c/go/+/687939 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-14 19:39:44 +00:00
ssa.OpAMD64VPERMBMasked256,
ssa.OpAMD64VPERMBMasked512,
ssa.OpAMD64VPERMWMasked128,
ssa.OpAMD64VPERMWMasked256,
ssa.OpAMD64VPERMWMasked512,
ssa.OpAMD64VPERMPSMasked256,
ssa.OpAMD64VPERMDMasked256,
ssa.OpAMD64VPERMPSMasked512,
ssa.OpAMD64VPERMDMasked512,
ssa.OpAMD64VPERMPDMasked256,
ssa.OpAMD64VPERMQMasked256,
ssa.OpAMD64VPERMPDMasked512,
ssa.OpAMD64VPERMQMasked512,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPROLVDMasked128,
ssa.OpAMD64VPROLVDMasked256,
ssa.OpAMD64VPROLVDMasked512,
ssa.OpAMD64VPROLVQMasked128,
ssa.OpAMD64VPROLVQMasked256,
ssa.OpAMD64VPROLVQMasked512,
ssa.OpAMD64VPRORVDMasked128,
ssa.OpAMD64VPRORVDMasked256,
ssa.OpAMD64VPRORVDMasked512,
ssa.OpAMD64VPRORVQMasked128,
ssa.OpAMD64VPRORVQMasked256,
ssa.OpAMD64VPRORVQMasked512,
[dev.simd] simd, cmd/compile: rename some methods generated by simdgen CL 692556 these are the "easy" ones SaturatedOp -> OpSaturated PairwiseOp -> OpPairs OpWithPrecision -> OpScaled DiffWithOpWithPrecision -> OpScaledResidue Change-Id: I036bf89c0690bcf9922c376d62cef48392942af3 Reviewed-on: https://go-review.googlesource.com/c/go/+/692357 Reviewed-by: Junyang Shao <shaojunyang@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-01 15:58:29 -04:00
ssa.OpAMD64VSCALEFPSMasked128,
ssa.OpAMD64VSCALEFPSMasked256,
ssa.OpAMD64VSCALEFPSMasked512,
ssa.OpAMD64VSCALEFPDMasked128,
ssa.OpAMD64VSCALEFPDMasked256,
ssa.OpAMD64VSCALEFPDMasked512,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSLLVWMasked128,
ssa.OpAMD64VPSLLVWMasked256,
ssa.OpAMD64VPSLLVWMasked512,
ssa.OpAMD64VPSLLVDMasked128,
ssa.OpAMD64VPSLLVDMasked256,
ssa.OpAMD64VPSLLVDMasked512,
ssa.OpAMD64VPSLLVQMasked128,
ssa.OpAMD64VPSLLVQMasked256,
ssa.OpAMD64VPSLLVQMasked512,
ssa.OpAMD64VPSRAVWMasked128,
ssa.OpAMD64VPSRAVWMasked256,
ssa.OpAMD64VPSRAVWMasked512,
ssa.OpAMD64VPSRAVDMasked128,
ssa.OpAMD64VPSRAVDMasked256,
ssa.OpAMD64VPSRAVDMasked512,
ssa.OpAMD64VPSRAVQMasked128,
ssa.OpAMD64VPSRAVQMasked256,
ssa.OpAMD64VPSRAVQMasked512,
[dev.simd] cmd/compile, simd: adjust Shift.* operations This CL does: 1. Removes ShiftRightSignExtended, default signed vectors to shift arithmetic, and unsigned to shift logical. 2. Add the missing Shifts which were left out by YAML error in the generator. This CL is generated by CL 687595. Change-Id: I663115498adb91c82e89a8476e6748794e997cfa Reviewed-on: https://go-review.googlesource.com/c/go/+/687596 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-07-11 17:56:22 +00:00
ssa.OpAMD64VPSRLVWMasked128,
ssa.OpAMD64VPSRLVWMasked256,
ssa.OpAMD64VPSRLVWMasked512,
ssa.OpAMD64VPSRLVDMasked128,
ssa.OpAMD64VPSRLVDMasked256,
ssa.OpAMD64VPSRLVDMasked512,
ssa.OpAMD64VPSRLVQMasked128,
ssa.OpAMD64VPSRLVQMasked256,
ssa.OpAMD64VPSRLVQMasked512,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VSUBPSMasked128,
ssa.OpAMD64VSUBPSMasked256,
ssa.OpAMD64VSUBPSMasked512,
ssa.OpAMD64VSUBPDMasked128,
ssa.OpAMD64VSUBPDMasked256,
ssa.OpAMD64VSUBPDMasked512,
ssa.OpAMD64VPSUBBMasked128,
ssa.OpAMD64VPSUBBMasked256,
ssa.OpAMD64VPSUBBMasked512,
ssa.OpAMD64VPSUBWMasked128,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPSUBWMasked256,
ssa.OpAMD64VPSUBWMasked512,
ssa.OpAMD64VPSUBDMasked128,
ssa.OpAMD64VPSUBDMasked256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPSUBDMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPSUBQMasked128,
ssa.OpAMD64VPSUBQMasked256,
ssa.OpAMD64VPSUBQMasked512,
[dev.simd] simd, cmd/compile: rename some methods generated by simdgen CL 692556 these are the "easy" ones SaturatedOp -> OpSaturated PairwiseOp -> OpPairs OpWithPrecision -> OpScaled DiffWithOpWithPrecision -> OpScaledResidue Change-Id: I036bf89c0690bcf9922c376d62cef48392942af3 Reviewed-on: https://go-review.googlesource.com/c/go/+/692357 Reviewed-by: Junyang Shao <shaojunyang@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-01 15:58:29 -04:00
ssa.OpAMD64VPSUBSBMasked128,
ssa.OpAMD64VPSUBSBMasked256,
ssa.OpAMD64VPSUBSBMasked512,
ssa.OpAMD64VPSUBSWMasked128,
ssa.OpAMD64VPSUBSWMasked256,
ssa.OpAMD64VPSUBSWMasked512,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VPSUBUSBMasked128,
ssa.OpAMD64VPSUBUSBMasked256,
ssa.OpAMD64VPSUBUSBMasked512,
ssa.OpAMD64VPSUBUSWMasked128,
ssa.OpAMD64VPSUBUSWMasked256,
ssa.OpAMD64VPSUBUSWMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPXORDMasked128,
ssa.OpAMD64VPXORDMasked256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPXORDMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPXORQMasked128,
ssa.OpAMD64VPXORQMasked256,
[dev.simd] simd, cmd/compile: generated files to add 'blend' and 'blendMasked' Generated by arch/internal/simdgen CL 693175 These methods are not public because of simdgen-induced name/signature issues, and because their addition was motivated by the need for emulation tools. The specific name signature problems are: 1) one set of instructions has the "Masked" suffix (because of how that is incorporated into names) and the other set does not (though I suppose the operation could be renamed). 2) because the AVX2 instruction is bytes-only, to get the signature right, requires "OverwriteBase" but OverwriteBase also requires OverwriteClass and "simdgen does not support [OverwriteClass] in inputs". 3) the default operation order is false, true, but we want this in a "x.Merged(y, mask)" that pairs with "x.Masked(mask)" where the true case is x and the false case is y/zero, but the default ordering for VPBLENDVB and VPBLENDMB is false->x and true->y. 4) VPBLENDVB only comes in byte width, which causes problems for floats. All this may get fixed in the future, for now it is just an implementation detail. Change-Id: I61b655c7011e2c33f8644f704f886133c89d2f15 Reviewed-on: https://go-review.googlesource.com/c/go/+/693155 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-08-04 15:19:54 -04:00
ssa.OpAMD64VPXORQMasked512,
ssa.OpAMD64VPBLENDMBMasked512,
ssa.OpAMD64VPBLENDMWMasked512,
ssa.OpAMD64VPBLENDMDMasked512,
ssa.OpAMD64VPBLENDMQMasked512:
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
p = simdV2kv(s, v)
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
case ssa.OpAMD64VPABSBMasked128,
ssa.OpAMD64VPABSBMasked256,
ssa.OpAMD64VPABSBMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPABSWMasked128,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPABSWMasked256,
ssa.OpAMD64VPABSWMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPABSDMasked128,
ssa.OpAMD64VPABSDMasked256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPABSDMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPABSQMasked128,
ssa.OpAMD64VPABSQMasked256,
ssa.OpAMD64VPABSQMasked512,
[dev.simd] simd, cmd/compile: generated code for Broadcast Generated by simdgen CL 693599 This turned out to require some additional work in other places, including filling in missing methods (use OverwriteBase to get FP versions). Also includes a test. Change-Id: I2efe8967837834745f9cae661d4d4dcbb5390b6f Reviewed-on: https://go-review.googlesource.com/c/go/+/693758 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-08-05 17:34:05 -04:00
ssa.OpAMD64VBROADCASTSSMasked128,
ssa.OpAMD64VPBROADCASTQMasked128,
ssa.OpAMD64VPBROADCASTBMasked128,
ssa.OpAMD64VPBROADCASTWMasked128,
ssa.OpAMD64VPBROADCASTDMasked128,
ssa.OpAMD64VBROADCASTSSMasked256,
ssa.OpAMD64VBROADCASTSDMasked256,
ssa.OpAMD64VPBROADCASTBMasked256,
ssa.OpAMD64VPBROADCASTWMasked256,
ssa.OpAMD64VPBROADCASTDMasked256,
ssa.OpAMD64VPBROADCASTQMasked256,
ssa.OpAMD64VBROADCASTSSMasked512,
ssa.OpAMD64VBROADCASTSDMasked512,
ssa.OpAMD64VPBROADCASTBMasked512,
ssa.OpAMD64VPBROADCASTWMasked512,
ssa.OpAMD64VPBROADCASTDMasked512,
ssa.OpAMD64VPBROADCASTQMasked512,
[dev.simd] cmd/compile, simd: add Compress This CL is generated by CL 687975. Change-Id: I21707d108773cc6d8e6f07aaed60e756faa1e6cb Reviewed-on: https://go-review.googlesource.com/c/go/+/687995 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-14 20:29:46 +00:00
ssa.OpAMD64VCOMPRESSPSMasked128,
ssa.OpAMD64VCOMPRESSPSMasked256,
ssa.OpAMD64VCOMPRESSPSMasked512,
ssa.OpAMD64VCOMPRESSPDMasked128,
ssa.OpAMD64VCOMPRESSPDMasked256,
ssa.OpAMD64VCOMPRESSPDMasked512,
ssa.OpAMD64VPCOMPRESSBMasked128,
ssa.OpAMD64VPCOMPRESSBMasked256,
ssa.OpAMD64VPCOMPRESSBMasked512,
ssa.OpAMD64VPCOMPRESSWMasked128,
ssa.OpAMD64VPCOMPRESSWMasked256,
ssa.OpAMD64VPCOMPRESSWMasked512,
ssa.OpAMD64VPCOMPRESSDMasked128,
ssa.OpAMD64VPCOMPRESSDMasked256,
ssa.OpAMD64VPCOMPRESSDMasked512,
ssa.OpAMD64VPCOMPRESSQMasked128,
ssa.OpAMD64VPCOMPRESSQMasked256,
ssa.OpAMD64VPCOMPRESSQMasked512,
[dev.simd] cmd/compile, simd: complete truncating u?int conversions. Downsizing conversions' truncating version complete. Saturation ver not done. Change-Id: I710976c2b5329e2882763d60fcef2a827213df09 Reviewed-on: https://go-review.googlesource.com/c/go/+/697975 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 04:33:46 +00:00
ssa.OpAMD64VPMOVWBMasked128,
ssa.OpAMD64VPMOVWBMasked256,
ssa.OpAMD64VPMOVDBMasked128,
ssa.OpAMD64VPMOVQBMasked128,
[dev.simd] cmd/compile, simd: add saturated u?int conversions Change-Id: I0c7f2d7ec31c59c95568ff8d4560989de849427e Reviewed-on: https://go-review.googlesource.com/c/go/+/698235 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 17:33:50 +00:00
ssa.OpAMD64VPMOVSWBMasked128,
ssa.OpAMD64VPMOVSWBMasked256,
ssa.OpAMD64VPMOVSDBMasked128,
ssa.OpAMD64VPMOVSQBMasked128,
[dev.simd] cmd/compile, simd: complete u?int widening conversions Change-Id: I21da09261b6b278768d99229fe2db387aef1e812 Reviewed-on: https://go-review.googlesource.com/c/go/+/697915 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 02:47:53 +00:00
ssa.OpAMD64VPMOVSXBWMasked256,
ssa.OpAMD64VPMOVSXBWMasked512,
[dev.simd] cmd/compile, simd: complete truncating u?int conversions. Downsizing conversions' truncating version complete. Saturation ver not done. Change-Id: I710976c2b5329e2882763d60fcef2a827213df09 Reviewed-on: https://go-review.googlesource.com/c/go/+/697975 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 04:33:46 +00:00
ssa.OpAMD64VPMOVDWMasked128,
ssa.OpAMD64VPMOVDWMasked256,
ssa.OpAMD64VPMOVQWMasked128,
[dev.simd] cmd/compile, simd: add saturated u?int conversions Change-Id: I0c7f2d7ec31c59c95568ff8d4560989de849427e Reviewed-on: https://go-review.googlesource.com/c/go/+/698235 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 17:33:50 +00:00
ssa.OpAMD64VPMOVSDWMasked128,
ssa.OpAMD64VPMOVSDWMasked256,
ssa.OpAMD64VPMOVSQWMasked128,
[dev.simd] cmd/compile, simd: complete u?int widening conversions Change-Id: I21da09261b6b278768d99229fe2db387aef1e812 Reviewed-on: https://go-review.googlesource.com/c/go/+/697915 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 02:47:53 +00:00
ssa.OpAMD64VPMOVSXBWMasked128,
[dev.simd] cmd/compile: generated simd code to add some conversions Generated by arch/internal/simdgen CL 689735 A small number of conversions for testing purposes Change-Id: I4d52c643d08c02794c3fea9778bb1ecbb5507de4 Reviewed-on: https://go-review.googlesource.com/c/go/+/689716 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-22 15:02:45 -04:00
ssa.OpAMD64VCVTTPS2DQMasked128,
ssa.OpAMD64VCVTTPS2DQMasked256,
ssa.OpAMD64VCVTTPS2DQMasked512,
[dev.simd] cmd/compile, simd: complete u?int widening conversions Change-Id: I21da09261b6b278768d99229fe2db387aef1e812 Reviewed-on: https://go-review.googlesource.com/c/go/+/697915 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 02:47:53 +00:00
ssa.OpAMD64VPMOVSXBDMasked512,
ssa.OpAMD64VPMOVSXWDMasked256,
ssa.OpAMD64VPMOVSXWDMasked512,
[dev.simd] cmd/compile, simd: complete truncating u?int conversions. Downsizing conversions' truncating version complete. Saturation ver not done. Change-Id: I710976c2b5329e2882763d60fcef2a827213df09 Reviewed-on: https://go-review.googlesource.com/c/go/+/697975 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 04:33:46 +00:00
ssa.OpAMD64VPMOVQDMasked128,
ssa.OpAMD64VPMOVQDMasked256,
[dev.simd] cmd/compile, simd: add saturated u?int conversions Change-Id: I0c7f2d7ec31c59c95568ff8d4560989de849427e Reviewed-on: https://go-review.googlesource.com/c/go/+/698235 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 17:33:50 +00:00
ssa.OpAMD64VPMOVSQDMasked128,
ssa.OpAMD64VPMOVSQDMasked256,
[dev.simd] cmd/compile, simd: complete u?int widening conversions Change-Id: I21da09261b6b278768d99229fe2db387aef1e812 Reviewed-on: https://go-review.googlesource.com/c/go/+/697915 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 02:47:53 +00:00
ssa.OpAMD64VPMOVSXBDMasked128,
ssa.OpAMD64VPMOVSXWDMasked128,
ssa.OpAMD64VPMOVSXBDMasked256,
ssa.OpAMD64VPMOVSXWQMasked512,
ssa.OpAMD64VPMOVSXDQMasked256,
ssa.OpAMD64VPMOVSXDQMasked512,
ssa.OpAMD64VPMOVSXBQMasked128,
ssa.OpAMD64VPMOVSXWQMasked128,
ssa.OpAMD64VPMOVSXDQMasked128,
ssa.OpAMD64VPMOVSXBQMasked256,
ssa.OpAMD64VPMOVSXBQMasked512,
[dev.simd] cmd/compile, simd: add saturated u?int conversions Change-Id: I0c7f2d7ec31c59c95568ff8d4560989de849427e Reviewed-on: https://go-review.googlesource.com/c/go/+/698235 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 17:33:50 +00:00
ssa.OpAMD64VPMOVUSWBMasked128,
ssa.OpAMD64VPMOVUSWBMasked256,
ssa.OpAMD64VPMOVUSDBMasked128,
ssa.OpAMD64VPMOVUSQBMasked128,
[dev.simd] simd, cmd/compile: add widening unsigned converts 8->16->32 Change-Id: If0bde7154bd622573375eba5539fd642b8ef9d2f Reviewed-on: https://go-review.googlesource.com/c/go/+/696555 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-08-15 17:05:05 -04:00
ssa.OpAMD64VPMOVZXBWMasked256,
ssa.OpAMD64VPMOVZXBWMasked512,
[dev.simd] cmd/compile, simd: add saturated u?int conversions Change-Id: I0c7f2d7ec31c59c95568ff8d4560989de849427e Reviewed-on: https://go-review.googlesource.com/c/go/+/698235 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 17:33:50 +00:00
ssa.OpAMD64VPMOVUSDWMasked128,
ssa.OpAMD64VPMOVUSDWMasked256,
ssa.OpAMD64VPMOVUSQWMasked128,
[dev.simd] simd, cmd/compile: add widening unsigned converts 8->16->32 Change-Id: If0bde7154bd622573375eba5539fd642b8ef9d2f Reviewed-on: https://go-review.googlesource.com/c/go/+/696555 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-08-15 17:05:05 -04:00
ssa.OpAMD64VPMOVZXBWMasked128,
[dev.simd] cmd/compile: generated simd code to add some conversions Generated by arch/internal/simdgen CL 689735 A small number of conversions for testing purposes Change-Id: I4d52c643d08c02794c3fea9778bb1ecbb5507de4 Reviewed-on: https://go-review.googlesource.com/c/go/+/689716 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-22 15:02:45 -04:00
ssa.OpAMD64VCVTPS2UDQMasked128,
ssa.OpAMD64VCVTPS2UDQMasked256,
ssa.OpAMD64VCVTPS2UDQMasked512,
[dev.simd] cmd/compile, simd: complete u?int widening conversions Change-Id: I21da09261b6b278768d99229fe2db387aef1e812 Reviewed-on: https://go-review.googlesource.com/c/go/+/697915 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 02:47:53 +00:00
ssa.OpAMD64VPMOVZXBDMasked512,
[dev.simd] simd, cmd/compile: add widening unsigned converts 8->16->32 Change-Id: If0bde7154bd622573375eba5539fd642b8ef9d2f Reviewed-on: https://go-review.googlesource.com/c/go/+/696555 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-08-15 17:05:05 -04:00
ssa.OpAMD64VPMOVZXWDMasked256,
ssa.OpAMD64VPMOVZXWDMasked512,
[dev.simd] cmd/compile, simd: add saturated u?int conversions Change-Id: I0c7f2d7ec31c59c95568ff8d4560989de849427e Reviewed-on: https://go-review.googlesource.com/c/go/+/698235 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 17:33:50 +00:00
ssa.OpAMD64VPMOVUSQDMasked128,
ssa.OpAMD64VPMOVUSQDMasked256,
[dev.simd] cmd/compile, simd: complete u?int widening conversions Change-Id: I21da09261b6b278768d99229fe2db387aef1e812 Reviewed-on: https://go-review.googlesource.com/c/go/+/697915 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 02:47:53 +00:00
ssa.OpAMD64VPMOVZXBDMasked128,
[dev.simd] simd, cmd/compile: add widening unsigned converts 8->16->32 Change-Id: If0bde7154bd622573375eba5539fd642b8ef9d2f Reviewed-on: https://go-review.googlesource.com/c/go/+/696555 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-08-15 17:05:05 -04:00
ssa.OpAMD64VPMOVZXWDMasked128,
[dev.simd] cmd/compile, simd: complete u?int widening conversions Change-Id: I21da09261b6b278768d99229fe2db387aef1e812 Reviewed-on: https://go-review.googlesource.com/c/go/+/697915 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 02:47:53 +00:00
ssa.OpAMD64VPMOVZXBDMasked256,
ssa.OpAMD64VPMOVZXWQMasked512,
ssa.OpAMD64VPMOVZXDQMasked256,
ssa.OpAMD64VPMOVZXDQMasked512,
ssa.OpAMD64VPMOVZXBQMasked128,
ssa.OpAMD64VPMOVZXWQMasked128,
ssa.OpAMD64VPMOVZXDQMasked128,
ssa.OpAMD64VPMOVSXWQMasked256,
ssa.OpAMD64VPMOVZXBQMasked256,
ssa.OpAMD64VPMOVZXWQMasked256,
ssa.OpAMD64VPMOVZXBQMasked512,
[dev.simd] cmd/compile, simd: add Expand This CL is generated by CL 693336. Change-Id: Ic1712d49fcad0544fa3c19b0249d8bc65b347104 Reviewed-on: https://go-review.googlesource.com/c/go/+/693375 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-05 19:42:12 +00:00
ssa.OpAMD64VEXPANDPSMasked128,
ssa.OpAMD64VEXPANDPSMasked256,
ssa.OpAMD64VEXPANDPSMasked512,
ssa.OpAMD64VEXPANDPDMasked128,
ssa.OpAMD64VEXPANDPDMasked256,
ssa.OpAMD64VEXPANDPDMasked512,
ssa.OpAMD64VPEXPANDBMasked128,
ssa.OpAMD64VPEXPANDBMasked256,
ssa.OpAMD64VPEXPANDBMasked512,
ssa.OpAMD64VPEXPANDWMasked128,
ssa.OpAMD64VPEXPANDWMasked256,
ssa.OpAMD64VPEXPANDWMasked512,
ssa.OpAMD64VPEXPANDDMasked128,
ssa.OpAMD64VPEXPANDDMasked256,
ssa.OpAMD64VPEXPANDDMasked512,
ssa.OpAMD64VPEXPANDQMasked128,
ssa.OpAMD64VPEXPANDQMasked256,
ssa.OpAMD64VPEXPANDQMasked512,
[dev.simd] cmd/compile, simd: add VPLZCNT[DQ] Change-Id: Ifd6d8c12deac9c41722fdf2511d860a334e83438 Reviewed-on: https://go-review.googlesource.com/c/go/+/701915 Reviewed-by: Cherry Mui <cherryyz@google.com> TryBot-Bypass: Junyang Shao <shaojunyang@google.com>
2025-09-08 19:38:56 +00:00
ssa.OpAMD64VPLZCNTDMasked128,
ssa.OpAMD64VPLZCNTDMasked256,
ssa.OpAMD64VPLZCNTDMasked512,
ssa.OpAMD64VPLZCNTQMasked128,
ssa.OpAMD64VPLZCNTQMasked256,
ssa.OpAMD64VPLZCNTQMasked512,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPOPCNTBMasked128,
ssa.OpAMD64VPOPCNTBMasked256,
ssa.OpAMD64VPOPCNTBMasked512,
ssa.OpAMD64VPOPCNTWMasked128,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPOPCNTWMasked256,
ssa.OpAMD64VPOPCNTWMasked512,
ssa.OpAMD64VPOPCNTDMasked128,
ssa.OpAMD64VPOPCNTDMasked256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPOPCNTDMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPOPCNTQMasked128,
ssa.OpAMD64VPOPCNTQMasked256,
ssa.OpAMD64VPOPCNTQMasked512,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VRCP14PSMasked128,
ssa.OpAMD64VRCP14PSMasked256,
ssa.OpAMD64VRCP14PSMasked512,
ssa.OpAMD64VRCP14PDMasked128,
ssa.OpAMD64VRCP14PDMasked256,
ssa.OpAMD64VRCP14PDMasked512,
ssa.OpAMD64VRSQRT14PSMasked128,
ssa.OpAMD64VRSQRT14PSMasked256,
ssa.OpAMD64VRSQRT14PSMasked512,
ssa.OpAMD64VRSQRT14PDMasked128,
ssa.OpAMD64VRSQRT14PDMasked256,
ssa.OpAMD64VRSQRT14PDMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VSQRTPSMasked128,
[dev.simd] cmd/compile: generated codes for amd64 SIMD This CL is generated by tool in CL 667155. Change-Id: I3829d0d2c96fe7000e2dd025a3006f96957d777a Reviewed-on: https://go-review.googlesource.com/c/go/+/675618 Reviewed-by: Junyang Shao <shaojunyang@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-05-22 19:59:12 +00:00
ssa.OpAMD64VSQRTPSMasked256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VSQRTPSMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VSQRTPDMasked128,
ssa.OpAMD64VSQRTPDMasked256,
[dev.simd] simd, cmd/compile: sample peephole optimization for .Masked() This is not the end of such peephole optimizations, there would need to be many of these for many simd operations. Change-Id: I4511f6fac502bc7259c1c4414c96f56eb400c202 Reviewed-on: https://go-review.googlesource.com/c/go/+/697157 TryBot-Bypass: David Chase <drchase@google.com> Commit-Queue: David Chase <drchase@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-08-18 17:58:30 -04:00
ssa.OpAMD64VSQRTPDMasked512,
[dev.simd] simd, cmd/compile: remove move from API These should really be machine ops only. Change-Id: Idcc611719eff068153d88c5162dd2e0883e5e0ca Reviewed-on: https://go-review.googlesource.com/c/go/+/717821 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 20:33:52 +00:00
ssa.OpAMD64VMOVDQU8Masked128,
ssa.OpAMD64VMOVDQU8Masked256,
[dev.simd] simd, cmd/compile: sample peephole optimization for .Masked() This is not the end of such peephole optimizations, there would need to be many of these for many simd operations. Change-Id: I4511f6fac502bc7259c1c4414c96f56eb400c202 Reviewed-on: https://go-review.googlesource.com/c/go/+/697157 TryBot-Bypass: David Chase <drchase@google.com> Commit-Queue: David Chase <drchase@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-08-18 17:58:30 -04:00
ssa.OpAMD64VMOVDQU8Masked512,
[dev.simd] simd, cmd/compile: remove move from API These should really be machine ops only. Change-Id: Idcc611719eff068153d88c5162dd2e0883e5e0ca Reviewed-on: https://go-review.googlesource.com/c/go/+/717821 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 20:33:52 +00:00
ssa.OpAMD64VMOVDQU16Masked128,
ssa.OpAMD64VMOVDQU16Masked256,
[dev.simd] simd, cmd/compile: sample peephole optimization for .Masked() This is not the end of such peephole optimizations, there would need to be many of these for many simd operations. Change-Id: I4511f6fac502bc7259c1c4414c96f56eb400c202 Reviewed-on: https://go-review.googlesource.com/c/go/+/697157 TryBot-Bypass: David Chase <drchase@google.com> Commit-Queue: David Chase <drchase@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-08-18 17:58:30 -04:00
ssa.OpAMD64VMOVDQU16Masked512,
[dev.simd] simd, cmd/compile: remove move from API These should really be machine ops only. Change-Id: Idcc611719eff068153d88c5162dd2e0883e5e0ca Reviewed-on: https://go-review.googlesource.com/c/go/+/717821 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 20:33:52 +00:00
ssa.OpAMD64VMOVDQU32Masked128,
ssa.OpAMD64VMOVDQU32Masked256,
[dev.simd] simd, cmd/compile: sample peephole optimization for .Masked() This is not the end of such peephole optimizations, there would need to be many of these for many simd operations. Change-Id: I4511f6fac502bc7259c1c4414c96f56eb400c202 Reviewed-on: https://go-review.googlesource.com/c/go/+/697157 TryBot-Bypass: David Chase <drchase@google.com> Commit-Queue: David Chase <drchase@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-08-18 17:58:30 -04:00
ssa.OpAMD64VMOVDQU32Masked512,
[dev.simd] simd, cmd/compile: remove move from API These should really be machine ops only. Change-Id: Idcc611719eff068153d88c5162dd2e0883e5e0ca Reviewed-on: https://go-review.googlesource.com/c/go/+/717821 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 20:33:52 +00:00
ssa.OpAMD64VMOVDQU64Masked128,
ssa.OpAMD64VMOVDQU64Masked256,
[dev.simd] simd, cmd/compile: sample peephole optimization for .Masked() This is not the end of such peephole optimizations, there would need to be many of these for many simd operations. Change-Id: I4511f6fac502bc7259c1c4414c96f56eb400c202 Reviewed-on: https://go-review.googlesource.com/c/go/+/697157 TryBot-Bypass: David Chase <drchase@google.com> Commit-Queue: David Chase <drchase@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-08-18 17:58:30 -04:00
ssa.OpAMD64VMOVDQU64Masked512:
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
p = simdVkv(s, v)
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
[dev.simd] simd, cmd/compile: generated files to add 'blend' and 'blendMasked' Generated by arch/internal/simdgen CL 693175 These methods are not public because of simdgen-induced name/signature issues, and because their addition was motivated by the need for emulation tools. The specific name signature problems are: 1) one set of instructions has the "Masked" suffix (because of how that is incorporated into names) and the other set does not (though I suppose the operation could be renamed). 2) because the AVX2 instruction is bytes-only, to get the signature right, requires "OverwriteBase" but OverwriteBase also requires OverwriteClass and "simdgen does not support [OverwriteClass] in inputs". 3) the default operation order is false, true, but we want this in a "x.Merged(y, mask)" that pairs with "x.Masked(mask)" where the true case is x and the false case is y/zero, but the default ordering for VPBLENDVB and VPBLENDMB is false->x and true->y. 4) VPBLENDVB only comes in byte width, which causes problems for floats. All this may get fixed in the future, for now it is just an implementation detail. Change-Id: I61b655c7011e2c33f8644f704f886133c89d2f15 Reviewed-on: https://go-review.googlesource.com/c/go/+/693155 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-08-04 15:19:54 -04:00
case ssa.OpAMD64VPBLENDVB128,
ssa.OpAMD64VPBLENDVB256:
p = simdV31(s, v)
[dev.simd] cmd/compile, simd: add AES instructions AVXAES is a composite feature set, Intel did listed it as "AVXAES" in the XED data instead of separating them. The tests will be in the next CL. Change-Id: I89c97261f2228b2fdafb48f63e82ef6239bdd5ca Reviewed-on: https://go-review.googlesource.com/c/go/+/706055 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-09-23 05:16:30 +00:00
case ssa.OpAMD64VAESKEYGENASSIST128,
ssa.OpAMD64VROUNDPS128,
[dev.simd] cmd/compile: add round simd ops This CL is generated by CL 678195. Change-Id: Ica600229a4e9623fa45f3b5aa370cdd6d9c31686 Reviewed-on: https://go-review.googlesource.com/c/go/+/681295 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-12 16:21:35 +00:00
ssa.OpAMD64VROUNDPS256,
ssa.OpAMD64VROUNDPD128,
ssa.OpAMD64VROUNDPD256,
ssa.OpAMD64VRNDSCALEPS128,
ssa.OpAMD64VRNDSCALEPS256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VRNDSCALEPS512,
[dev.simd] cmd/compile: add round simd ops This CL is generated by CL 678195. Change-Id: Ica600229a4e9623fa45f3b5aa370cdd6d9c31686 Reviewed-on: https://go-review.googlesource.com/c/go/+/681295 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-12 16:21:35 +00:00
ssa.OpAMD64VRNDSCALEPD128,
ssa.OpAMD64VRNDSCALEPD256,
ssa.OpAMD64VRNDSCALEPD512,
ssa.OpAMD64VREDUCEPS128,
ssa.OpAMD64VREDUCEPS256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VREDUCEPS512,
[dev.simd] cmd/compile: add round simd ops This CL is generated by CL 678195. Change-Id: Ica600229a4e9623fa45f3b5aa370cdd6d9c31686 Reviewed-on: https://go-review.googlesource.com/c/go/+/681295 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-12 16:21:35 +00:00
ssa.OpAMD64VREDUCEPD128,
ssa.OpAMD64VREDUCEPD256,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VREDUCEPD512,
[dev.simd] cmd/compile: add EXTRACT[IF]128 instructions This is generated by simdgen CL 684080 and should be submitted after it. Also includes tests. Change-Id: I1d680911134d8fb92f4deccae4ec373f3ed9f752 Reviewed-on: https://go-review.googlesource.com/c/go/+/684115 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-06-25 18:20:50 -04:00
ssa.OpAMD64VEXTRACTF128128,
[dev.simd] cmd/compile, simd: (Set|Get)(Lo|Hi) This CL is generated by CL 693335. Change-Id: Ie9adda526573f979ec7e4f535033ba29236cc5cb Reviewed-on: https://go-review.googlesource.com/c/go/+/693355 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-05 19:07:51 +00:00
ssa.OpAMD64VEXTRACTF64X4256,
[dev.simd] cmd/compile: add EXTRACT[IF]128 instructions This is generated by simdgen CL 684080 and should be submitted after it. Also includes tests. Change-Id: I1d680911134d8fb92f4deccae4ec373f3ed9f752 Reviewed-on: https://go-review.googlesource.com/c/go/+/684115 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-06-25 18:20:50 -04:00
ssa.OpAMD64VEXTRACTI128128,
[dev.simd] cmd/compile, simd: (Set|Get)(Lo|Hi) This CL is generated by CL 693335. Change-Id: Ie9adda526573f979ec7e4f535033ba29236cc5cb Reviewed-on: https://go-review.googlesource.com/c/go/+/693355 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-05 19:07:51 +00:00
ssa.OpAMD64VEXTRACTI64X4256,
[dev.simd] cmd/compile, simd: complete AVX2? u?int shuffles The namings follow the following convention: - If its indices are from constant, amend "Constant" to the name. - If its indices are used by multiple groups, mend "Grouped" to the name. - If its indexing only the low part, amend "Lo", similarly "Hi". Change-Id: I6a58f5dae54c882ebd59f39b5288f6f3f14d957f Reviewed-on: https://go-review.googlesource.com/c/go/+/698296 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-21 20:37:57 +00:00
ssa.OpAMD64VPSHUFD128,
ssa.OpAMD64VPSHUFD256,
ssa.OpAMD64VPSHUFD512,
ssa.OpAMD64VPSHUFHW128,
ssa.OpAMD64VPSHUFHW256,
ssa.OpAMD64VPSHUFHW512,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPROLD128,
ssa.OpAMD64VPROLD256,
ssa.OpAMD64VPROLD512,
ssa.OpAMD64VPROLQ128,
ssa.OpAMD64VPROLQ256,
ssa.OpAMD64VPROLQ512,
ssa.OpAMD64VPRORD128,
ssa.OpAMD64VPRORD256,
ssa.OpAMD64VPRORD512,
ssa.OpAMD64VPRORQ128,
ssa.OpAMD64VPRORQ256,
[dev.simd] cmd/compile: add ShiftAll immediate variant This CL is generated by CL 693136. Change-Id: Ifd2278d3f927efa008a14cc5e592e7c14b7120ff Reviewed-on: https://go-review.googlesource.com/c/go/+/693157 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-05 04:28:44 +00:00
ssa.OpAMD64VPRORQ512,
ssa.OpAMD64VPSLLW128const,
ssa.OpAMD64VPSLLW256const,
ssa.OpAMD64VPSLLW512const,
ssa.OpAMD64VPSLLD128const,
ssa.OpAMD64VPSLLD256const,
ssa.OpAMD64VPSLLD512const,
ssa.OpAMD64VPSLLQ128const,
ssa.OpAMD64VPSLLQ256const,
ssa.OpAMD64VPSLLQ512const,
ssa.OpAMD64VPSRLW128const,
ssa.OpAMD64VPSRLW256const,
ssa.OpAMD64VPSRLW512const,
ssa.OpAMD64VPSRLD128const,
ssa.OpAMD64VPSRLD256const,
ssa.OpAMD64VPSRLD512const,
ssa.OpAMD64VPSRLQ128const,
ssa.OpAMD64VPSRLQ256const,
ssa.OpAMD64VPSRLQ512const,
ssa.OpAMD64VPSRAW128const,
ssa.OpAMD64VPSRAW256const,
ssa.OpAMD64VPSRAW512const,
ssa.OpAMD64VPSRAD128const,
ssa.OpAMD64VPSRAD256const,
ssa.OpAMD64VPSRAD512const,
ssa.OpAMD64VPSRAQ128const,
ssa.OpAMD64VPSRAQ256const,
ssa.OpAMD64VPSRAQ512const:
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
p = simdV11Imm8(s, v)
[dev.simd] cmd/compile: add round simd ops This CL is generated by CL 678195. Change-Id: Ica600229a4e9623fa45f3b5aa370cdd6d9c31686 Reviewed-on: https://go-review.googlesource.com/c/go/+/681295 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-12 16:21:35 +00:00
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
case ssa.OpAMD64VRNDSCALEPSMasked128,
[dev.simd] cmd/compile: add round simd ops This CL is generated by CL 678195. Change-Id: Ica600229a4e9623fa45f3b5aa370cdd6d9c31686 Reviewed-on: https://go-review.googlesource.com/c/go/+/681295 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-12 16:21:35 +00:00
ssa.OpAMD64VRNDSCALEPSMasked256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VRNDSCALEPSMasked512,
[dev.simd] cmd/compile: add round simd ops This CL is generated by CL 678195. Change-Id: Ica600229a4e9623fa45f3b5aa370cdd6d9c31686 Reviewed-on: https://go-review.googlesource.com/c/go/+/681295 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-12 16:21:35 +00:00
ssa.OpAMD64VRNDSCALEPDMasked128,
ssa.OpAMD64VRNDSCALEPDMasked256,
ssa.OpAMD64VRNDSCALEPDMasked512,
ssa.OpAMD64VREDUCEPSMasked128,
ssa.OpAMD64VREDUCEPSMasked256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VREDUCEPSMasked512,
[dev.simd] cmd/compile: add round simd ops This CL is generated by CL 678195. Change-Id: Ica600229a4e9623fa45f3b5aa370cdd6d9c31686 Reviewed-on: https://go-review.googlesource.com/c/go/+/681295 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-12 16:21:35 +00:00
ssa.OpAMD64VREDUCEPDMasked128,
ssa.OpAMD64VREDUCEPDMasked256,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VREDUCEPDMasked512,
[dev.simd] cmd/compile, simd: complete AVX2? u?int shuffles The namings follow the following convention: - If its indices are from constant, amend "Constant" to the name. - If its indices are used by multiple groups, mend "Grouped" to the name. - If its indexing only the low part, amend "Lo", similarly "Hi". Change-Id: I6a58f5dae54c882ebd59f39b5288f6f3f14d957f Reviewed-on: https://go-review.googlesource.com/c/go/+/698296 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-21 20:37:57 +00:00
ssa.OpAMD64VPSHUFDMasked256,
ssa.OpAMD64VPSHUFDMasked512,
ssa.OpAMD64VPSHUFHWMasked256,
ssa.OpAMD64VPSHUFHWMasked512,
ssa.OpAMD64VPSHUFHWMasked128,
ssa.OpAMD64VPSHUFDMasked128,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPROLDMasked128,
ssa.OpAMD64VPROLDMasked256,
ssa.OpAMD64VPROLDMasked512,
ssa.OpAMD64VPROLQMasked128,
ssa.OpAMD64VPROLQMasked256,
ssa.OpAMD64VPROLQMasked512,
ssa.OpAMD64VPRORDMasked128,
ssa.OpAMD64VPRORDMasked256,
ssa.OpAMD64VPRORDMasked512,
ssa.OpAMD64VPRORQMasked128,
ssa.OpAMD64VPRORQMasked256,
[dev.simd] cmd/compile: add ShiftAll immediate variant This CL is generated by CL 693136. Change-Id: Ifd2278d3f927efa008a14cc5e592e7c14b7120ff Reviewed-on: https://go-review.googlesource.com/c/go/+/693157 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-05 04:28:44 +00:00
ssa.OpAMD64VPRORQMasked512,
ssa.OpAMD64VPSLLWMasked128const,
ssa.OpAMD64VPSLLWMasked256const,
ssa.OpAMD64VPSLLWMasked512const,
ssa.OpAMD64VPSLLDMasked128const,
ssa.OpAMD64VPSLLDMasked256const,
ssa.OpAMD64VPSLLDMasked512const,
ssa.OpAMD64VPSLLQMasked128const,
ssa.OpAMD64VPSLLQMasked256const,
ssa.OpAMD64VPSLLQMasked512const,
ssa.OpAMD64VPSRLWMasked128const,
ssa.OpAMD64VPSRLWMasked256const,
ssa.OpAMD64VPSRLWMasked512const,
ssa.OpAMD64VPSRLDMasked128const,
ssa.OpAMD64VPSRLDMasked256const,
ssa.OpAMD64VPSRLDMasked512const,
ssa.OpAMD64VPSRLQMasked128const,
ssa.OpAMD64VPSRLQMasked256const,
ssa.OpAMD64VPSRLQMasked512const,
ssa.OpAMD64VPSRAWMasked128const,
ssa.OpAMD64VPSRAWMasked256const,
ssa.OpAMD64VPSRAWMasked512const,
ssa.OpAMD64VPSRADMasked128const,
ssa.OpAMD64VPSRADMasked256const,
ssa.OpAMD64VPSRADMasked512const,
ssa.OpAMD64VPSRAQMasked128const,
ssa.OpAMD64VPSRAQMasked256const,
ssa.OpAMD64VPSRAQMasked512const:
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
p = simdVkvImm8(s, v)
[dev.simd] cmd/compile: add round simd ops This CL is generated by CL 678195. Change-Id: Ica600229a4e9623fa45f3b5aa370cdd6d9c31686 Reviewed-on: https://go-review.googlesource.com/c/go/+/681295 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-12 16:21:35 +00:00
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
case ssa.OpAMD64VCMPPS128,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VCMPPS256,
ssa.OpAMD64VCMPPD128,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VCMPPD256,
[dev.simd] cmd/compile, simd: add galois field operations This CL is generated by CL 684275. Change-Id: Ie1efd0979af0ef0a56781bf9013071bf4d2c52c5 Reviewed-on: https://go-review.googlesource.com/c/go/+/684175 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-26 04:07:48 +00:00
ssa.OpAMD64VGF2P8AFFINEQB128,
ssa.OpAMD64VGF2P8AFFINEQB256,
ssa.OpAMD64VGF2P8AFFINEQB512,
ssa.OpAMD64VGF2P8AFFINEINVQB128,
ssa.OpAMD64VGF2P8AFFINEINVQB256,
ssa.OpAMD64VGF2P8AFFINEINVQB512,
[dev.simd] simd, cmd/compile: add 128 bit select-from-pair Using this name until a better one appears: x.Select128FromPair(3, 2, y) Includes test for constant and variable case. Checks for unexpected immediates (using the zeroing flag, which is not supported for this intrinsic) and panics. Change-Id: I9249475d6572968c127b4ee9e00328d717c07578 Reviewed-on: https://go-review.googlesource.com/c/go/+/705496 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-09-19 13:07:59 -04:00
ssa.OpAMD64VPERM2F128256,
ssa.OpAMD64VPERM2I128256,
[dev.simd] cmd/compile: add INSERT[IF]128 instructions This CL is created by simdgen CL 684055 and should be submitted after it. Also includes a test. Change-Id: I2ad7ae51d11cfc19745e866150e2eaf010d4ea49 Reviewed-on: https://go-review.googlesource.com/c/go/+/684077 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-06-25 16:06:00 -04:00
ssa.OpAMD64VINSERTF128256,
[dev.simd] cmd/compile, simd: (Set|Get)(Lo|Hi) This CL is generated by CL 693335. Change-Id: Ie9adda526573f979ec7e4f535033ba29236cc5cb Reviewed-on: https://go-review.googlesource.com/c/go/+/693355 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-05 19:07:51 +00:00
ssa.OpAMD64VINSERTF64X4512,
[dev.simd] cmd/compile: add INSERT[IF]128 instructions This CL is created by simdgen CL 684055 and should be submitted after it. Also includes a test. Change-Id: I2ad7ae51d11cfc19745e866150e2eaf010d4ea49 Reviewed-on: https://go-review.googlesource.com/c/go/+/684077 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-06-25 16:06:00 -04:00
ssa.OpAMD64VINSERTI128256,
[dev.simd] cmd/compile, simd: (Set|Get)(Lo|Hi) This CL is generated by CL 693335. Change-Id: Ie9adda526573f979ec7e4f535033ba29236cc5cb Reviewed-on: https://go-review.googlesource.com/c/go/+/693355 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-05 19:07:51 +00:00
ssa.OpAMD64VINSERTI64X4512,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSHLDW128,
ssa.OpAMD64VPSHLDW256,
ssa.OpAMD64VPSHLDW512,
ssa.OpAMD64VPSHLDD128,
ssa.OpAMD64VPSHLDD256,
ssa.OpAMD64VPSHLDD512,
ssa.OpAMD64VPSHLDQ128,
ssa.OpAMD64VPSHLDQ256,
ssa.OpAMD64VPSHLDQ512,
ssa.OpAMD64VPSHRDW128,
ssa.OpAMD64VPSHRDW256,
ssa.OpAMD64VPSHRDW512,
ssa.OpAMD64VPSHRDD128,
ssa.OpAMD64VPSHRDD256,
ssa.OpAMD64VPSHRDD512,
ssa.OpAMD64VPSHRDQ128,
ssa.OpAMD64VPSHRDQ256,
[dev.simd] simd, cmd/compile: added simd methods for VSHUFP[DS] These are package private, and will be hidden behind other methods in a following CL with a more general interface. Change-Id: Id090a5de06a0e2aed5cc60a11ff627c5e3b9c52d Reviewed-on: https://go-review.googlesource.com/c/go/+/698577 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-20 17:29:04 -04:00
ssa.OpAMD64VPSHRDQ512,
ssa.OpAMD64VSHUFPS128,
ssa.OpAMD64VSHUFPD128,
ssa.OpAMD64VSHUFPS256,
ssa.OpAMD64VSHUFPS512,
ssa.OpAMD64VSHUFPD256,
ssa.OpAMD64VSHUFPD512:
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
p = simdV21Imm8(s, v)
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
case ssa.OpAMD64VCMPPS512,
ssa.OpAMD64VCMPPD512,
[dev.simd] cmd/compile, simd: support store to bits for mask This CL is partially generated by CL 689775. Change-Id: I0c36fd2a44706c88db1a1d5ea4a6d0b9f891d85f Reviewed-on: https://go-review.googlesource.com/c/go/+/689795 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-23 07:37:14 +00:00
ssa.OpAMD64VPCMPUB512,
ssa.OpAMD64VPCMPUW512,
ssa.OpAMD64VPCMPUD512,
ssa.OpAMD64VPCMPUQ512,
ssa.OpAMD64VPCMPB512,
ssa.OpAMD64VPCMPW512,
ssa.OpAMD64VPCMPD512,
ssa.OpAMD64VPCMPQ512:
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
p = simdV2kImm8(s, v)
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
case ssa.OpAMD64VCMPPSMasked128,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VCMPPSMasked256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VCMPPSMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VCMPPDMasked128,
ssa.OpAMD64VCMPPDMasked256,
ssa.OpAMD64VCMPPDMasked512,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPCMPBMasked128,
ssa.OpAMD64VPCMPBMasked256,
ssa.OpAMD64VPCMPBMasked512,
ssa.OpAMD64VPCMPWMasked128,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPCMPWMasked256,
ssa.OpAMD64VPCMPWMasked512,
ssa.OpAMD64VPCMPDMasked128,
ssa.OpAMD64VPCMPDMasked256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPCMPDMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPCMPQMasked128,
ssa.OpAMD64VPCMPQMasked256,
ssa.OpAMD64VPCMPQMasked512,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPCMPUBMasked128,
ssa.OpAMD64VPCMPUBMasked256,
ssa.OpAMD64VPCMPUBMasked512,
ssa.OpAMD64VPCMPUWMasked128,
ssa.OpAMD64VPCMPUWMasked256,
ssa.OpAMD64VPCMPUWMasked512,
ssa.OpAMD64VPCMPUDMasked128,
ssa.OpAMD64VPCMPUDMasked256,
ssa.OpAMD64VPCMPUDMasked512,
ssa.OpAMD64VPCMPUQMasked128,
ssa.OpAMD64VPCMPUQMasked256,
ssa.OpAMD64VPCMPUQMasked512:
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
p = simdV2kkImm8(s, v)
[dev.simd] cmd/compile: generated codes for amd64 SIMD This CL is generated by tool in CL 667155. Change-Id: I3829d0d2c96fe7000e2dd025a3006f96957d777a Reviewed-on: https://go-review.googlesource.com/c/go/+/675618 Reviewed-by: Junyang Shao <shaojunyang@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-05-22 19:59:12 +00:00
[dev.simd] cmd/compile, simd: change PairDotProdAccumulate to AddDotProd This CL is generated by CL 692219. Change-Id: I50fa919f1edc5c6505bc6d3238f65b37fc7628b5 Reviewed-on: https://go-review.googlesource.com/c/go/+/692156 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-31 23:51:50 +00:00
case ssa.OpAMD64VPDPWSSD128,
ssa.OpAMD64VPDPWSSD256,
ssa.OpAMD64VPDPWSSD512,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VPDPBUSD128,
ssa.OpAMD64VPDPBUSD256,
ssa.OpAMD64VPDPBUSD512,
ssa.OpAMD64VPDPBUSDS128,
ssa.OpAMD64VPDPBUSDS256,
ssa.OpAMD64VPDPBUSDS512,
[dev.simd] cmd/compile, simd: change PairDotProdAccumulate to AddDotProd This CL is generated by CL 692219. Change-Id: I50fa919f1edc5c6505bc6d3238f65b37fc7628b5 Reviewed-on: https://go-review.googlesource.com/c/go/+/692156 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-31 23:51:50 +00:00
ssa.OpAMD64VFMADD213PS128,
[dev.simd] cmd/compile: add fused mul add sub ops This CL is generated by CL 680595. Change-Id: I5e06ea9bc6a62593fc3b00fd44c119a5ed0d9e90 Reviewed-on: https://go-review.googlesource.com/c/go/+/681299 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-06-12 16:45:00 +00:00
ssa.OpAMD64VFMADD213PS256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VFMADD213PS512,
[dev.simd] cmd/compile: add fused mul add sub ops This CL is generated by CL 680595. Change-Id: I5e06ea9bc6a62593fc3b00fd44c119a5ed0d9e90 Reviewed-on: https://go-review.googlesource.com/c/go/+/681299 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-06-12 16:45:00 +00:00
ssa.OpAMD64VFMADD213PD128,
ssa.OpAMD64VFMADD213PD256,
ssa.OpAMD64VFMADD213PD512,
ssa.OpAMD64VFMADDSUB213PS128,
ssa.OpAMD64VFMADDSUB213PS256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VFMADDSUB213PS512,
[dev.simd] cmd/compile: add fused mul add sub ops This CL is generated by CL 680595. Change-Id: I5e06ea9bc6a62593fc3b00fd44c119a5ed0d9e90 Reviewed-on: https://go-review.googlesource.com/c/go/+/681299 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-06-12 16:45:00 +00:00
ssa.OpAMD64VFMADDSUB213PD128,
ssa.OpAMD64VFMADDSUB213PD256,
ssa.OpAMD64VFMADDSUB213PD512,
ssa.OpAMD64VFMSUBADD213PS128,
ssa.OpAMD64VFMSUBADD213PS256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VFMSUBADD213PS512,
[dev.simd] cmd/compile: add fused mul add sub ops This CL is generated by CL 680595. Change-Id: I5e06ea9bc6a62593fc3b00fd44c119a5ed0d9e90 Reviewed-on: https://go-review.googlesource.com/c/go/+/681299 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-06-12 16:45:00 +00:00
ssa.OpAMD64VFMSUBADD213PD128,
ssa.OpAMD64VFMSUBADD213PD256,
ssa.OpAMD64VFMSUBADD213PD512,
[dev.simd] cmd/compile, simd: add variable Permute This CL also added some tests for them. This CL is generated by CL 687919. Change-Id: I9ddd2cd23bb98ecca91bfbeaffd62faa4bd85e0d Reviewed-on: https://go-review.googlesource.com/c/go/+/687939 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-14 19:39:44 +00:00
ssa.OpAMD64VPERMI2B128,
ssa.OpAMD64VPERMI2B256,
ssa.OpAMD64VPERMI2B512,
ssa.OpAMD64VPERMI2W128,
ssa.OpAMD64VPERMI2W256,
ssa.OpAMD64VPERMI2W512,
ssa.OpAMD64VPERMI2PS128,
ssa.OpAMD64VPERMI2D128,
ssa.OpAMD64VPERMI2PS256,
ssa.OpAMD64VPERMI2D256,
ssa.OpAMD64VPERMI2PS512,
ssa.OpAMD64VPERMI2D512,
ssa.OpAMD64VPERMI2PD128,
ssa.OpAMD64VPERMI2Q128,
ssa.OpAMD64VPERMI2PD256,
ssa.OpAMD64VPERMI2Q256,
ssa.OpAMD64VPERMI2PD512,
ssa.OpAMD64VPERMI2Q512,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSHLDVW128,
ssa.OpAMD64VPSHLDVW256,
ssa.OpAMD64VPSHLDVW512,
ssa.OpAMD64VPSHLDVD128,
ssa.OpAMD64VPSHLDVD256,
ssa.OpAMD64VPSHLDVD512,
ssa.OpAMD64VPSHLDVQ128,
ssa.OpAMD64VPSHLDVQ256,
ssa.OpAMD64VPSHLDVQ512,
ssa.OpAMD64VPSHRDVW128,
ssa.OpAMD64VPSHRDVW256,
ssa.OpAMD64VPSHRDVW512,
ssa.OpAMD64VPSHRDVD128,
ssa.OpAMD64VPSHRDVD256,
ssa.OpAMD64VPSHRDVD512,
ssa.OpAMD64VPSHRDVQ128,
ssa.OpAMD64VPSHRDVQ256,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VPSHRDVQ512:
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
p = simdV31ResultInArg0(s, v)
[dev.simd] cmd/compile: add more dot products This CL is generated by CL 680215. Change-Id: Ie085e65e0473a8e96170702d7265d379ec8812ba Reviewed-on: https://go-review.googlesource.com/c/go/+/681298 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-06-12 16:43:10 +00:00
[dev.simd] cmd/compile, simd: change PairDotProdAccumulate to AddDotProd This CL is generated by CL 692219. Change-Id: I50fa919f1edc5c6505bc6d3238f65b37fc7628b5 Reviewed-on: https://go-review.googlesource.com/c/go/+/692156 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-31 23:51:50 +00:00
case ssa.OpAMD64VPDPWSSDMasked128,
ssa.OpAMD64VPDPWSSDMasked256,
ssa.OpAMD64VPDPWSSDMasked512,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VPDPBUSDMasked128,
ssa.OpAMD64VPDPBUSDMasked256,
ssa.OpAMD64VPDPBUSDMasked512,
ssa.OpAMD64VPDPBUSDSMasked128,
ssa.OpAMD64VPDPBUSDSMasked256,
ssa.OpAMD64VPDPBUSDSMasked512,
[dev.simd] cmd/compile: add masked merging ops and optimizations This CL generates optimizations for masked variant of AVX512 instructions for patterns: x.Op(y).Merge(z, mask) => OpMasked(z, x, y mask), where OpMasked is resultInArg0. Change-Id: Ife7ccc9ddbf76ae921a085bd6a42b965da9bc179 Reviewed-on: https://go-review.googlesource.com/c/go/+/718160 Reviewed-by: David Chase <drchase@google.com> TryBot-Bypass: Junyang Shao <shaojunyang@google.com>
2025-11-05 19:25:00 +00:00
ssa.OpAMD64VADDPSMasked128Merging,
ssa.OpAMD64VADDPSMasked256Merging,
ssa.OpAMD64VADDPSMasked512Merging,
ssa.OpAMD64VADDPDMasked128Merging,
ssa.OpAMD64VADDPDMasked256Merging,
ssa.OpAMD64VADDPDMasked512Merging,
ssa.OpAMD64VPADDBMasked128Merging,
ssa.OpAMD64VPADDBMasked256Merging,
ssa.OpAMD64VPADDBMasked512Merging,
ssa.OpAMD64VPADDWMasked128Merging,
ssa.OpAMD64VPADDWMasked256Merging,
ssa.OpAMD64VPADDWMasked512Merging,
ssa.OpAMD64VPADDDMasked128Merging,
ssa.OpAMD64VPADDDMasked256Merging,
ssa.OpAMD64VPADDDMasked512Merging,
ssa.OpAMD64VPADDQMasked128Merging,
ssa.OpAMD64VPADDQMasked256Merging,
ssa.OpAMD64VPADDQMasked512Merging,
ssa.OpAMD64VPADDSBMasked128Merging,
ssa.OpAMD64VPADDSBMasked256Merging,
ssa.OpAMD64VPADDSBMasked512Merging,
ssa.OpAMD64VPADDSWMasked128Merging,
ssa.OpAMD64VPADDSWMasked256Merging,
ssa.OpAMD64VPADDSWMasked512Merging,
ssa.OpAMD64VPADDUSBMasked128Merging,
ssa.OpAMD64VPADDUSBMasked256Merging,
ssa.OpAMD64VPADDUSBMasked512Merging,
ssa.OpAMD64VPADDUSWMasked128Merging,
ssa.OpAMD64VPADDUSWMasked256Merging,
ssa.OpAMD64VPADDUSWMasked512Merging,
ssa.OpAMD64VPANDDMasked128Merging,
ssa.OpAMD64VPANDDMasked256Merging,
ssa.OpAMD64VPANDDMasked512Merging,
ssa.OpAMD64VPANDQMasked128Merging,
ssa.OpAMD64VPANDQMasked256Merging,
ssa.OpAMD64VPANDQMasked512Merging,
ssa.OpAMD64VPAVGBMasked128Merging,
ssa.OpAMD64VPAVGBMasked256Merging,
ssa.OpAMD64VPAVGBMasked512Merging,
ssa.OpAMD64VPAVGWMasked128Merging,
ssa.OpAMD64VPAVGWMasked256Merging,
ssa.OpAMD64VPAVGWMasked512Merging,
ssa.OpAMD64VPACKSSDWMasked128Merging,
ssa.OpAMD64VPACKSSDWMasked256Merging,
ssa.OpAMD64VPACKSSDWMasked512Merging,
ssa.OpAMD64VPACKUSDWMasked128Merging,
ssa.OpAMD64VPACKUSDWMasked256Merging,
ssa.OpAMD64VPACKUSDWMasked512Merging,
ssa.OpAMD64VDIVPSMasked128Merging,
ssa.OpAMD64VDIVPSMasked256Merging,
ssa.OpAMD64VDIVPSMasked512Merging,
ssa.OpAMD64VDIVPDMasked128Merging,
ssa.OpAMD64VDIVPDMasked256Merging,
ssa.OpAMD64VDIVPDMasked512Merging,
ssa.OpAMD64VPMADDWDMasked128Merging,
ssa.OpAMD64VPMADDWDMasked256Merging,
ssa.OpAMD64VPMADDWDMasked512Merging,
ssa.OpAMD64VPMADDUBSWMasked128Merging,
ssa.OpAMD64VPMADDUBSWMasked256Merging,
ssa.OpAMD64VPMADDUBSWMasked512Merging,
ssa.OpAMD64VGF2P8MULBMasked128Merging,
ssa.OpAMD64VGF2P8MULBMasked256Merging,
ssa.OpAMD64VGF2P8MULBMasked512Merging,
ssa.OpAMD64VMAXPSMasked128Merging,
ssa.OpAMD64VMAXPSMasked256Merging,
ssa.OpAMD64VMAXPSMasked512Merging,
ssa.OpAMD64VMAXPDMasked128Merging,
ssa.OpAMD64VMAXPDMasked256Merging,
ssa.OpAMD64VMAXPDMasked512Merging,
ssa.OpAMD64VPMAXSBMasked128Merging,
ssa.OpAMD64VPMAXSBMasked256Merging,
ssa.OpAMD64VPMAXSBMasked512Merging,
ssa.OpAMD64VPMAXSWMasked128Merging,
ssa.OpAMD64VPMAXSWMasked256Merging,
ssa.OpAMD64VPMAXSWMasked512Merging,
ssa.OpAMD64VPMAXSDMasked128Merging,
ssa.OpAMD64VPMAXSDMasked256Merging,
ssa.OpAMD64VPMAXSDMasked512Merging,
ssa.OpAMD64VPMAXSQMasked128Merging,
ssa.OpAMD64VPMAXSQMasked256Merging,
ssa.OpAMD64VPMAXSQMasked512Merging,
ssa.OpAMD64VPMAXUBMasked128Merging,
ssa.OpAMD64VPMAXUBMasked256Merging,
ssa.OpAMD64VPMAXUBMasked512Merging,
ssa.OpAMD64VPMAXUWMasked128Merging,
ssa.OpAMD64VPMAXUWMasked256Merging,
ssa.OpAMD64VPMAXUWMasked512Merging,
ssa.OpAMD64VPMAXUDMasked128Merging,
ssa.OpAMD64VPMAXUDMasked256Merging,
ssa.OpAMD64VPMAXUDMasked512Merging,
ssa.OpAMD64VPMAXUQMasked128Merging,
ssa.OpAMD64VPMAXUQMasked256Merging,
ssa.OpAMD64VPMAXUQMasked512Merging,
ssa.OpAMD64VMINPSMasked128Merging,
ssa.OpAMD64VMINPSMasked256Merging,
ssa.OpAMD64VMINPSMasked512Merging,
ssa.OpAMD64VMINPDMasked128Merging,
ssa.OpAMD64VMINPDMasked256Merging,
ssa.OpAMD64VMINPDMasked512Merging,
ssa.OpAMD64VPMINSBMasked128Merging,
ssa.OpAMD64VPMINSBMasked256Merging,
ssa.OpAMD64VPMINSBMasked512Merging,
ssa.OpAMD64VPMINSWMasked128Merging,
ssa.OpAMD64VPMINSWMasked256Merging,
ssa.OpAMD64VPMINSWMasked512Merging,
ssa.OpAMD64VPMINSDMasked128Merging,
ssa.OpAMD64VPMINSDMasked256Merging,
ssa.OpAMD64VPMINSDMasked512Merging,
ssa.OpAMD64VPMINSQMasked128Merging,
ssa.OpAMD64VPMINSQMasked256Merging,
ssa.OpAMD64VPMINSQMasked512Merging,
ssa.OpAMD64VPMINUBMasked128Merging,
ssa.OpAMD64VPMINUBMasked256Merging,
ssa.OpAMD64VPMINUBMasked512Merging,
ssa.OpAMD64VPMINUWMasked128Merging,
ssa.OpAMD64VPMINUWMasked256Merging,
ssa.OpAMD64VPMINUWMasked512Merging,
ssa.OpAMD64VPMINUDMasked128Merging,
ssa.OpAMD64VPMINUDMasked256Merging,
ssa.OpAMD64VPMINUDMasked512Merging,
ssa.OpAMD64VPMINUQMasked128Merging,
ssa.OpAMD64VPMINUQMasked256Merging,
ssa.OpAMD64VPMINUQMasked512Merging,
[dev.simd] cmd/compile, simd: change PairDotProdAccumulate to AddDotProd This CL is generated by CL 692219. Change-Id: I50fa919f1edc5c6505bc6d3238f65b37fc7628b5 Reviewed-on: https://go-review.googlesource.com/c/go/+/692156 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-31 23:51:50 +00:00
ssa.OpAMD64VFMADD213PSMasked128,
[dev.simd] cmd/compile: add fused mul add sub ops This CL is generated by CL 680595. Change-Id: I5e06ea9bc6a62593fc3b00fd44c119a5ed0d9e90 Reviewed-on: https://go-review.googlesource.com/c/go/+/681299 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-06-12 16:45:00 +00:00
ssa.OpAMD64VFMADD213PSMasked256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VFMADD213PSMasked512,
[dev.simd] cmd/compile: add fused mul add sub ops This CL is generated by CL 680595. Change-Id: I5e06ea9bc6a62593fc3b00fd44c119a5ed0d9e90 Reviewed-on: https://go-review.googlesource.com/c/go/+/681299 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-06-12 16:45:00 +00:00
ssa.OpAMD64VFMADD213PDMasked128,
ssa.OpAMD64VFMADD213PDMasked256,
ssa.OpAMD64VFMADD213PDMasked512,
ssa.OpAMD64VFMADDSUB213PSMasked128,
ssa.OpAMD64VFMADDSUB213PSMasked256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VFMADDSUB213PSMasked512,
[dev.simd] cmd/compile: add fused mul add sub ops This CL is generated by CL 680595. Change-Id: I5e06ea9bc6a62593fc3b00fd44c119a5ed0d9e90 Reviewed-on: https://go-review.googlesource.com/c/go/+/681299 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-06-12 16:45:00 +00:00
ssa.OpAMD64VFMADDSUB213PDMasked128,
ssa.OpAMD64VFMADDSUB213PDMasked256,
ssa.OpAMD64VFMADDSUB213PDMasked512,
[dev.simd] cmd/compile: add masked merging ops and optimizations This CL generates optimizations for masked variant of AVX512 instructions for patterns: x.Op(y).Merge(z, mask) => OpMasked(z, x, y mask), where OpMasked is resultInArg0. Change-Id: Ife7ccc9ddbf76ae921a085bd6a42b965da9bc179 Reviewed-on: https://go-review.googlesource.com/c/go/+/718160 Reviewed-by: David Chase <drchase@google.com> TryBot-Bypass: Junyang Shao <shaojunyang@google.com>
2025-11-05 19:25:00 +00:00
ssa.OpAMD64VPMULHWMasked128Merging,
ssa.OpAMD64VPMULHWMasked256Merging,
ssa.OpAMD64VPMULHWMasked512Merging,
ssa.OpAMD64VPMULHUWMasked128Merging,
ssa.OpAMD64VPMULHUWMasked256Merging,
ssa.OpAMD64VPMULHUWMasked512Merging,
ssa.OpAMD64VMULPSMasked128Merging,
ssa.OpAMD64VMULPSMasked256Merging,
ssa.OpAMD64VMULPSMasked512Merging,
ssa.OpAMD64VMULPDMasked128Merging,
ssa.OpAMD64VMULPDMasked256Merging,
ssa.OpAMD64VMULPDMasked512Merging,
ssa.OpAMD64VPMULLWMasked128Merging,
ssa.OpAMD64VPMULLWMasked256Merging,
ssa.OpAMD64VPMULLWMasked512Merging,
ssa.OpAMD64VPMULLDMasked128Merging,
ssa.OpAMD64VPMULLDMasked256Merging,
ssa.OpAMD64VPMULLDMasked512Merging,
ssa.OpAMD64VPMULLQMasked128Merging,
ssa.OpAMD64VPMULLQMasked256Merging,
ssa.OpAMD64VPMULLQMasked512Merging,
[dev.simd] cmd/compile: add fused mul add sub ops This CL is generated by CL 680595. Change-Id: I5e06ea9bc6a62593fc3b00fd44c119a5ed0d9e90 Reviewed-on: https://go-review.googlesource.com/c/go/+/681299 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-06-12 16:45:00 +00:00
ssa.OpAMD64VFMSUBADD213PSMasked128,
ssa.OpAMD64VFMSUBADD213PSMasked256,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VFMSUBADD213PSMasked512,
[dev.simd] cmd/compile: add fused mul add sub ops This CL is generated by CL 680595. Change-Id: I5e06ea9bc6a62593fc3b00fd44c119a5ed0d9e90 Reviewed-on: https://go-review.googlesource.com/c/go/+/681299 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-06-12 16:45:00 +00:00
ssa.OpAMD64VFMSUBADD213PDMasked128,
ssa.OpAMD64VFMSUBADD213PDMasked256,
ssa.OpAMD64VFMSUBADD213PDMasked512,
[dev.simd] cmd/compile: add masked merging ops and optimizations This CL generates optimizations for masked variant of AVX512 instructions for patterns: x.Op(y).Merge(z, mask) => OpMasked(z, x, y mask), where OpMasked is resultInArg0. Change-Id: Ife7ccc9ddbf76ae921a085bd6a42b965da9bc179 Reviewed-on: https://go-review.googlesource.com/c/go/+/718160 Reviewed-by: David Chase <drchase@google.com> TryBot-Bypass: Junyang Shao <shaojunyang@google.com>
2025-11-05 19:25:00 +00:00
ssa.OpAMD64VPORDMasked128Merging,
ssa.OpAMD64VPORDMasked256Merging,
ssa.OpAMD64VPORDMasked512Merging,
ssa.OpAMD64VPORQMasked128Merging,
ssa.OpAMD64VPORQMasked256Merging,
ssa.OpAMD64VPORQMasked512Merging,
[dev.simd] cmd/compile, simd: add variable Permute This CL also added some tests for them. This CL is generated by CL 687919. Change-Id: I9ddd2cd23bb98ecca91bfbeaffd62faa4bd85e0d Reviewed-on: https://go-review.googlesource.com/c/go/+/687939 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-14 19:39:44 +00:00
ssa.OpAMD64VPERMI2BMasked128,
ssa.OpAMD64VPERMI2BMasked256,
ssa.OpAMD64VPERMI2BMasked512,
ssa.OpAMD64VPERMI2WMasked128,
ssa.OpAMD64VPERMI2WMasked256,
ssa.OpAMD64VPERMI2WMasked512,
ssa.OpAMD64VPERMI2PSMasked128,
ssa.OpAMD64VPERMI2DMasked128,
ssa.OpAMD64VPERMI2PSMasked256,
ssa.OpAMD64VPERMI2DMasked256,
ssa.OpAMD64VPERMI2PSMasked512,
ssa.OpAMD64VPERMI2DMasked512,
ssa.OpAMD64VPERMI2PDMasked128,
ssa.OpAMD64VPERMI2QMasked128,
ssa.OpAMD64VPERMI2PDMasked256,
ssa.OpAMD64VPERMI2QMasked256,
ssa.OpAMD64VPERMI2PDMasked512,
ssa.OpAMD64VPERMI2QMasked512,
[dev.simd] cmd/compile: add masked merging ops and optimizations This CL generates optimizations for masked variant of AVX512 instructions for patterns: x.Op(y).Merge(z, mask) => OpMasked(z, x, y mask), where OpMasked is resultInArg0. Change-Id: Ife7ccc9ddbf76ae921a085bd6a42b965da9bc179 Reviewed-on: https://go-review.googlesource.com/c/go/+/718160 Reviewed-by: David Chase <drchase@google.com> TryBot-Bypass: Junyang Shao <shaojunyang@google.com>
2025-11-05 19:25:00 +00:00
ssa.OpAMD64VPSHUFBMasked256Merging,
ssa.OpAMD64VPSHUFBMasked512Merging,
ssa.OpAMD64VPSHUFBMasked128Merging,
ssa.OpAMD64VPROLVDMasked128Merging,
ssa.OpAMD64VPROLVDMasked256Merging,
ssa.OpAMD64VPROLVDMasked512Merging,
ssa.OpAMD64VPROLVQMasked128Merging,
ssa.OpAMD64VPROLVQMasked256Merging,
ssa.OpAMD64VPROLVQMasked512Merging,
ssa.OpAMD64VPRORVDMasked128Merging,
ssa.OpAMD64VPRORVDMasked256Merging,
ssa.OpAMD64VPRORVDMasked512Merging,
ssa.OpAMD64VPRORVQMasked128Merging,
ssa.OpAMD64VPRORVQMasked256Merging,
ssa.OpAMD64VPRORVQMasked512Merging,
ssa.OpAMD64VSCALEFPSMasked128Merging,
ssa.OpAMD64VSCALEFPSMasked256Merging,
ssa.OpAMD64VSCALEFPSMasked512Merging,
ssa.OpAMD64VSCALEFPDMasked128Merging,
ssa.OpAMD64VSCALEFPDMasked256Merging,
ssa.OpAMD64VSCALEFPDMasked512Merging,
ssa.OpAMD64VPSHLDWMasked128Merging,
ssa.OpAMD64VPSHLDWMasked256Merging,
ssa.OpAMD64VPSHLDWMasked512Merging,
ssa.OpAMD64VPSHLDDMasked128Merging,
ssa.OpAMD64VPSHLDDMasked256Merging,
ssa.OpAMD64VPSHLDDMasked512Merging,
ssa.OpAMD64VPSHLDQMasked128Merging,
ssa.OpAMD64VPSHLDQMasked256Merging,
ssa.OpAMD64VPSHLDQMasked512Merging,
ssa.OpAMD64VPSHRDWMasked128Merging,
ssa.OpAMD64VPSHRDWMasked256Merging,
ssa.OpAMD64VPSHRDWMasked512Merging,
ssa.OpAMD64VPSHRDDMasked128Merging,
ssa.OpAMD64VPSHRDDMasked256Merging,
ssa.OpAMD64VPSHRDDMasked512Merging,
ssa.OpAMD64VPSHRDQMasked128Merging,
ssa.OpAMD64VPSHRDQMasked256Merging,
ssa.OpAMD64VPSHRDQMasked512Merging,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSHLDVWMasked128,
ssa.OpAMD64VPSHLDVWMasked256,
ssa.OpAMD64VPSHLDVWMasked512,
ssa.OpAMD64VPSHLDVDMasked128,
ssa.OpAMD64VPSHLDVDMasked256,
ssa.OpAMD64VPSHLDVDMasked512,
ssa.OpAMD64VPSHLDVQMasked128,
ssa.OpAMD64VPSHLDVQMasked256,
ssa.OpAMD64VPSHLDVQMasked512,
[dev.simd] cmd/compile: add masked merging ops and optimizations This CL generates optimizations for masked variant of AVX512 instructions for patterns: x.Op(y).Merge(z, mask) => OpMasked(z, x, y mask), where OpMasked is resultInArg0. Change-Id: Ife7ccc9ddbf76ae921a085bd6a42b965da9bc179 Reviewed-on: https://go-review.googlesource.com/c/go/+/718160 Reviewed-by: David Chase <drchase@google.com> TryBot-Bypass: Junyang Shao <shaojunyang@google.com>
2025-11-05 19:25:00 +00:00
ssa.OpAMD64VPSLLVWMasked128Merging,
ssa.OpAMD64VPSLLVWMasked256Merging,
ssa.OpAMD64VPSLLVWMasked512Merging,
ssa.OpAMD64VPSLLVDMasked128Merging,
ssa.OpAMD64VPSLLVDMasked256Merging,
ssa.OpAMD64VPSLLVDMasked512Merging,
ssa.OpAMD64VPSLLVQMasked128Merging,
ssa.OpAMD64VPSLLVQMasked256Merging,
ssa.OpAMD64VPSLLVQMasked512Merging,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSHRDVWMasked128,
ssa.OpAMD64VPSHRDVWMasked256,
ssa.OpAMD64VPSHRDVWMasked512,
ssa.OpAMD64VPSHRDVDMasked128,
ssa.OpAMD64VPSHRDVDMasked256,
ssa.OpAMD64VPSHRDVDMasked512,
ssa.OpAMD64VPSHRDVQMasked128,
ssa.OpAMD64VPSHRDVQMasked256,
[dev.simd] cmd/compile: add masked merging ops and optimizations This CL generates optimizations for masked variant of AVX512 instructions for patterns: x.Op(y).Merge(z, mask) => OpMasked(z, x, y mask), where OpMasked is resultInArg0. Change-Id: Ife7ccc9ddbf76ae921a085bd6a42b965da9bc179 Reviewed-on: https://go-review.googlesource.com/c/go/+/718160 Reviewed-by: David Chase <drchase@google.com> TryBot-Bypass: Junyang Shao <shaojunyang@google.com>
2025-11-05 19:25:00 +00:00
ssa.OpAMD64VPSHRDVQMasked512,
ssa.OpAMD64VPSRAVWMasked128Merging,
ssa.OpAMD64VPSRAVWMasked256Merging,
ssa.OpAMD64VPSRAVWMasked512Merging,
ssa.OpAMD64VPSRAVDMasked128Merging,
ssa.OpAMD64VPSRAVDMasked256Merging,
ssa.OpAMD64VPSRAVDMasked512Merging,
ssa.OpAMD64VPSRAVQMasked128Merging,
ssa.OpAMD64VPSRAVQMasked256Merging,
ssa.OpAMD64VPSRAVQMasked512Merging,
ssa.OpAMD64VPSRLVWMasked128Merging,
ssa.OpAMD64VPSRLVWMasked256Merging,
ssa.OpAMD64VPSRLVWMasked512Merging,
ssa.OpAMD64VPSRLVDMasked128Merging,
ssa.OpAMD64VPSRLVDMasked256Merging,
ssa.OpAMD64VPSRLVDMasked512Merging,
ssa.OpAMD64VPSRLVQMasked128Merging,
ssa.OpAMD64VPSRLVQMasked256Merging,
ssa.OpAMD64VPSRLVQMasked512Merging,
ssa.OpAMD64VSUBPSMasked128Merging,
ssa.OpAMD64VSUBPSMasked256Merging,
ssa.OpAMD64VSUBPSMasked512Merging,
ssa.OpAMD64VSUBPDMasked128Merging,
ssa.OpAMD64VSUBPDMasked256Merging,
ssa.OpAMD64VSUBPDMasked512Merging,
ssa.OpAMD64VPSUBBMasked128Merging,
ssa.OpAMD64VPSUBBMasked256Merging,
ssa.OpAMD64VPSUBBMasked512Merging,
ssa.OpAMD64VPSUBWMasked128Merging,
ssa.OpAMD64VPSUBWMasked256Merging,
ssa.OpAMD64VPSUBWMasked512Merging,
ssa.OpAMD64VPSUBDMasked128Merging,
ssa.OpAMD64VPSUBDMasked256Merging,
ssa.OpAMD64VPSUBDMasked512Merging,
ssa.OpAMD64VPSUBQMasked128Merging,
ssa.OpAMD64VPSUBQMasked256Merging,
ssa.OpAMD64VPSUBQMasked512Merging,
ssa.OpAMD64VPSUBSBMasked128Merging,
ssa.OpAMD64VPSUBSBMasked256Merging,
ssa.OpAMD64VPSUBSBMasked512Merging,
ssa.OpAMD64VPSUBSWMasked128Merging,
ssa.OpAMD64VPSUBSWMasked256Merging,
ssa.OpAMD64VPSUBSWMasked512Merging,
ssa.OpAMD64VPSUBUSBMasked128Merging,
ssa.OpAMD64VPSUBUSBMasked256Merging,
ssa.OpAMD64VPSUBUSBMasked512Merging,
ssa.OpAMD64VPSUBUSWMasked128Merging,
ssa.OpAMD64VPSUBUSWMasked256Merging,
ssa.OpAMD64VPSUBUSWMasked512Merging,
ssa.OpAMD64VPXORDMasked128Merging,
ssa.OpAMD64VPXORDMasked256Merging,
ssa.OpAMD64VPXORDMasked512Merging,
ssa.OpAMD64VPXORQMasked128Merging,
ssa.OpAMD64VPXORQMasked256Merging,
ssa.OpAMD64VPXORQMasked512Merging:
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
p = simdV3kvResultInArg0(s, v)
[dev.simd] cmd/compile: add more dot products This CL is generated by CL 680215. Change-Id: Ie085e65e0473a8e96170702d7265d379ec8812ba Reviewed-on: https://go-review.googlesource.com/c/go/+/681298 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-06-12 16:43:10 +00:00
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
case ssa.OpAMD64VPSLLW128,
ssa.OpAMD64VPSLLW256,
[dev.simd] cmd/compile, simd: adjust Shift.* operations This CL does: 1. Removes ShiftRightSignExtended, default signed vectors to shift arithmetic, and unsigned to shift logical. 2. Add the missing Shifts which were left out by YAML error in the generator. This CL is generated by CL 687595. Change-Id: I663115498adb91c82e89a8476e6748794e997cfa Reviewed-on: https://go-review.googlesource.com/c/go/+/687596 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-07-11 17:56:22 +00:00
ssa.OpAMD64VPSLLW512,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSLLD128,
ssa.OpAMD64VPSLLD256,
[dev.simd] cmd/compile, simd: adjust Shift.* operations This CL does: 1. Removes ShiftRightSignExtended, default signed vectors to shift arithmetic, and unsigned to shift logical. 2. Add the missing Shifts which were left out by YAML error in the generator. This CL is generated by CL 687595. Change-Id: I663115498adb91c82e89a8476e6748794e997cfa Reviewed-on: https://go-review.googlesource.com/c/go/+/687596 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-07-11 17:56:22 +00:00
ssa.OpAMD64VPSLLD512,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSLLQ128,
ssa.OpAMD64VPSLLQ256,
ssa.OpAMD64VPSLLQ512,
ssa.OpAMD64VPSRAW128,
ssa.OpAMD64VPSRAW256,
[dev.simd] cmd/compile, simd: adjust Shift.* operations This CL does: 1. Removes ShiftRightSignExtended, default signed vectors to shift arithmetic, and unsigned to shift logical. 2. Add the missing Shifts which were left out by YAML error in the generator. This CL is generated by CL 687595. Change-Id: I663115498adb91c82e89a8476e6748794e997cfa Reviewed-on: https://go-review.googlesource.com/c/go/+/687596 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-07-11 17:56:22 +00:00
ssa.OpAMD64VPSRAW512,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSRAD128,
ssa.OpAMD64VPSRAD256,
[dev.simd] cmd/compile, simd: adjust Shift.* operations This CL does: 1. Removes ShiftRightSignExtended, default signed vectors to shift arithmetic, and unsigned to shift logical. 2. Add the missing Shifts which were left out by YAML error in the generator. This CL is generated by CL 687595. Change-Id: I663115498adb91c82e89a8476e6748794e997cfa Reviewed-on: https://go-review.googlesource.com/c/go/+/687596 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-07-11 17:56:22 +00:00
ssa.OpAMD64VPSRAD512,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSRAQ128,
ssa.OpAMD64VPSRAQ256,
[dev.simd] cmd/compile, simd: adjust Shift.* operations This CL does: 1. Removes ShiftRightSignExtended, default signed vectors to shift arithmetic, and unsigned to shift logical. 2. Add the missing Shifts which were left out by YAML error in the generator. This CL is generated by CL 687595. Change-Id: I663115498adb91c82e89a8476e6748794e997cfa Reviewed-on: https://go-review.googlesource.com/c/go/+/687596 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-07-11 17:56:22 +00:00
ssa.OpAMD64VPSRAQ512,
ssa.OpAMD64VPSRLW128,
ssa.OpAMD64VPSRLW256,
ssa.OpAMD64VPSRLW512,
ssa.OpAMD64VPSRLD128,
ssa.OpAMD64VPSRLD256,
ssa.OpAMD64VPSRLD512,
ssa.OpAMD64VPSRLQ128,
ssa.OpAMD64VPSRLQ256,
ssa.OpAMD64VPSRLQ512:
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
p = simdVfpv(s, v)
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
[dev.simd] cmd/compile, simd: adjust Shift.* operations This CL does: 1. Removes ShiftRightSignExtended, default signed vectors to shift arithmetic, and unsigned to shift logical. 2. Add the missing Shifts which were left out by YAML error in the generator. This CL is generated by CL 687595. Change-Id: I663115498adb91c82e89a8476e6748794e997cfa Reviewed-on: https://go-review.googlesource.com/c/go/+/687596 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-07-11 17:56:22 +00:00
case ssa.OpAMD64VPSLLWMasked128,
ssa.OpAMD64VPSLLWMasked256,
ssa.OpAMD64VPSLLWMasked512,
ssa.OpAMD64VPSLLDMasked128,
ssa.OpAMD64VPSLLDMasked256,
ssa.OpAMD64VPSLLDMasked512,
ssa.OpAMD64VPSLLQMasked128,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSLLQMasked256,
ssa.OpAMD64VPSLLQMasked512,
[dev.simd] cmd/compile, simd: adjust Shift.* operations This CL does: 1. Removes ShiftRightSignExtended, default signed vectors to shift arithmetic, and unsigned to shift logical. 2. Add the missing Shifts which were left out by YAML error in the generator. This CL is generated by CL 687595. Change-Id: I663115498adb91c82e89a8476e6748794e997cfa Reviewed-on: https://go-review.googlesource.com/c/go/+/687596 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-07-11 17:56:22 +00:00
ssa.OpAMD64VPSRAWMasked128,
ssa.OpAMD64VPSRAWMasked256,
ssa.OpAMD64VPSRAWMasked512,
ssa.OpAMD64VPSRADMasked128,
ssa.OpAMD64VPSRADMasked256,
ssa.OpAMD64VPSRADMasked512,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSRAQMasked128,
ssa.OpAMD64VPSRAQMasked256,
[dev.simd] cmd/compile, simd: adjust Shift.* operations This CL does: 1. Removes ShiftRightSignExtended, default signed vectors to shift arithmetic, and unsigned to shift logical. 2. Add the missing Shifts which were left out by YAML error in the generator. This CL is generated by CL 687595. Change-Id: I663115498adb91c82e89a8476e6748794e997cfa Reviewed-on: https://go-review.googlesource.com/c/go/+/687596 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-07-11 17:56:22 +00:00
ssa.OpAMD64VPSRAQMasked512,
ssa.OpAMD64VPSRLWMasked128,
ssa.OpAMD64VPSRLWMasked256,
ssa.OpAMD64VPSRLWMasked512,
ssa.OpAMD64VPSRLDMasked128,
ssa.OpAMD64VPSRLDMasked256,
ssa.OpAMD64VPSRLDMasked512,
ssa.OpAMD64VPSRLQMasked128,
ssa.OpAMD64VPSRLQMasked256,
ssa.OpAMD64VPSRLQMasked512:
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
p = simdVfpkv(s, v)
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
[dev.simd] simd, cmd/compile: generated code for Broadcast Generated by simdgen CL 693599 This turned out to require some additional work in other places, including filling in missing methods (use OverwriteBase to get FP versions). Also includes a test. Change-Id: I2efe8967837834745f9cae661d4d4dcbb5390b6f Reviewed-on: https://go-review.googlesource.com/c/go/+/693758 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-08-05 17:34:05 -04:00
case ssa.OpAMD64VPINSRD128,
ssa.OpAMD64VPINSRQ128,
ssa.OpAMD64VPINSRB128,
ssa.OpAMD64VPINSRW128:
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
p = simdVgpvImm8(s, v)
[dev.simd] simd, cmd/compile: generated code for VPINSR[BWDQ], and test This is paired with simdgen CL 683055 Change-Id: I91d2c08a97ddd7cf06dd24478d552b962846131c Reviewed-on: https://go-review.googlesource.com/c/go/+/683035 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-20 15:30:55 -04:00
[dev.simd] cmd/compile, simd: added methods for "float" GetElem This also required a "always use operation with least OverrideBase" filter in choosing the machine instructions. The order of generated HW operations is slightly modified because the Float version of GetElem appears earlier in the sorted operations list, though it is not chosen to generate the HW Op. Change-Id: I95fa67afca9c8b6f4f18941fdcaf69afdad8055b Reviewed-on: https://go-review.googlesource.com/c/go/+/696375 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-08-14 17:26:15 -04:00
case ssa.OpAMD64VPEXTRD128,
ssa.OpAMD64VPEXTRQ128,
ssa.OpAMD64VPEXTRB128,
ssa.OpAMD64VPEXTRW128:
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
p = simdVgpImm8(s, v)
[dev.simd] cmd/compile: add simd VPEXTRA* This CL is generated by simdgen CL 683836 and this CL should be submitted after its generator. Change-Id: I1aa893b185826ad1f9fb60b85c75eda31f70623b Reviewed-on: https://go-review.googlesource.com/c/go/+/683797 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-24 18:29:38 -04:00
[dev.simd] cmd/compile, simd: rename Masked$OP to $(OP)Masked. This CL is generated by CL 686575. Change-Id: I1483189a1ae9bed51446fd69daab3f7b128549ae Reviewed-on: https://go-review.googlesource.com/c/go/+/686516 Reviewed-by: David Chase <drchase@google.com> TryBot-Bypass: David Chase <drchase@google.com>
2025-07-08 18:18:55 +00:00
case ssa.OpAMD64VGF2P8AFFINEINVQBMasked128,
[dev.simd] cmd/compile, simd: add galois field operations This CL is generated by CL 684275. Change-Id: Ie1efd0979af0ef0a56781bf9013071bf4d2c52c5 Reviewed-on: https://go-review.googlesource.com/c/go/+/684175 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-26 04:07:48 +00:00
ssa.OpAMD64VGF2P8AFFINEINVQBMasked256,
ssa.OpAMD64VGF2P8AFFINEINVQBMasked512,
[dev.simd] cmd/compile, simd: rename Masked$OP to $(OP)Masked. This CL is generated by CL 686575. Change-Id: I1483189a1ae9bed51446fd69daab3f7b128549ae Reviewed-on: https://go-review.googlesource.com/c/go/+/686516 Reviewed-by: David Chase <drchase@google.com> TryBot-Bypass: David Chase <drchase@google.com>
2025-07-08 18:18:55 +00:00
ssa.OpAMD64VGF2P8AFFINEQBMasked128,
ssa.OpAMD64VGF2P8AFFINEQBMasked256,
ssa.OpAMD64VGF2P8AFFINEQBMasked512,
[dev.simd] cmd/compile, simd: add galois field operations This CL is generated by CL 684275. Change-Id: Ie1efd0979af0ef0a56781bf9013071bf4d2c52c5 Reviewed-on: https://go-review.googlesource.com/c/go/+/684175 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-26 04:07:48 +00:00
ssa.OpAMD64VPSHLDWMasked128,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSHLDWMasked256,
ssa.OpAMD64VPSHLDWMasked512,
ssa.OpAMD64VPSHLDDMasked128,
ssa.OpAMD64VPSHLDDMasked256,
ssa.OpAMD64VPSHLDDMasked512,
ssa.OpAMD64VPSHLDQMasked128,
ssa.OpAMD64VPSHLDQMasked256,
ssa.OpAMD64VPSHLDQMasked512,
ssa.OpAMD64VPSHRDWMasked128,
ssa.OpAMD64VPSHRDWMasked256,
ssa.OpAMD64VPSHRDWMasked512,
ssa.OpAMD64VPSHRDDMasked128,
ssa.OpAMD64VPSHRDDMasked256,
ssa.OpAMD64VPSHRDDMasked512,
ssa.OpAMD64VPSHRDQMasked128,
ssa.OpAMD64VPSHRDQMasked256,
ssa.OpAMD64VPSHRDQMasked512:
[dev.simd] cmd/compile: change register mask names for simd ops This CL contains codes generated by CL 686556. Change-Id: I4d7287476b478efdc186a64c12de33528c7fb0af Reviewed-on: https://go-review.googlesource.com/c/go/+/686476 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-08 20:12:24 +00:00
p = simdV2kvImm8(s, v)
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
[dev.simd] simd/_gen/simdgen, cmd/compile: add memory op machine ops This CL adds the machine ops for memory-op and also their prog writing logic. This CL also fixes a bug in the XED parser. Previously the merge of machine ops is not checking the CPU feature, so some AVX instruction might have their "memFeatures" field set incorrectly. However since that field is not used until this CL, putting the fix here should be ok. Change-Id: I91031cbbf63453257473dd1d2ff47f7496d1a01d Reviewed-on: https://go-review.googlesource.com/c/go/+/701198 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-09-04 18:20:59 +00:00
case ssa.OpAMD64VPABSDMasked128load,
ssa.OpAMD64VPABSDMasked256load,
ssa.OpAMD64VPABSDMasked512load,
ssa.OpAMD64VPABSQMasked128load,
ssa.OpAMD64VPABSQMasked256load,
ssa.OpAMD64VPABSQMasked512load,
ssa.OpAMD64VCVTTPS2DQMasked128load,
ssa.OpAMD64VCVTTPS2DQMasked256load,
ssa.OpAMD64VCVTTPS2DQMasked512load,
ssa.OpAMD64VCVTPS2UDQMasked128load,
ssa.OpAMD64VCVTPS2UDQMasked256load,
ssa.OpAMD64VCVTPS2UDQMasked512load,
[dev.simd] cmd/compile, simd/_gen/simdgen: add const load mops This CL adds the load + const imm8 variants ofr many instructions. Change-Id: I46116906077e33eabccc111be6d16019002f3474 Reviewed-on: https://go-review.googlesource.com/c/go/+/703395 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-09-12 16:43:30 +00:00
ssa.OpAMD64VPLZCNTDMasked128load,
ssa.OpAMD64VPLZCNTDMasked256load,
ssa.OpAMD64VPLZCNTDMasked512load,
ssa.OpAMD64VPLZCNTQMasked128load,
ssa.OpAMD64VPLZCNTQMasked256load,
ssa.OpAMD64VPLZCNTQMasked512load,
[dev.simd] simd/_gen/simdgen, cmd/compile: add memory op machine ops This CL adds the machine ops for memory-op and also their prog writing logic. This CL also fixes a bug in the XED parser. Previously the merge of machine ops is not checking the CPU feature, so some AVX instruction might have their "memFeatures" field set incorrectly. However since that field is not used until this CL, putting the fix here should be ok. Change-Id: I91031cbbf63453257473dd1d2ff47f7496d1a01d Reviewed-on: https://go-review.googlesource.com/c/go/+/701198 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-09-04 18:20:59 +00:00
ssa.OpAMD64VPOPCNTDMasked128load,
ssa.OpAMD64VPOPCNTDMasked256load,
ssa.OpAMD64VPOPCNTDMasked512load,
ssa.OpAMD64VPOPCNTQMasked128load,
ssa.OpAMD64VPOPCNTQMasked256load,
ssa.OpAMD64VPOPCNTQMasked512load,
ssa.OpAMD64VRCP14PSMasked128load,
ssa.OpAMD64VRCP14PSMasked256load,
ssa.OpAMD64VRCP14PSMasked512load,
ssa.OpAMD64VRCP14PDMasked128load,
ssa.OpAMD64VRCP14PDMasked256load,
ssa.OpAMD64VRCP14PDMasked512load,
ssa.OpAMD64VRSQRT14PSMasked128load,
ssa.OpAMD64VRSQRT14PSMasked256load,
ssa.OpAMD64VRSQRT14PSMasked512load,
ssa.OpAMD64VRSQRT14PDMasked128load,
ssa.OpAMD64VRSQRT14PDMasked256load,
ssa.OpAMD64VRSQRT14PDMasked512load,
ssa.OpAMD64VSQRTPSMasked128load,
ssa.OpAMD64VSQRTPSMasked256load,
ssa.OpAMD64VSQRTPSMasked512load,
ssa.OpAMD64VSQRTPDMasked128load,
ssa.OpAMD64VSQRTPDMasked256load,
ssa.OpAMD64VSQRTPDMasked512load:
p = simdVkvload(s, v)
[dev.simd] cmd/compile, simd/_gen: make rewrite rules consistent on CPU Features The previous CL left a bug in the xed parser so that the generator can generate rules rewriting an AVX instruction to AVX512 instruction. This CL fixes that. Change-Id: I0df7e7dc6c936ce7add24a757ce7f44a15917fef Reviewed-on: https://go-review.googlesource.com/c/go/+/703399 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-09-12 18:45:39 +00:00
case ssa.OpAMD64VADDPS512load,
[dev.simd] simd/_gen/simdgen, cmd/compile: add memory op machine ops This CL adds the machine ops for memory-op and also their prog writing logic. This CL also fixes a bug in the XED parser. Previously the merge of machine ops is not checking the CPU feature, so some AVX instruction might have their "memFeatures" field set incorrectly. However since that field is not used until this CL, putting the fix here should be ok. Change-Id: I91031cbbf63453257473dd1d2ff47f7496d1a01d Reviewed-on: https://go-review.googlesource.com/c/go/+/701198 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-09-04 18:20:59 +00:00
ssa.OpAMD64VADDPD512load,
ssa.OpAMD64VPADDD512load,
ssa.OpAMD64VPADDQ512load,
ssa.OpAMD64VPANDD512load,
ssa.OpAMD64VPANDQ512load,
ssa.OpAMD64VPANDND512load,
ssa.OpAMD64VPANDNQ512load,
ssa.OpAMD64VPACKSSDW512load,
ssa.OpAMD64VPACKUSDW512load,
ssa.OpAMD64VDIVPS512load,
ssa.OpAMD64VDIVPD512load,
ssa.OpAMD64VPUNPCKHDQ512load,
ssa.OpAMD64VPUNPCKHQDQ512load,
ssa.OpAMD64VPUNPCKLDQ512load,
ssa.OpAMD64VPUNPCKLQDQ512load,
ssa.OpAMD64VMAXPS512load,
ssa.OpAMD64VMAXPD512load,
ssa.OpAMD64VPMAXSD512load,
ssa.OpAMD64VPMAXSQ128load,
ssa.OpAMD64VPMAXSQ256load,
ssa.OpAMD64VPMAXSQ512load,
ssa.OpAMD64VPMAXUD512load,
ssa.OpAMD64VPMAXUQ128load,
ssa.OpAMD64VPMAXUQ256load,
ssa.OpAMD64VPMAXUQ512load,
ssa.OpAMD64VMINPS512load,
ssa.OpAMD64VMINPD512load,
ssa.OpAMD64VPMINSD512load,
ssa.OpAMD64VPMINSQ128load,
ssa.OpAMD64VPMINSQ256load,
ssa.OpAMD64VPMINSQ512load,
ssa.OpAMD64VPMINUD512load,
ssa.OpAMD64VPMINUQ128load,
ssa.OpAMD64VPMINUQ256load,
ssa.OpAMD64VPMINUQ512load,
ssa.OpAMD64VMULPS512load,
ssa.OpAMD64VMULPD512load,
ssa.OpAMD64VPMULLD512load,
ssa.OpAMD64VPMULLQ128load,
ssa.OpAMD64VPMULLQ256load,
ssa.OpAMD64VPMULLQ512load,
ssa.OpAMD64VPORD512load,
ssa.OpAMD64VPORQ512load,
ssa.OpAMD64VPERMPS512load,
ssa.OpAMD64VPERMD512load,
ssa.OpAMD64VPERMPD256load,
ssa.OpAMD64VPERMQ256load,
ssa.OpAMD64VPERMPD512load,
ssa.OpAMD64VPERMQ512load,
ssa.OpAMD64VPROLVD128load,
ssa.OpAMD64VPROLVD256load,
ssa.OpAMD64VPROLVD512load,
ssa.OpAMD64VPROLVQ128load,
ssa.OpAMD64VPROLVQ256load,
ssa.OpAMD64VPROLVQ512load,
ssa.OpAMD64VPRORVD128load,
ssa.OpAMD64VPRORVD256load,
ssa.OpAMD64VPRORVD512load,
ssa.OpAMD64VPRORVQ128load,
ssa.OpAMD64VPRORVQ256load,
ssa.OpAMD64VPRORVQ512load,
ssa.OpAMD64VSCALEFPS128load,
ssa.OpAMD64VSCALEFPS256load,
ssa.OpAMD64VSCALEFPS512load,
ssa.OpAMD64VSCALEFPD128load,
ssa.OpAMD64VSCALEFPD256load,
ssa.OpAMD64VSCALEFPD512load,
ssa.OpAMD64VPSLLVD512load,
ssa.OpAMD64VPSLLVQ512load,
ssa.OpAMD64VPSRAVD512load,
ssa.OpAMD64VPSRAVQ128load,
ssa.OpAMD64VPSRAVQ256load,
ssa.OpAMD64VPSRAVQ512load,
ssa.OpAMD64VPSRLVD512load,
ssa.OpAMD64VPSRLVQ512load,
ssa.OpAMD64VSUBPS512load,
ssa.OpAMD64VSUBPD512load,
ssa.OpAMD64VPSUBD512load,
ssa.OpAMD64VPSUBQ512load,
ssa.OpAMD64VPXORD512load,
ssa.OpAMD64VPXORQ512load:
p = simdV21load(s, v)
[dev.simd] cmd/compile, simd/_gen: make rewrite rules consistent on CPU Features The previous CL left a bug in the xed parser so that the generator can generate rules rewriting an AVX instruction to AVX512 instruction. This CL fixes that. Change-Id: I0df7e7dc6c936ce7add24a757ce7f44a15917fef Reviewed-on: https://go-review.googlesource.com/c/go/+/703399 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-09-12 18:45:39 +00:00
case ssa.OpAMD64VPDPWSSD512load,
[dev.simd] simd/_gen/simdgen, cmd/compile: add memory op machine ops This CL adds the machine ops for memory-op and also their prog writing logic. This CL also fixes a bug in the XED parser. Previously the merge of machine ops is not checking the CPU feature, so some AVX instruction might have their "memFeatures" field set incorrectly. However since that field is not used until this CL, putting the fix here should be ok. Change-Id: I91031cbbf63453257473dd1d2ff47f7496d1a01d Reviewed-on: https://go-review.googlesource.com/c/go/+/701198 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-09-04 18:20:59 +00:00
ssa.OpAMD64VPDPBUSD512load,
ssa.OpAMD64VPDPBUSDS512load,
ssa.OpAMD64VFMADD213PS128load,
ssa.OpAMD64VFMADD213PS256load,
ssa.OpAMD64VFMADD213PS512load,
ssa.OpAMD64VFMADD213PD128load,
ssa.OpAMD64VFMADD213PD256load,
ssa.OpAMD64VFMADD213PD512load,
ssa.OpAMD64VFMADDSUB213PS128load,
ssa.OpAMD64VFMADDSUB213PS256load,
ssa.OpAMD64VFMADDSUB213PS512load,
ssa.OpAMD64VFMADDSUB213PD128load,
ssa.OpAMD64VFMADDSUB213PD256load,
ssa.OpAMD64VFMADDSUB213PD512load,
ssa.OpAMD64VFMSUBADD213PS128load,
ssa.OpAMD64VFMSUBADD213PS256load,
ssa.OpAMD64VFMSUBADD213PS512load,
ssa.OpAMD64VFMSUBADD213PD128load,
ssa.OpAMD64VFMSUBADD213PD256load,
ssa.OpAMD64VFMSUBADD213PD512load,
ssa.OpAMD64VPERMI2PS128load,
ssa.OpAMD64VPERMI2D128load,
ssa.OpAMD64VPERMI2PS256load,
ssa.OpAMD64VPERMI2D256load,
ssa.OpAMD64VPERMI2PS512load,
ssa.OpAMD64VPERMI2D512load,
ssa.OpAMD64VPERMI2PD128load,
ssa.OpAMD64VPERMI2Q128load,
ssa.OpAMD64VPERMI2PD256load,
ssa.OpAMD64VPERMI2Q256load,
ssa.OpAMD64VPERMI2PD512load,
ssa.OpAMD64VPERMI2Q512load,
ssa.OpAMD64VPSHLDVD128load,
ssa.OpAMD64VPSHLDVD256load,
ssa.OpAMD64VPSHLDVD512load,
ssa.OpAMD64VPSHLDVQ128load,
ssa.OpAMD64VPSHLDVQ256load,
ssa.OpAMD64VPSHLDVQ512load,
ssa.OpAMD64VPSHRDVD128load,
ssa.OpAMD64VPSHRDVD256load,
ssa.OpAMD64VPSHRDVD512load,
ssa.OpAMD64VPSHRDVQ128load,
ssa.OpAMD64VPSHRDVQ256load,
ssa.OpAMD64VPSHRDVQ512load:
p = simdV31loadResultInArg0(s, v)
case ssa.OpAMD64VPDPWSSDMasked128load,
ssa.OpAMD64VPDPWSSDMasked256load,
ssa.OpAMD64VPDPWSSDMasked512load,
ssa.OpAMD64VPDPBUSDMasked128load,
ssa.OpAMD64VPDPBUSDMasked256load,
ssa.OpAMD64VPDPBUSDMasked512load,
ssa.OpAMD64VPDPBUSDSMasked128load,
ssa.OpAMD64VPDPBUSDSMasked256load,
ssa.OpAMD64VPDPBUSDSMasked512load,
ssa.OpAMD64VFMADD213PSMasked128load,
ssa.OpAMD64VFMADD213PSMasked256load,
ssa.OpAMD64VFMADD213PSMasked512load,
ssa.OpAMD64VFMADD213PDMasked128load,
ssa.OpAMD64VFMADD213PDMasked256load,
ssa.OpAMD64VFMADD213PDMasked512load,
ssa.OpAMD64VFMADDSUB213PSMasked128load,
ssa.OpAMD64VFMADDSUB213PSMasked256load,
ssa.OpAMD64VFMADDSUB213PSMasked512load,
ssa.OpAMD64VFMADDSUB213PDMasked128load,
ssa.OpAMD64VFMADDSUB213PDMasked256load,
ssa.OpAMD64VFMADDSUB213PDMasked512load,
ssa.OpAMD64VFMSUBADD213PSMasked128load,
ssa.OpAMD64VFMSUBADD213PSMasked256load,
ssa.OpAMD64VFMSUBADD213PSMasked512load,
ssa.OpAMD64VFMSUBADD213PDMasked128load,
ssa.OpAMD64VFMSUBADD213PDMasked256load,
ssa.OpAMD64VFMSUBADD213PDMasked512load,
ssa.OpAMD64VPERMI2PSMasked128load,
ssa.OpAMD64VPERMI2DMasked128load,
ssa.OpAMD64VPERMI2PSMasked256load,
ssa.OpAMD64VPERMI2DMasked256load,
ssa.OpAMD64VPERMI2PSMasked512load,
ssa.OpAMD64VPERMI2DMasked512load,
ssa.OpAMD64VPERMI2PDMasked128load,
ssa.OpAMD64VPERMI2QMasked128load,
ssa.OpAMD64VPERMI2PDMasked256load,
ssa.OpAMD64VPERMI2QMasked256load,
ssa.OpAMD64VPERMI2PDMasked512load,
ssa.OpAMD64VPERMI2QMasked512load,
ssa.OpAMD64VPSHLDVDMasked128load,
ssa.OpAMD64VPSHLDVDMasked256load,
ssa.OpAMD64VPSHLDVDMasked512load,
ssa.OpAMD64VPSHLDVQMasked128load,
ssa.OpAMD64VPSHLDVQMasked256load,
ssa.OpAMD64VPSHLDVQMasked512load,
ssa.OpAMD64VPSHRDVDMasked128load,
ssa.OpAMD64VPSHRDVDMasked256load,
ssa.OpAMD64VPSHRDVDMasked512load,
ssa.OpAMD64VPSHRDVQMasked128load,
ssa.OpAMD64VPSHRDVQMasked256load,
ssa.OpAMD64VPSHRDVQMasked512load:
p = simdV3kvloadResultInArg0(s, v)
case ssa.OpAMD64VADDPSMasked128load,
ssa.OpAMD64VADDPSMasked256load,
ssa.OpAMD64VADDPSMasked512load,
ssa.OpAMD64VADDPDMasked128load,
ssa.OpAMD64VADDPDMasked256load,
ssa.OpAMD64VADDPDMasked512load,
ssa.OpAMD64VPADDDMasked128load,
ssa.OpAMD64VPADDDMasked256load,
ssa.OpAMD64VPADDDMasked512load,
ssa.OpAMD64VPADDQMasked128load,
ssa.OpAMD64VPADDQMasked256load,
ssa.OpAMD64VPADDQMasked512load,
ssa.OpAMD64VPANDDMasked128load,
ssa.OpAMD64VPANDDMasked256load,
ssa.OpAMD64VPANDDMasked512load,
ssa.OpAMD64VPANDQMasked128load,
ssa.OpAMD64VPANDQMasked256load,
ssa.OpAMD64VPANDQMasked512load,
ssa.OpAMD64VPANDNDMasked128load,
ssa.OpAMD64VPANDNDMasked256load,
ssa.OpAMD64VPANDNDMasked512load,
ssa.OpAMD64VPANDNQMasked128load,
ssa.OpAMD64VPANDNQMasked256load,
ssa.OpAMD64VPANDNQMasked512load,
ssa.OpAMD64VPACKSSDWMasked128load,
ssa.OpAMD64VPACKSSDWMasked256load,
ssa.OpAMD64VPACKSSDWMasked512load,
ssa.OpAMD64VPACKUSDWMasked128load,
ssa.OpAMD64VPACKUSDWMasked256load,
ssa.OpAMD64VPACKUSDWMasked512load,
ssa.OpAMD64VDIVPSMasked128load,
ssa.OpAMD64VDIVPSMasked256load,
ssa.OpAMD64VDIVPSMasked512load,
ssa.OpAMD64VDIVPDMasked128load,
ssa.OpAMD64VDIVPDMasked256load,
ssa.OpAMD64VDIVPDMasked512load,
ssa.OpAMD64VMAXPSMasked128load,
ssa.OpAMD64VMAXPSMasked256load,
ssa.OpAMD64VMAXPSMasked512load,
ssa.OpAMD64VMAXPDMasked128load,
ssa.OpAMD64VMAXPDMasked256load,
ssa.OpAMD64VMAXPDMasked512load,
ssa.OpAMD64VPMAXSDMasked128load,
ssa.OpAMD64VPMAXSDMasked256load,
ssa.OpAMD64VPMAXSDMasked512load,
ssa.OpAMD64VPMAXSQMasked128load,
ssa.OpAMD64VPMAXSQMasked256load,
ssa.OpAMD64VPMAXSQMasked512load,
ssa.OpAMD64VPMAXUDMasked128load,
ssa.OpAMD64VPMAXUDMasked256load,
ssa.OpAMD64VPMAXUDMasked512load,
ssa.OpAMD64VPMAXUQMasked128load,
ssa.OpAMD64VPMAXUQMasked256load,
ssa.OpAMD64VPMAXUQMasked512load,
ssa.OpAMD64VMINPSMasked128load,
ssa.OpAMD64VMINPSMasked256load,
ssa.OpAMD64VMINPSMasked512load,
ssa.OpAMD64VMINPDMasked128load,
ssa.OpAMD64VMINPDMasked256load,
ssa.OpAMD64VMINPDMasked512load,
ssa.OpAMD64VPMINSDMasked128load,
ssa.OpAMD64VPMINSDMasked256load,
ssa.OpAMD64VPMINSDMasked512load,
ssa.OpAMD64VPMINSQMasked128load,
ssa.OpAMD64VPMINSQMasked256load,
ssa.OpAMD64VPMINSQMasked512load,
ssa.OpAMD64VPMINUDMasked128load,
ssa.OpAMD64VPMINUDMasked256load,
ssa.OpAMD64VPMINUDMasked512load,
ssa.OpAMD64VPMINUQMasked128load,
ssa.OpAMD64VPMINUQMasked256load,
ssa.OpAMD64VPMINUQMasked512load,
ssa.OpAMD64VMULPSMasked128load,
ssa.OpAMD64VMULPSMasked256load,
ssa.OpAMD64VMULPSMasked512load,
ssa.OpAMD64VMULPDMasked128load,
ssa.OpAMD64VMULPDMasked256load,
ssa.OpAMD64VMULPDMasked512load,
ssa.OpAMD64VPMULLDMasked128load,
ssa.OpAMD64VPMULLDMasked256load,
ssa.OpAMD64VPMULLDMasked512load,
ssa.OpAMD64VPMULLQMasked128load,
ssa.OpAMD64VPMULLQMasked256load,
ssa.OpAMD64VPMULLQMasked512load,
ssa.OpAMD64VPORDMasked128load,
ssa.OpAMD64VPORDMasked256load,
ssa.OpAMD64VPORDMasked512load,
ssa.OpAMD64VPORQMasked128load,
ssa.OpAMD64VPORQMasked256load,
ssa.OpAMD64VPORQMasked512load,
ssa.OpAMD64VPERMPSMasked256load,
ssa.OpAMD64VPERMDMasked256load,
ssa.OpAMD64VPERMPSMasked512load,
ssa.OpAMD64VPERMDMasked512load,
ssa.OpAMD64VPERMPDMasked256load,
ssa.OpAMD64VPERMQMasked256load,
ssa.OpAMD64VPERMPDMasked512load,
ssa.OpAMD64VPERMQMasked512load,
ssa.OpAMD64VPROLVDMasked128load,
ssa.OpAMD64VPROLVDMasked256load,
ssa.OpAMD64VPROLVDMasked512load,
ssa.OpAMD64VPROLVQMasked128load,
ssa.OpAMD64VPROLVQMasked256load,
ssa.OpAMD64VPROLVQMasked512load,
ssa.OpAMD64VPRORVDMasked128load,
ssa.OpAMD64VPRORVDMasked256load,
ssa.OpAMD64VPRORVDMasked512load,
ssa.OpAMD64VPRORVQMasked128load,
ssa.OpAMD64VPRORVQMasked256load,
ssa.OpAMD64VPRORVQMasked512load,
ssa.OpAMD64VSCALEFPSMasked128load,
ssa.OpAMD64VSCALEFPSMasked256load,
ssa.OpAMD64VSCALEFPSMasked512load,
ssa.OpAMD64VSCALEFPDMasked128load,
ssa.OpAMD64VSCALEFPDMasked256load,
ssa.OpAMD64VSCALEFPDMasked512load,
ssa.OpAMD64VPSLLVDMasked128load,
ssa.OpAMD64VPSLLVDMasked256load,
ssa.OpAMD64VPSLLVDMasked512load,
ssa.OpAMD64VPSLLVQMasked128load,
ssa.OpAMD64VPSLLVQMasked256load,
ssa.OpAMD64VPSLLVQMasked512load,
ssa.OpAMD64VPSRAVDMasked128load,
ssa.OpAMD64VPSRAVDMasked256load,
ssa.OpAMD64VPSRAVDMasked512load,
ssa.OpAMD64VPSRAVQMasked128load,
ssa.OpAMD64VPSRAVQMasked256load,
ssa.OpAMD64VPSRAVQMasked512load,
ssa.OpAMD64VPSRLVDMasked128load,
ssa.OpAMD64VPSRLVDMasked256load,
ssa.OpAMD64VPSRLVDMasked512load,
ssa.OpAMD64VPSRLVQMasked128load,
ssa.OpAMD64VPSRLVQMasked256load,
ssa.OpAMD64VPSRLVQMasked512load,
ssa.OpAMD64VSUBPSMasked128load,
ssa.OpAMD64VSUBPSMasked256load,
ssa.OpAMD64VSUBPSMasked512load,
ssa.OpAMD64VSUBPDMasked128load,
ssa.OpAMD64VSUBPDMasked256load,
ssa.OpAMD64VSUBPDMasked512load,
ssa.OpAMD64VPSUBDMasked128load,
ssa.OpAMD64VPSUBDMasked256load,
ssa.OpAMD64VPSUBDMasked512load,
ssa.OpAMD64VPSUBQMasked128load,
ssa.OpAMD64VPSUBQMasked256load,
ssa.OpAMD64VPSUBQMasked512load,
ssa.OpAMD64VPXORDMasked128load,
ssa.OpAMD64VPXORDMasked256load,
ssa.OpAMD64VPXORDMasked512load,
ssa.OpAMD64VPXORQMasked128load,
ssa.OpAMD64VPXORQMasked256load,
ssa.OpAMD64VPXORQMasked512load,
ssa.OpAMD64VPBLENDMDMasked512load,
ssa.OpAMD64VPBLENDMQMasked512load:
p = simdV2kvload(s, v)
case ssa.OpAMD64VPCMPEQD512load,
ssa.OpAMD64VPCMPEQQ512load,
ssa.OpAMD64VPCMPGTD512load,
ssa.OpAMD64VPCMPGTQ512load:
p = simdV2kload(s, v)
[dev.simd] cmd/compile, simd/_gen: make rewrite rules consistent on CPU Features The previous CL left a bug in the xed parser so that the generator can generate rules rewriting an AVX instruction to AVX512 instruction. This CL fixes that. Change-Id: I0df7e7dc6c936ce7add24a757ce7f44a15917fef Reviewed-on: https://go-review.googlesource.com/c/go/+/703399 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-09-12 18:45:39 +00:00
case ssa.OpAMD64VPABSD512load,
[dev.simd] simd/_gen/simdgen, cmd/compile: add memory op machine ops This CL adds the machine ops for memory-op and also their prog writing logic. This CL also fixes a bug in the XED parser. Previously the merge of machine ops is not checking the CPU feature, so some AVX instruction might have their "memFeatures" field set incorrectly. However since that field is not used until this CL, putting the fix here should be ok. Change-Id: I91031cbbf63453257473dd1d2ff47f7496d1a01d Reviewed-on: https://go-review.googlesource.com/c/go/+/701198 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-09-04 18:20:59 +00:00
ssa.OpAMD64VPABSQ128load,
ssa.OpAMD64VPABSQ256load,
ssa.OpAMD64VPABSQ512load,
ssa.OpAMD64VCVTTPS2DQ512load,
ssa.OpAMD64VCVTPS2UDQ128load,
ssa.OpAMD64VCVTPS2UDQ256load,
ssa.OpAMD64VCVTPS2UDQ512load,
[dev.simd] cmd/compile, simd/_gen/simdgen: add const load mops This CL adds the load + const imm8 variants ofr many instructions. Change-Id: I46116906077e33eabccc111be6d16019002f3474 Reviewed-on: https://go-review.googlesource.com/c/go/+/703395 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-09-12 16:43:30 +00:00
ssa.OpAMD64VPLZCNTD128load,
ssa.OpAMD64VPLZCNTD256load,
ssa.OpAMD64VPLZCNTD512load,
ssa.OpAMD64VPLZCNTQ128load,
ssa.OpAMD64VPLZCNTQ256load,
ssa.OpAMD64VPLZCNTQ512load,
[dev.simd] simd/_gen/simdgen, cmd/compile: add memory op machine ops This CL adds the machine ops for memory-op and also their prog writing logic. This CL also fixes a bug in the XED parser. Previously the merge of machine ops is not checking the CPU feature, so some AVX instruction might have their "memFeatures" field set incorrectly. However since that field is not used until this CL, putting the fix here should be ok. Change-Id: I91031cbbf63453257473dd1d2ff47f7496d1a01d Reviewed-on: https://go-review.googlesource.com/c/go/+/701198 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-09-04 18:20:59 +00:00
ssa.OpAMD64VPOPCNTD128load,
ssa.OpAMD64VPOPCNTD256load,
ssa.OpAMD64VPOPCNTD512load,
ssa.OpAMD64VPOPCNTQ128load,
ssa.OpAMD64VPOPCNTQ256load,
ssa.OpAMD64VPOPCNTQ512load,
ssa.OpAMD64VRCP14PS512load,
ssa.OpAMD64VRCP14PD128load,
ssa.OpAMD64VRCP14PD256load,
ssa.OpAMD64VRCP14PD512load,
ssa.OpAMD64VRSQRT14PS512load,
ssa.OpAMD64VRSQRT14PD128load,
ssa.OpAMD64VRSQRT14PD256load,
ssa.OpAMD64VRSQRT14PD512load,
ssa.OpAMD64VSQRTPS512load,
ssa.OpAMD64VSQRTPD512load:
p = simdV11load(s, v)
[dev.simd] cmd/compile, simd/_gen/simdgen: add const load mops This CL adds the load + const imm8 variants ofr many instructions. Change-Id: I46116906077e33eabccc111be6d16019002f3474 Reviewed-on: https://go-review.googlesource.com/c/go/+/703395 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-09-12 16:43:30 +00:00
case ssa.OpAMD64VRNDSCALEPS128load,
ssa.OpAMD64VRNDSCALEPS256load,
ssa.OpAMD64VRNDSCALEPS512load,
ssa.OpAMD64VRNDSCALEPD128load,
ssa.OpAMD64VRNDSCALEPD256load,
ssa.OpAMD64VRNDSCALEPD512load,
ssa.OpAMD64VREDUCEPS128load,
ssa.OpAMD64VREDUCEPS256load,
ssa.OpAMD64VREDUCEPS512load,
ssa.OpAMD64VREDUCEPD128load,
ssa.OpAMD64VREDUCEPD256load,
ssa.OpAMD64VREDUCEPD512load,
ssa.OpAMD64VPSHUFD512load,
ssa.OpAMD64VPROLD128load,
ssa.OpAMD64VPROLD256load,
ssa.OpAMD64VPROLD512load,
ssa.OpAMD64VPROLQ128load,
ssa.OpAMD64VPROLQ256load,
ssa.OpAMD64VPROLQ512load,
ssa.OpAMD64VPRORD128load,
ssa.OpAMD64VPRORD256load,
ssa.OpAMD64VPRORD512load,
ssa.OpAMD64VPRORQ128load,
ssa.OpAMD64VPRORQ256load,
ssa.OpAMD64VPRORQ512load,
ssa.OpAMD64VPSLLD512constload,
ssa.OpAMD64VPSLLQ512constload,
ssa.OpAMD64VPSRLD512constload,
ssa.OpAMD64VPSRLQ512constload,
ssa.OpAMD64VPSRAD512constload,
ssa.OpAMD64VPSRAQ128constload,
ssa.OpAMD64VPSRAQ256constload,
ssa.OpAMD64VPSRAQ512constload:
p = simdV11loadImm8(s, v)
case ssa.OpAMD64VRNDSCALEPSMasked128load,
ssa.OpAMD64VRNDSCALEPSMasked256load,
ssa.OpAMD64VRNDSCALEPSMasked512load,
ssa.OpAMD64VRNDSCALEPDMasked128load,
ssa.OpAMD64VRNDSCALEPDMasked256load,
ssa.OpAMD64VRNDSCALEPDMasked512load,
ssa.OpAMD64VREDUCEPSMasked128load,
ssa.OpAMD64VREDUCEPSMasked256load,
ssa.OpAMD64VREDUCEPSMasked512load,
ssa.OpAMD64VREDUCEPDMasked128load,
ssa.OpAMD64VREDUCEPDMasked256load,
ssa.OpAMD64VREDUCEPDMasked512load,
ssa.OpAMD64VPSHUFDMasked256load,
ssa.OpAMD64VPSHUFDMasked512load,
ssa.OpAMD64VPSHUFDMasked128load,
ssa.OpAMD64VPROLDMasked128load,
ssa.OpAMD64VPROLDMasked256load,
ssa.OpAMD64VPROLDMasked512load,
ssa.OpAMD64VPROLQMasked128load,
ssa.OpAMD64VPROLQMasked256load,
ssa.OpAMD64VPROLQMasked512load,
ssa.OpAMD64VPRORDMasked128load,
ssa.OpAMD64VPRORDMasked256load,
ssa.OpAMD64VPRORDMasked512load,
ssa.OpAMD64VPRORQMasked128load,
ssa.OpAMD64VPRORQMasked256load,
ssa.OpAMD64VPRORQMasked512load,
ssa.OpAMD64VPSLLDMasked128constload,
ssa.OpAMD64VPSLLDMasked256constload,
ssa.OpAMD64VPSLLDMasked512constload,
ssa.OpAMD64VPSLLQMasked128constload,
ssa.OpAMD64VPSLLQMasked256constload,
ssa.OpAMD64VPSLLQMasked512constload,
ssa.OpAMD64VPSRLDMasked128constload,
ssa.OpAMD64VPSRLDMasked256constload,
ssa.OpAMD64VPSRLDMasked512constload,
ssa.OpAMD64VPSRLQMasked128constload,
ssa.OpAMD64VPSRLQMasked256constload,
ssa.OpAMD64VPSRLQMasked512constload,
ssa.OpAMD64VPSRADMasked128constload,
ssa.OpAMD64VPSRADMasked256constload,
ssa.OpAMD64VPSRADMasked512constload,
ssa.OpAMD64VPSRAQMasked128constload,
ssa.OpAMD64VPSRAQMasked256constload,
ssa.OpAMD64VPSRAQMasked512constload:
p = simdVkvloadImm8(s, v)
[dev.simd] cmd/compile, simd/_gen: make rewrite rules consistent on CPU Features The previous CL left a bug in the xed parser so that the generator can generate rules rewriting an AVX instruction to AVX512 instruction. This CL fixes that. Change-Id: I0df7e7dc6c936ce7add24a757ce7f44a15917fef Reviewed-on: https://go-review.googlesource.com/c/go/+/703399 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-09-12 18:45:39 +00:00
case ssa.OpAMD64VGF2P8AFFINEQB128load,
[dev.simd] cmd/compile, simd/_gen/simdgen: add const load mops This CL adds the load + const imm8 variants ofr many instructions. Change-Id: I46116906077e33eabccc111be6d16019002f3474 Reviewed-on: https://go-review.googlesource.com/c/go/+/703395 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-09-12 16:43:30 +00:00
ssa.OpAMD64VGF2P8AFFINEQB256load,
ssa.OpAMD64VGF2P8AFFINEQB512load,
ssa.OpAMD64VGF2P8AFFINEINVQB128load,
ssa.OpAMD64VGF2P8AFFINEINVQB256load,
ssa.OpAMD64VGF2P8AFFINEINVQB512load,
ssa.OpAMD64VPSHLDD128load,
ssa.OpAMD64VPSHLDD256load,
ssa.OpAMD64VPSHLDD512load,
ssa.OpAMD64VPSHLDQ128load,
ssa.OpAMD64VPSHLDQ256load,
ssa.OpAMD64VPSHLDQ512load,
ssa.OpAMD64VPSHRDD128load,
ssa.OpAMD64VPSHRDD256load,
ssa.OpAMD64VPSHRDD512load,
ssa.OpAMD64VPSHRDQ128load,
ssa.OpAMD64VPSHRDQ256load,
[dev.simd] simd, cmd/compile: added simd methods for VSHUFP[DS] These are package private, and will be hidden behind other methods in a following CL with a more general interface. Change-Id: Id090a5de06a0e2aed5cc60a11ff627c5e3b9c52d Reviewed-on: https://go-review.googlesource.com/c/go/+/698577 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-20 17:29:04 -04:00
ssa.OpAMD64VPSHRDQ512load,
ssa.OpAMD64VSHUFPS512load,
ssa.OpAMD64VSHUFPD512load:
[dev.simd] cmd/compile, simd/_gen/simdgen: add const load mops This CL adds the load + const imm8 variants ofr many instructions. Change-Id: I46116906077e33eabccc111be6d16019002f3474 Reviewed-on: https://go-review.googlesource.com/c/go/+/703395 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-09-12 16:43:30 +00:00
p = simdV21loadImm8(s, v)
case ssa.OpAMD64VCMPPS512load,
ssa.OpAMD64VCMPPD512load,
ssa.OpAMD64VPCMPUD512load,
ssa.OpAMD64VPCMPUQ512load,
ssa.OpAMD64VPCMPD512load,
ssa.OpAMD64VPCMPQ512load:
p = simdV2kloadImm8(s, v)
case ssa.OpAMD64VCMPPSMasked128load,
ssa.OpAMD64VCMPPSMasked256load,
ssa.OpAMD64VCMPPSMasked512load,
ssa.OpAMD64VCMPPDMasked128load,
ssa.OpAMD64VCMPPDMasked256load,
ssa.OpAMD64VCMPPDMasked512load,
ssa.OpAMD64VPCMPDMasked128load,
ssa.OpAMD64VPCMPDMasked256load,
ssa.OpAMD64VPCMPDMasked512load,
ssa.OpAMD64VPCMPQMasked128load,
ssa.OpAMD64VPCMPQMasked256load,
ssa.OpAMD64VPCMPQMasked512load,
ssa.OpAMD64VPCMPUDMasked128load,
ssa.OpAMD64VPCMPUDMasked256load,
ssa.OpAMD64VPCMPUDMasked512load,
ssa.OpAMD64VPCMPUQMasked128load,
ssa.OpAMD64VPCMPUQMasked256load,
ssa.OpAMD64VPCMPUQMasked512load:
p = simdV2kkloadImm8(s, v)
case ssa.OpAMD64VGF2P8AFFINEINVQBMasked128load,
ssa.OpAMD64VGF2P8AFFINEINVQBMasked256load,
ssa.OpAMD64VGF2P8AFFINEINVQBMasked512load,
ssa.OpAMD64VGF2P8AFFINEQBMasked128load,
ssa.OpAMD64VGF2P8AFFINEQBMasked256load,
ssa.OpAMD64VGF2P8AFFINEQBMasked512load,
ssa.OpAMD64VPSHLDDMasked128load,
ssa.OpAMD64VPSHLDDMasked256load,
ssa.OpAMD64VPSHLDDMasked512load,
ssa.OpAMD64VPSHLDQMasked128load,
ssa.OpAMD64VPSHLDQMasked256load,
ssa.OpAMD64VPSHLDQMasked512load,
ssa.OpAMD64VPSHRDDMasked128load,
ssa.OpAMD64VPSHRDDMasked256load,
ssa.OpAMD64VPSHRDDMasked512load,
ssa.OpAMD64VPSHRDQMasked128load,
ssa.OpAMD64VPSHRDQMasked256load,
ssa.OpAMD64VPSHRDQMasked512load:
p = simdV2kvloadImm8(s, v)
[dev.simd] cmd/compile, simd: add definitions for VPTERNLOG[DQ] This includes an non-public intrinsic for testing, and a test. Optimizations using this instruction will follow in another CL. Change-Id: I7f7a93212249a16a30bd1379c717f8a7f9915daf Reviewed-on: https://go-review.googlesource.com/c/go/+/708995 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-10-03 14:44:59 -04:00
case ssa.OpAMD64VPTERNLOGD128,
ssa.OpAMD64VPTERNLOGD256,
ssa.OpAMD64VPTERNLOGD512,
ssa.OpAMD64VPTERNLOGQ128,
ssa.OpAMD64VPTERNLOGQ256,
ssa.OpAMD64VPTERNLOGQ512:
p = simdV31ResultInArg0Imm8(s, v)
case ssa.OpAMD64VPTERNLOGD128load,
ssa.OpAMD64VPTERNLOGD256load,
ssa.OpAMD64VPTERNLOGD512load,
ssa.OpAMD64VPTERNLOGQ128load,
ssa.OpAMD64VPTERNLOGQ256load,
ssa.OpAMD64VPTERNLOGQ512load:
p = simdV31loadResultInArg0Imm8(s, v)
[dev.simd] cmd/compile, simd: add SHA features This CL also fixed some bugs left in CL 712181. Change-Id: I9cb6cd9fbaef307f352809bf21b8fec3eb62721a Reviewed-on: https://go-review.googlesource.com/c/go/+/712361 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-10-16 16:07:32 +00:00
case ssa.OpAMD64SHA1MSG1128,
ssa.OpAMD64SHA1MSG2128,
ssa.OpAMD64SHA1NEXTE128,
ssa.OpAMD64SHA256MSG1128:
p = simdV21ResultInArg0(s, v)
case ssa.OpAMD64SHA1RNDS4128:
p = simdV21ResultInArg0Imm8(s, v)
case ssa.OpAMD64SHA256RNDS2128:
p = simdV31x0AtIn2ResultInArg0(s, v)
[dev.simd] cmd/compile: add masked merging ops and optimizations This CL generates optimizations for masked variant of AVX512 instructions for patterns: x.Op(y).Merge(z, mask) => OpMasked(z, x, y mask), where OpMasked is resultInArg0. Change-Id: Ife7ccc9ddbf76ae921a085bd6a42b965da9bc179 Reviewed-on: https://go-review.googlesource.com/c/go/+/718160 Reviewed-by: David Chase <drchase@google.com> TryBot-Bypass: Junyang Shao <shaojunyang@google.com>
2025-11-05 19:25:00 +00:00
case ssa.OpAMD64VPABSBMasked128Merging,
ssa.OpAMD64VPABSBMasked256Merging,
ssa.OpAMD64VPABSBMasked512Merging,
ssa.OpAMD64VPABSWMasked128Merging,
ssa.OpAMD64VPABSWMasked256Merging,
ssa.OpAMD64VPABSWMasked512Merging,
ssa.OpAMD64VPABSDMasked128Merging,
ssa.OpAMD64VPABSDMasked256Merging,
ssa.OpAMD64VPABSDMasked512Merging,
ssa.OpAMD64VPABSQMasked128Merging,
ssa.OpAMD64VPABSQMasked256Merging,
ssa.OpAMD64VPABSQMasked512Merging,
ssa.OpAMD64VBROADCASTSSMasked128Merging,
ssa.OpAMD64VPBROADCASTQMasked128Merging,
ssa.OpAMD64VPBROADCASTBMasked128Merging,
ssa.OpAMD64VPBROADCASTWMasked128Merging,
ssa.OpAMD64VPBROADCASTDMasked128Merging,
ssa.OpAMD64VBROADCASTSSMasked256Merging,
ssa.OpAMD64VBROADCASTSDMasked256Merging,
ssa.OpAMD64VPBROADCASTBMasked256Merging,
ssa.OpAMD64VPBROADCASTWMasked256Merging,
ssa.OpAMD64VPBROADCASTDMasked256Merging,
ssa.OpAMD64VPBROADCASTQMasked256Merging,
ssa.OpAMD64VBROADCASTSSMasked512Merging,
ssa.OpAMD64VBROADCASTSDMasked512Merging,
ssa.OpAMD64VPBROADCASTBMasked512Merging,
ssa.OpAMD64VPBROADCASTWMasked512Merging,
ssa.OpAMD64VPBROADCASTDMasked512Merging,
ssa.OpAMD64VPBROADCASTQMasked512Merging,
ssa.OpAMD64VRNDSCALEPSMasked128Merging,
ssa.OpAMD64VRNDSCALEPSMasked256Merging,
ssa.OpAMD64VRNDSCALEPSMasked512Merging,
ssa.OpAMD64VRNDSCALEPDMasked128Merging,
ssa.OpAMD64VRNDSCALEPDMasked256Merging,
ssa.OpAMD64VRNDSCALEPDMasked512Merging,
ssa.OpAMD64VREDUCEPSMasked128Merging,
ssa.OpAMD64VREDUCEPSMasked256Merging,
ssa.OpAMD64VREDUCEPSMasked512Merging,
ssa.OpAMD64VREDUCEPDMasked128Merging,
ssa.OpAMD64VREDUCEPDMasked256Merging,
ssa.OpAMD64VREDUCEPDMasked512Merging,
ssa.OpAMD64VPMOVWBMasked128Merging,
ssa.OpAMD64VPMOVWBMasked256Merging,
ssa.OpAMD64VPMOVDBMasked128Merging,
ssa.OpAMD64VPMOVQBMasked128Merging,
ssa.OpAMD64VPMOVSWBMasked128Merging,
ssa.OpAMD64VPMOVSWBMasked256Merging,
ssa.OpAMD64VPMOVSDBMasked128Merging,
ssa.OpAMD64VPMOVSQBMasked128Merging,
ssa.OpAMD64VPMOVSXBWMasked256Merging,
ssa.OpAMD64VPMOVSXBWMasked512Merging,
ssa.OpAMD64VPMOVDWMasked128Merging,
ssa.OpAMD64VPMOVDWMasked256Merging,
ssa.OpAMD64VPMOVQWMasked128Merging,
ssa.OpAMD64VPMOVSDWMasked128Merging,
ssa.OpAMD64VPMOVSDWMasked256Merging,
ssa.OpAMD64VPMOVSQWMasked128Merging,
ssa.OpAMD64VPMOVSXBWMasked128Merging,
ssa.OpAMD64VCVTTPS2DQMasked128Merging,
ssa.OpAMD64VCVTTPS2DQMasked256Merging,
ssa.OpAMD64VCVTTPS2DQMasked512Merging,
ssa.OpAMD64VPMOVSXBDMasked512Merging,
ssa.OpAMD64VPMOVSXWDMasked256Merging,
ssa.OpAMD64VPMOVSXWDMasked512Merging,
ssa.OpAMD64VPMOVQDMasked128Merging,
ssa.OpAMD64VPMOVQDMasked256Merging,
ssa.OpAMD64VPMOVSQDMasked128Merging,
ssa.OpAMD64VPMOVSQDMasked256Merging,
ssa.OpAMD64VPMOVSXBDMasked128Merging,
ssa.OpAMD64VPMOVSXWDMasked128Merging,
ssa.OpAMD64VPMOVSXBDMasked256Merging,
ssa.OpAMD64VPMOVSXWQMasked512Merging,
ssa.OpAMD64VPMOVSXDQMasked256Merging,
ssa.OpAMD64VPMOVSXDQMasked512Merging,
ssa.OpAMD64VPMOVSXBQMasked128Merging,
ssa.OpAMD64VPMOVSXWQMasked128Merging,
ssa.OpAMD64VPMOVSXDQMasked128Merging,
ssa.OpAMD64VPMOVSXBQMasked256Merging,
ssa.OpAMD64VPMOVSXBQMasked512Merging,
ssa.OpAMD64VPMOVUSWBMasked128Merging,
ssa.OpAMD64VPMOVUSWBMasked256Merging,
ssa.OpAMD64VPMOVUSDBMasked128Merging,
ssa.OpAMD64VPMOVUSQBMasked128Merging,
ssa.OpAMD64VPMOVZXBWMasked256Merging,
ssa.OpAMD64VPMOVZXBWMasked512Merging,
ssa.OpAMD64VPMOVUSDWMasked128Merging,
ssa.OpAMD64VPMOVUSDWMasked256Merging,
ssa.OpAMD64VPMOVUSQWMasked128Merging,
ssa.OpAMD64VPMOVZXBWMasked128Merging,
ssa.OpAMD64VCVTPS2UDQMasked128Merging,
ssa.OpAMD64VCVTPS2UDQMasked256Merging,
ssa.OpAMD64VCVTPS2UDQMasked512Merging,
ssa.OpAMD64VPMOVZXBDMasked512Merging,
ssa.OpAMD64VPMOVZXWDMasked256Merging,
ssa.OpAMD64VPMOVZXWDMasked512Merging,
ssa.OpAMD64VPMOVUSQDMasked128Merging,
ssa.OpAMD64VPMOVUSQDMasked256Merging,
ssa.OpAMD64VPMOVZXBDMasked128Merging,
ssa.OpAMD64VPMOVZXWDMasked128Merging,
ssa.OpAMD64VPMOVZXBDMasked256Merging,
ssa.OpAMD64VPMOVZXWQMasked512Merging,
ssa.OpAMD64VPMOVZXDQMasked256Merging,
ssa.OpAMD64VPMOVZXDQMasked512Merging,
ssa.OpAMD64VPMOVZXBQMasked128Merging,
ssa.OpAMD64VPMOVZXWQMasked128Merging,
ssa.OpAMD64VPMOVZXDQMasked128Merging,
ssa.OpAMD64VPMOVSXWQMasked256Merging,
ssa.OpAMD64VPMOVZXBQMasked256Merging,
ssa.OpAMD64VPMOVZXWQMasked256Merging,
ssa.OpAMD64VPMOVZXBQMasked512Merging,
ssa.OpAMD64VPLZCNTDMasked128Merging,
ssa.OpAMD64VPLZCNTDMasked256Merging,
ssa.OpAMD64VPLZCNTDMasked512Merging,
ssa.OpAMD64VPLZCNTQMasked128Merging,
ssa.OpAMD64VPLZCNTQMasked256Merging,
ssa.OpAMD64VPLZCNTQMasked512Merging,
ssa.OpAMD64VPOPCNTBMasked128Merging,
ssa.OpAMD64VPOPCNTBMasked256Merging,
ssa.OpAMD64VPOPCNTBMasked512Merging,
ssa.OpAMD64VPOPCNTWMasked128Merging,
ssa.OpAMD64VPOPCNTWMasked256Merging,
ssa.OpAMD64VPOPCNTWMasked512Merging,
ssa.OpAMD64VPOPCNTDMasked128Merging,
ssa.OpAMD64VPOPCNTDMasked256Merging,
ssa.OpAMD64VPOPCNTDMasked512Merging,
ssa.OpAMD64VPOPCNTQMasked128Merging,
ssa.OpAMD64VPOPCNTQMasked256Merging,
ssa.OpAMD64VPOPCNTQMasked512Merging,
ssa.OpAMD64VPSHUFDMasked256Merging,
ssa.OpAMD64VPSHUFDMasked512Merging,
ssa.OpAMD64VPSHUFHWMasked256Merging,
ssa.OpAMD64VPSHUFHWMasked512Merging,
ssa.OpAMD64VPSHUFHWMasked128Merging,
ssa.OpAMD64VPSHUFDMasked128Merging,
ssa.OpAMD64VRCP14PSMasked128Merging,
ssa.OpAMD64VRCP14PSMasked256Merging,
ssa.OpAMD64VRCP14PSMasked512Merging,
ssa.OpAMD64VRCP14PDMasked128Merging,
ssa.OpAMD64VRCP14PDMasked256Merging,
ssa.OpAMD64VRCP14PDMasked512Merging,
ssa.OpAMD64VRSQRT14PSMasked128Merging,
ssa.OpAMD64VRSQRT14PSMasked256Merging,
ssa.OpAMD64VRSQRT14PSMasked512Merging,
ssa.OpAMD64VRSQRT14PDMasked128Merging,
ssa.OpAMD64VRSQRT14PDMasked256Merging,
ssa.OpAMD64VRSQRT14PDMasked512Merging,
ssa.OpAMD64VPROLDMasked128Merging,
ssa.OpAMD64VPROLDMasked256Merging,
ssa.OpAMD64VPROLDMasked512Merging,
ssa.OpAMD64VPROLQMasked128Merging,
ssa.OpAMD64VPROLQMasked256Merging,
ssa.OpAMD64VPROLQMasked512Merging,
ssa.OpAMD64VPRORDMasked128Merging,
ssa.OpAMD64VPRORDMasked256Merging,
ssa.OpAMD64VPRORDMasked512Merging,
ssa.OpAMD64VPRORQMasked128Merging,
ssa.OpAMD64VPRORQMasked256Merging,
ssa.OpAMD64VPRORQMasked512Merging,
ssa.OpAMD64VSQRTPSMasked128Merging,
ssa.OpAMD64VSQRTPSMasked256Merging,
ssa.OpAMD64VSQRTPSMasked512Merging,
ssa.OpAMD64VSQRTPDMasked128Merging,
ssa.OpAMD64VSQRTPDMasked256Merging,
ssa.OpAMD64VSQRTPDMasked512Merging,
ssa.OpAMD64VPSLLWMasked128constMerging,
ssa.OpAMD64VPSLLWMasked256constMerging,
ssa.OpAMD64VPSLLWMasked512constMerging,
ssa.OpAMD64VPSLLDMasked128constMerging,
ssa.OpAMD64VPSLLDMasked256constMerging,
ssa.OpAMD64VPSLLDMasked512constMerging,
ssa.OpAMD64VPSLLQMasked128constMerging,
ssa.OpAMD64VPSLLQMasked256constMerging,
ssa.OpAMD64VPSLLQMasked512constMerging,
ssa.OpAMD64VPSRLWMasked128constMerging,
ssa.OpAMD64VPSRLWMasked256constMerging,
ssa.OpAMD64VPSRLWMasked512constMerging,
ssa.OpAMD64VPSRLDMasked128constMerging,
ssa.OpAMD64VPSRLDMasked256constMerging,
ssa.OpAMD64VPSRLDMasked512constMerging,
ssa.OpAMD64VPSRLQMasked128constMerging,
ssa.OpAMD64VPSRLQMasked256constMerging,
ssa.OpAMD64VPSRLQMasked512constMerging,
ssa.OpAMD64VPSRAWMasked128constMerging,
ssa.OpAMD64VPSRAWMasked256constMerging,
ssa.OpAMD64VPSRAWMasked512constMerging,
ssa.OpAMD64VPSRADMasked128constMerging,
ssa.OpAMD64VPSRADMasked256constMerging,
ssa.OpAMD64VPSRADMasked512constMerging,
ssa.OpAMD64VPSRAQMasked128constMerging,
ssa.OpAMD64VPSRAQMasked256constMerging,
ssa.OpAMD64VPSRAQMasked512constMerging:
p = simdV2kvResultInArg0(s, v)
[dev.simd] cmd/compile: generated codes for amd64 SIMD This CL is generated by tool in CL 667155. Change-Id: I3829d0d2c96fe7000e2dd025a3006f96957d777a Reviewed-on: https://go-review.googlesource.com/c/go/+/675618 Reviewed-by: Junyang Shao <shaojunyang@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-05-22 19:59:12 +00:00
default:
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
// Unknown reg shape
[dev.simd] cmd/compile: generated codes for amd64 SIMD This CL is generated by tool in CL 667155. Change-Id: I3829d0d2c96fe7000e2dd025a3006f96957d777a Reviewed-on: https://go-review.googlesource.com/c/go/+/675618 Reviewed-by: Junyang Shao <shaojunyang@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-05-22 19:59:12 +00:00
return false
}
// Masked operation are always compiled with zeroing.
switch v.Op {
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
case ssa.OpAMD64VPABSBMasked128,
ssa.OpAMD64VPABSBMasked256,
ssa.OpAMD64VPABSBMasked512,
[dev.simd] cmd/compile: generated codes for amd64 SIMD This CL is generated by tool in CL 667155. Change-Id: I3829d0d2c96fe7000e2dd025a3006f96957d777a Reviewed-on: https://go-review.googlesource.com/c/go/+/675618 Reviewed-by: Junyang Shao <shaojunyang@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-05-22 19:59:12 +00:00
ssa.OpAMD64VPABSWMasked128,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPABSWMasked256,
ssa.OpAMD64VPABSWMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPABSDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPABSDMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPABSDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPABSDMasked256load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPABSDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPABSDMasked512load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPABSQMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPABSQMasked128load,
[dev.simd] cmd/compile: generated codes for amd64 SIMD This CL is generated by tool in CL 667155. Change-Id: I3829d0d2c96fe7000e2dd025a3006f96957d777a Reviewed-on: https://go-review.googlesource.com/c/go/+/675618 Reviewed-by: Junyang Shao <shaojunyang@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-05-22 19:59:12 +00:00
ssa.OpAMD64VPABSQMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPABSQMasked256load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPABSQMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPABSQMasked512load,
[dev.simd] cmd/compile, simd: change PairDotProdAccumulate to AddDotProd This CL is generated by CL 692219. Change-Id: I50fa919f1edc5c6505bc6d3238f65b37fc7628b5 Reviewed-on: https://go-review.googlesource.com/c/go/+/692156 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-31 23:51:50 +00:00
ssa.OpAMD64VPDPWSSDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPDPWSSDMasked128load,
[dev.simd] cmd/compile, simd: change PairDotProdAccumulate to AddDotProd This CL is generated by CL 692219. Change-Id: I50fa919f1edc5c6505bc6d3238f65b37fc7628b5 Reviewed-on: https://go-review.googlesource.com/c/go/+/692156 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-31 23:51:50 +00:00
ssa.OpAMD64VPDPWSSDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPDPWSSDMasked256load,
[dev.simd] cmd/compile, simd: change PairDotProdAccumulate to AddDotProd This CL is generated by CL 692219. Change-Id: I50fa919f1edc5c6505bc6d3238f65b37fc7628b5 Reviewed-on: https://go-review.googlesource.com/c/go/+/692156 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-31 23:51:50 +00:00
ssa.OpAMD64VPDPWSSDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPDPWSSDMasked512load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VPDPBUSDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPDPBUSDMasked128load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VPDPBUSDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPDPBUSDMasked256load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VPDPBUSDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPDPBUSDMasked512load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VPDPBUSDSMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPDPBUSDSMasked128load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VPDPBUSDSMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPDPBUSDSMasked256load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VPDPBUSDSMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPDPBUSDSMasked512load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VADDPSMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VADDPSMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VADDPSMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VADDPSMasked256load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VADDPSMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VADDPSMasked512load,
[dev.simd] cmd/compile: generated codes for amd64 SIMD This CL is generated by tool in CL 667155. Change-Id: I3829d0d2c96fe7000e2dd025a3006f96957d777a Reviewed-on: https://go-review.googlesource.com/c/go/+/675618 Reviewed-by: Junyang Shao <shaojunyang@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-05-22 19:59:12 +00:00
ssa.OpAMD64VADDPDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VADDPDMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VADDPDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VADDPDMasked256load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VADDPDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VADDPDMasked512load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPADDBMasked128,
ssa.OpAMD64VPADDBMasked256,
ssa.OpAMD64VPADDBMasked512,
ssa.OpAMD64VPADDWMasked128,
[dev.simd] cmd/compile: generated codes for amd64 SIMD This CL is generated by tool in CL 667155. Change-Id: I3829d0d2c96fe7000e2dd025a3006f96957d777a Reviewed-on: https://go-review.googlesource.com/c/go/+/675618 Reviewed-by: Junyang Shao <shaojunyang@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-05-22 19:59:12 +00:00
ssa.OpAMD64VPADDWMasked256,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPADDWMasked512,
ssa.OpAMD64VPADDDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPADDDMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPADDDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPADDDMasked256load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPADDDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPADDDMasked512load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPADDQMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPADDQMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPADDQMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPADDQMasked256load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPADDQMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPADDQMasked512load,
[dev.simd] simd, cmd/compile: rename some methods generated by simdgen CL 692556 these are the "easy" ones SaturatedOp -> OpSaturated PairwiseOp -> OpPairs OpWithPrecision -> OpScaled DiffWithOpWithPrecision -> OpScaledResidue Change-Id: I036bf89c0690bcf9922c376d62cef48392942af3 Reviewed-on: https://go-review.googlesource.com/c/go/+/692357 Reviewed-by: Junyang Shao <shaojunyang@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-01 15:58:29 -04:00
ssa.OpAMD64VPADDSBMasked128,
ssa.OpAMD64VPADDSBMasked256,
ssa.OpAMD64VPADDSBMasked512,
ssa.OpAMD64VPADDSWMasked128,
ssa.OpAMD64VPADDSWMasked256,
ssa.OpAMD64VPADDSWMasked512,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VPADDUSBMasked128,
ssa.OpAMD64VPADDUSBMasked256,
ssa.OpAMD64VPADDUSBMasked512,
ssa.OpAMD64VPADDUSWMasked128,
ssa.OpAMD64VPADDUSWMasked256,
ssa.OpAMD64VPADDUSWMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPANDDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPANDDMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPANDDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPANDDMasked256load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPANDDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPANDDMasked512load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPANDQMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPANDQMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPANDQMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPANDQMasked256load,
[dev.simd] cmd/compile: generated codes for amd64 SIMD This CL is generated by tool in CL 667155. Change-Id: I3829d0d2c96fe7000e2dd025a3006f96957d777a Reviewed-on: https://go-review.googlesource.com/c/go/+/675618 Reviewed-by: Junyang Shao <shaojunyang@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-05-22 19:59:12 +00:00
ssa.OpAMD64VPANDQMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPANDQMasked512load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPANDNDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPANDNDMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPANDNDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPANDNDMasked256load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPANDNDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPANDNDMasked512load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPANDNQMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPANDNQMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPANDNQMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPANDNQMasked256load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPANDNQMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPANDNQMasked512load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPAVGBMasked128,
ssa.OpAMD64VPAVGBMasked256,
ssa.OpAMD64VPAVGBMasked512,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPAVGWMasked128,
ssa.OpAMD64VPAVGWMasked256,
ssa.OpAMD64VPAVGWMasked512,
[dev.simd] simd, cmd/compile: generated code for Broadcast Generated by simdgen CL 693599 This turned out to require some additional work in other places, including filling in missing methods (use OverwriteBase to get FP versions). Also includes a test. Change-Id: I2efe8967837834745f9cae661d4d4dcbb5390b6f Reviewed-on: https://go-review.googlesource.com/c/go/+/693758 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-08-05 17:34:05 -04:00
ssa.OpAMD64VBROADCASTSSMasked128,
ssa.OpAMD64VPBROADCASTQMasked128,
ssa.OpAMD64VPBROADCASTBMasked128,
ssa.OpAMD64VPBROADCASTWMasked128,
ssa.OpAMD64VPBROADCASTDMasked128,
ssa.OpAMD64VBROADCASTSSMasked256,
ssa.OpAMD64VBROADCASTSDMasked256,
ssa.OpAMD64VPBROADCASTBMasked256,
ssa.OpAMD64VPBROADCASTWMasked256,
ssa.OpAMD64VPBROADCASTDMasked256,
ssa.OpAMD64VPBROADCASTQMasked256,
ssa.OpAMD64VBROADCASTSSMasked512,
ssa.OpAMD64VBROADCASTSDMasked512,
ssa.OpAMD64VPBROADCASTBMasked512,
ssa.OpAMD64VPBROADCASTWMasked512,
ssa.OpAMD64VPBROADCASTDMasked512,
ssa.OpAMD64VPBROADCASTQMasked512,
[dev.simd] cmd/compile: add round simd ops This CL is generated by CL 678195. Change-Id: Ica600229a4e9623fa45f3b5aa370cdd6d9c31686 Reviewed-on: https://go-review.googlesource.com/c/go/+/681295 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-12 16:21:35 +00:00
ssa.OpAMD64VRNDSCALEPSMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VRNDSCALEPSMasked128load,
[dev.simd] cmd/compile: add round simd ops This CL is generated by CL 678195. Change-Id: Ica600229a4e9623fa45f3b5aa370cdd6d9c31686 Reviewed-on: https://go-review.googlesource.com/c/go/+/681295 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-12 16:21:35 +00:00
ssa.OpAMD64VRNDSCALEPSMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VRNDSCALEPSMasked256load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VRNDSCALEPSMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VRNDSCALEPSMasked512load,
[dev.simd] cmd/compile: add round simd ops This CL is generated by CL 678195. Change-Id: Ica600229a4e9623fa45f3b5aa370cdd6d9c31686 Reviewed-on: https://go-review.googlesource.com/c/go/+/681295 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-12 16:21:35 +00:00
ssa.OpAMD64VRNDSCALEPDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VRNDSCALEPDMasked128load,
[dev.simd] cmd/compile: add round simd ops This CL is generated by CL 678195. Change-Id: Ica600229a4e9623fa45f3b5aa370cdd6d9c31686 Reviewed-on: https://go-review.googlesource.com/c/go/+/681295 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-12 16:21:35 +00:00
ssa.OpAMD64VRNDSCALEPDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VRNDSCALEPDMasked256load,
[dev.simd] cmd/compile: add round simd ops This CL is generated by CL 678195. Change-Id: Ica600229a4e9623fa45f3b5aa370cdd6d9c31686 Reviewed-on: https://go-review.googlesource.com/c/go/+/681295 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-12 16:21:35 +00:00
ssa.OpAMD64VRNDSCALEPDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VRNDSCALEPDMasked512load,
[dev.simd] simd, cmd/compile: rename some methods generated by simdgen CL 692556 these are the "easy" ones SaturatedOp -> OpSaturated PairwiseOp -> OpPairs OpWithPrecision -> OpScaled DiffWithOpWithPrecision -> OpScaledResidue Change-Id: I036bf89c0690bcf9922c376d62cef48392942af3 Reviewed-on: https://go-review.googlesource.com/c/go/+/692357 Reviewed-by: Junyang Shao <shaojunyang@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-01 15:58:29 -04:00
ssa.OpAMD64VREDUCEPSMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VREDUCEPSMasked128load,
[dev.simd] simd, cmd/compile: rename some methods generated by simdgen CL 692556 these are the "easy" ones SaturatedOp -> OpSaturated PairwiseOp -> OpPairs OpWithPrecision -> OpScaled DiffWithOpWithPrecision -> OpScaledResidue Change-Id: I036bf89c0690bcf9922c376d62cef48392942af3 Reviewed-on: https://go-review.googlesource.com/c/go/+/692357 Reviewed-by: Junyang Shao <shaojunyang@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-01 15:58:29 -04:00
ssa.OpAMD64VREDUCEPSMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VREDUCEPSMasked256load,
[dev.simd] simd, cmd/compile: rename some methods generated by simdgen CL 692556 these are the "easy" ones SaturatedOp -> OpSaturated PairwiseOp -> OpPairs OpWithPrecision -> OpScaled DiffWithOpWithPrecision -> OpScaledResidue Change-Id: I036bf89c0690bcf9922c376d62cef48392942af3 Reviewed-on: https://go-review.googlesource.com/c/go/+/692357 Reviewed-by: Junyang Shao <shaojunyang@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-01 15:58:29 -04:00
ssa.OpAMD64VREDUCEPSMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VREDUCEPSMasked512load,
[dev.simd] simd, cmd/compile: rename some methods generated by simdgen CL 692556 these are the "easy" ones SaturatedOp -> OpSaturated PairwiseOp -> OpPairs OpWithPrecision -> OpScaled DiffWithOpWithPrecision -> OpScaledResidue Change-Id: I036bf89c0690bcf9922c376d62cef48392942af3 Reviewed-on: https://go-review.googlesource.com/c/go/+/692357 Reviewed-by: Junyang Shao <shaojunyang@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-01 15:58:29 -04:00
ssa.OpAMD64VREDUCEPDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VREDUCEPDMasked128load,
[dev.simd] simd, cmd/compile: rename some methods generated by simdgen CL 692556 these are the "easy" ones SaturatedOp -> OpSaturated PairwiseOp -> OpPairs OpWithPrecision -> OpScaled DiffWithOpWithPrecision -> OpScaledResidue Change-Id: I036bf89c0690bcf9922c376d62cef48392942af3 Reviewed-on: https://go-review.googlesource.com/c/go/+/692357 Reviewed-by: Junyang Shao <shaojunyang@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-01 15:58:29 -04:00
ssa.OpAMD64VREDUCEPDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VREDUCEPDMasked256load,
[dev.simd] simd, cmd/compile: rename some methods generated by simdgen CL 692556 these are the "easy" ones SaturatedOp -> OpSaturated PairwiseOp -> OpPairs OpWithPrecision -> OpScaled DiffWithOpWithPrecision -> OpScaledResidue Change-Id: I036bf89c0690bcf9922c376d62cef48392942af3 Reviewed-on: https://go-review.googlesource.com/c/go/+/692357 Reviewed-by: Junyang Shao <shaojunyang@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-01 15:58:29 -04:00
ssa.OpAMD64VREDUCEPDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VREDUCEPDMasked512load,
[dev.simd] cmd/compile, simd: add Compress This CL is generated by CL 687975. Change-Id: I21707d108773cc6d8e6f07aaed60e756faa1e6cb Reviewed-on: https://go-review.googlesource.com/c/go/+/687995 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-14 20:29:46 +00:00
ssa.OpAMD64VCOMPRESSPSMasked128,
ssa.OpAMD64VCOMPRESSPSMasked256,
ssa.OpAMD64VCOMPRESSPSMasked512,
ssa.OpAMD64VCOMPRESSPDMasked128,
ssa.OpAMD64VCOMPRESSPDMasked256,
ssa.OpAMD64VCOMPRESSPDMasked512,
ssa.OpAMD64VPCOMPRESSBMasked128,
ssa.OpAMD64VPCOMPRESSBMasked256,
ssa.OpAMD64VPCOMPRESSBMasked512,
ssa.OpAMD64VPCOMPRESSWMasked128,
ssa.OpAMD64VPCOMPRESSWMasked256,
ssa.OpAMD64VPCOMPRESSWMasked512,
ssa.OpAMD64VPCOMPRESSDMasked128,
ssa.OpAMD64VPCOMPRESSDMasked256,
ssa.OpAMD64VPCOMPRESSDMasked512,
ssa.OpAMD64VPCOMPRESSQMasked128,
ssa.OpAMD64VPCOMPRESSQMasked256,
ssa.OpAMD64VPCOMPRESSQMasked512,
[dev.simd] cmd/compile, simd: complete truncating u?int conversions. Downsizing conversions' truncating version complete. Saturation ver not done. Change-Id: I710976c2b5329e2882763d60fcef2a827213df09 Reviewed-on: https://go-review.googlesource.com/c/go/+/697975 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 04:33:46 +00:00
ssa.OpAMD64VPMOVWBMasked128,
ssa.OpAMD64VPMOVWBMasked256,
ssa.OpAMD64VPMOVDBMasked128,
ssa.OpAMD64VPMOVQBMasked128,
[dev.simd] cmd/compile, simd: add saturated u?int conversions Change-Id: I0c7f2d7ec31c59c95568ff8d4560989de849427e Reviewed-on: https://go-review.googlesource.com/c/go/+/698235 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 17:33:50 +00:00
ssa.OpAMD64VPMOVSWBMasked128,
ssa.OpAMD64VPMOVSWBMasked256,
ssa.OpAMD64VPMOVSDBMasked128,
ssa.OpAMD64VPMOVSQBMasked128,
[dev.simd] cmd/compile, simd: complete u?int widening conversions Change-Id: I21da09261b6b278768d99229fe2db387aef1e812 Reviewed-on: https://go-review.googlesource.com/c/go/+/697915 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 02:47:53 +00:00
ssa.OpAMD64VPMOVSXBWMasked256,
ssa.OpAMD64VPMOVSXBWMasked512,
[dev.simd] cmd/compile, simd: complete truncating u?int conversions. Downsizing conversions' truncating version complete. Saturation ver not done. Change-Id: I710976c2b5329e2882763d60fcef2a827213df09 Reviewed-on: https://go-review.googlesource.com/c/go/+/697975 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 04:33:46 +00:00
ssa.OpAMD64VPMOVDWMasked128,
ssa.OpAMD64VPMOVDWMasked256,
ssa.OpAMD64VPMOVQWMasked128,
[dev.simd] cmd/compile, simd: add saturated u?int conversions Change-Id: I0c7f2d7ec31c59c95568ff8d4560989de849427e Reviewed-on: https://go-review.googlesource.com/c/go/+/698235 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 17:33:50 +00:00
ssa.OpAMD64VPMOVSDWMasked128,
ssa.OpAMD64VPMOVSDWMasked256,
ssa.OpAMD64VPMOVSQWMasked128,
[dev.simd] cmd/compile, simd: add packed saturated u?int conversions This CL should complete the conversions between int and uint. Change-Id: I46742a62214f346e014a68b9c72a9b116a127f67 Reviewed-on: https://go-review.googlesource.com/c/go/+/698236 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Commit-Queue: David Chase <drchase@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-21 17:45:37 +00:00
ssa.OpAMD64VPACKSSDWMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPACKSSDWMasked128load,
[dev.simd] cmd/compile, simd: add packed saturated u?int conversions This CL should complete the conversions between int and uint. Change-Id: I46742a62214f346e014a68b9c72a9b116a127f67 Reviewed-on: https://go-review.googlesource.com/c/go/+/698236 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Commit-Queue: David Chase <drchase@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-21 17:45:37 +00:00
ssa.OpAMD64VPACKSSDWMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPACKSSDWMasked256load,
[dev.simd] cmd/compile, simd: add packed saturated u?int conversions This CL should complete the conversions between int and uint. Change-Id: I46742a62214f346e014a68b9c72a9b116a127f67 Reviewed-on: https://go-review.googlesource.com/c/go/+/698236 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Commit-Queue: David Chase <drchase@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-21 17:45:37 +00:00
ssa.OpAMD64VPACKSSDWMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPACKSSDWMasked512load,
[dev.simd] cmd/compile, simd: complete u?int widening conversions Change-Id: I21da09261b6b278768d99229fe2db387aef1e812 Reviewed-on: https://go-review.googlesource.com/c/go/+/697915 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 02:47:53 +00:00
ssa.OpAMD64VPMOVSXBWMasked128,
[dev.simd] cmd/compile: generated simd code to add some conversions Generated by arch/internal/simdgen CL 689735 A small number of conversions for testing purposes Change-Id: I4d52c643d08c02794c3fea9778bb1ecbb5507de4 Reviewed-on: https://go-review.googlesource.com/c/go/+/689716 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-22 15:02:45 -04:00
ssa.OpAMD64VCVTTPS2DQMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VCVTTPS2DQMasked128load,
[dev.simd] cmd/compile: generated simd code to add some conversions Generated by arch/internal/simdgen CL 689735 A small number of conversions for testing purposes Change-Id: I4d52c643d08c02794c3fea9778bb1ecbb5507de4 Reviewed-on: https://go-review.googlesource.com/c/go/+/689716 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-22 15:02:45 -04:00
ssa.OpAMD64VCVTTPS2DQMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VCVTTPS2DQMasked256load,
[dev.simd] cmd/compile: generated simd code to add some conversions Generated by arch/internal/simdgen CL 689735 A small number of conversions for testing purposes Change-Id: I4d52c643d08c02794c3fea9778bb1ecbb5507de4 Reviewed-on: https://go-review.googlesource.com/c/go/+/689716 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-22 15:02:45 -04:00
ssa.OpAMD64VCVTTPS2DQMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VCVTTPS2DQMasked512load,
[dev.simd] cmd/compile, simd: complete u?int widening conversions Change-Id: I21da09261b6b278768d99229fe2db387aef1e812 Reviewed-on: https://go-review.googlesource.com/c/go/+/697915 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 02:47:53 +00:00
ssa.OpAMD64VPMOVSXBDMasked512,
ssa.OpAMD64VPMOVSXWDMasked256,
ssa.OpAMD64VPMOVSXWDMasked512,
[dev.simd] cmd/compile, simd: complete truncating u?int conversions. Downsizing conversions' truncating version complete. Saturation ver not done. Change-Id: I710976c2b5329e2882763d60fcef2a827213df09 Reviewed-on: https://go-review.googlesource.com/c/go/+/697975 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 04:33:46 +00:00
ssa.OpAMD64VPMOVQDMasked128,
ssa.OpAMD64VPMOVQDMasked256,
[dev.simd] cmd/compile, simd: add saturated u?int conversions Change-Id: I0c7f2d7ec31c59c95568ff8d4560989de849427e Reviewed-on: https://go-review.googlesource.com/c/go/+/698235 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 17:33:50 +00:00
ssa.OpAMD64VPMOVSQDMasked128,
ssa.OpAMD64VPMOVSQDMasked256,
[dev.simd] cmd/compile, simd: complete u?int widening conversions Change-Id: I21da09261b6b278768d99229fe2db387aef1e812 Reviewed-on: https://go-review.googlesource.com/c/go/+/697915 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 02:47:53 +00:00
ssa.OpAMD64VPMOVSXBDMasked128,
ssa.OpAMD64VPMOVSXWDMasked128,
ssa.OpAMD64VPMOVSXBDMasked256,
ssa.OpAMD64VPMOVSXWQMasked512,
ssa.OpAMD64VPMOVSXDQMasked256,
ssa.OpAMD64VPMOVSXDQMasked512,
ssa.OpAMD64VPMOVSXBQMasked128,
ssa.OpAMD64VPMOVSXWQMasked128,
ssa.OpAMD64VPMOVSXDQMasked128,
ssa.OpAMD64VPMOVSXBQMasked256,
ssa.OpAMD64VPMOVSXBQMasked512,
[dev.simd] cmd/compile, simd: add saturated u?int conversions Change-Id: I0c7f2d7ec31c59c95568ff8d4560989de849427e Reviewed-on: https://go-review.googlesource.com/c/go/+/698235 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 17:33:50 +00:00
ssa.OpAMD64VPMOVUSWBMasked128,
ssa.OpAMD64VPMOVUSWBMasked256,
ssa.OpAMD64VPMOVUSDBMasked128,
ssa.OpAMD64VPMOVUSQBMasked128,
[dev.simd] simd, cmd/compile: add widening unsigned converts 8->16->32 Change-Id: If0bde7154bd622573375eba5539fd642b8ef9d2f Reviewed-on: https://go-review.googlesource.com/c/go/+/696555 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-08-15 17:05:05 -04:00
ssa.OpAMD64VPMOVZXBWMasked256,
ssa.OpAMD64VPMOVZXBWMasked512,
[dev.simd] cmd/compile, simd: add saturated u?int conversions Change-Id: I0c7f2d7ec31c59c95568ff8d4560989de849427e Reviewed-on: https://go-review.googlesource.com/c/go/+/698235 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 17:33:50 +00:00
ssa.OpAMD64VPMOVUSDWMasked128,
ssa.OpAMD64VPMOVUSDWMasked256,
ssa.OpAMD64VPMOVUSQWMasked128,
[dev.simd] cmd/compile, simd: add packed saturated u?int conversions This CL should complete the conversions between int and uint. Change-Id: I46742a62214f346e014a68b9c72a9b116a127f67 Reviewed-on: https://go-review.googlesource.com/c/go/+/698236 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Commit-Queue: David Chase <drchase@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-21 17:45:37 +00:00
ssa.OpAMD64VPACKUSDWMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPACKUSDWMasked128load,
[dev.simd] cmd/compile, simd: add packed saturated u?int conversions This CL should complete the conversions between int and uint. Change-Id: I46742a62214f346e014a68b9c72a9b116a127f67 Reviewed-on: https://go-review.googlesource.com/c/go/+/698236 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Commit-Queue: David Chase <drchase@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-21 17:45:37 +00:00
ssa.OpAMD64VPACKUSDWMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPACKUSDWMasked256load,
[dev.simd] cmd/compile, simd: add packed saturated u?int conversions This CL should complete the conversions between int and uint. Change-Id: I46742a62214f346e014a68b9c72a9b116a127f67 Reviewed-on: https://go-review.googlesource.com/c/go/+/698236 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Commit-Queue: David Chase <drchase@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-21 17:45:37 +00:00
ssa.OpAMD64VPACKUSDWMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPACKUSDWMasked512load,
[dev.simd] simd, cmd/compile: add widening unsigned converts 8->16->32 Change-Id: If0bde7154bd622573375eba5539fd642b8ef9d2f Reviewed-on: https://go-review.googlesource.com/c/go/+/696555 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-08-15 17:05:05 -04:00
ssa.OpAMD64VPMOVZXBWMasked128,
[dev.simd] cmd/compile: generated simd code to add some conversions Generated by arch/internal/simdgen CL 689735 A small number of conversions for testing purposes Change-Id: I4d52c643d08c02794c3fea9778bb1ecbb5507de4 Reviewed-on: https://go-review.googlesource.com/c/go/+/689716 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-22 15:02:45 -04:00
ssa.OpAMD64VCVTPS2UDQMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VCVTPS2UDQMasked128load,
[dev.simd] cmd/compile: generated simd code to add some conversions Generated by arch/internal/simdgen CL 689735 A small number of conversions for testing purposes Change-Id: I4d52c643d08c02794c3fea9778bb1ecbb5507de4 Reviewed-on: https://go-review.googlesource.com/c/go/+/689716 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-22 15:02:45 -04:00
ssa.OpAMD64VCVTPS2UDQMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VCVTPS2UDQMasked256load,
[dev.simd] cmd/compile: generated simd code to add some conversions Generated by arch/internal/simdgen CL 689735 A small number of conversions for testing purposes Change-Id: I4d52c643d08c02794c3fea9778bb1ecbb5507de4 Reviewed-on: https://go-review.googlesource.com/c/go/+/689716 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-07-22 15:02:45 -04:00
ssa.OpAMD64VCVTPS2UDQMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VCVTPS2UDQMasked512load,
[dev.simd] cmd/compile, simd: complete u?int widening conversions Change-Id: I21da09261b6b278768d99229fe2db387aef1e812 Reviewed-on: https://go-review.googlesource.com/c/go/+/697915 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 02:47:53 +00:00
ssa.OpAMD64VPMOVZXBDMasked512,
[dev.simd] simd, cmd/compile: add widening unsigned converts 8->16->32 Change-Id: If0bde7154bd622573375eba5539fd642b8ef9d2f Reviewed-on: https://go-review.googlesource.com/c/go/+/696555 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-08-15 17:05:05 -04:00
ssa.OpAMD64VPMOVZXWDMasked256,
ssa.OpAMD64VPMOVZXWDMasked512,
[dev.simd] cmd/compile, simd: add saturated u?int conversions Change-Id: I0c7f2d7ec31c59c95568ff8d4560989de849427e Reviewed-on: https://go-review.googlesource.com/c/go/+/698235 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 17:33:50 +00:00
ssa.OpAMD64VPMOVUSQDMasked128,
ssa.OpAMD64VPMOVUSQDMasked256,
[dev.simd] cmd/compile, simd: complete u?int widening conversions Change-Id: I21da09261b6b278768d99229fe2db387aef1e812 Reviewed-on: https://go-review.googlesource.com/c/go/+/697915 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 02:47:53 +00:00
ssa.OpAMD64VPMOVZXBDMasked128,
[dev.simd] simd, cmd/compile: add widening unsigned converts 8->16->32 Change-Id: If0bde7154bd622573375eba5539fd642b8ef9d2f Reviewed-on: https://go-review.googlesource.com/c/go/+/696555 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-08-15 17:05:05 -04:00
ssa.OpAMD64VPMOVZXWDMasked128,
[dev.simd] cmd/compile, simd: complete u?int widening conversions Change-Id: I21da09261b6b278768d99229fe2db387aef1e812 Reviewed-on: https://go-review.googlesource.com/c/go/+/697915 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-21 02:47:53 +00:00
ssa.OpAMD64VPMOVZXBDMasked256,
ssa.OpAMD64VPMOVZXWQMasked512,
ssa.OpAMD64VPMOVZXDQMasked256,
ssa.OpAMD64VPMOVZXDQMasked512,
ssa.OpAMD64VPMOVZXBQMasked128,
ssa.OpAMD64VPMOVZXWQMasked128,
ssa.OpAMD64VPMOVZXDQMasked128,
ssa.OpAMD64VPMOVSXWQMasked256,
ssa.OpAMD64VPMOVZXBQMasked256,
ssa.OpAMD64VPMOVZXWQMasked256,
ssa.OpAMD64VPMOVZXBQMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VDIVPSMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VDIVPSMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VDIVPSMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VDIVPSMasked256load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VDIVPSMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VDIVPSMasked512load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VDIVPDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VDIVPDMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VDIVPDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VDIVPDMasked256load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VDIVPDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VDIVPDMasked512load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VPMADDWDMasked128,
ssa.OpAMD64VPMADDWDMasked256,
ssa.OpAMD64VPMADDWDMasked512,
ssa.OpAMD64VPMADDUBSWMasked128,
ssa.OpAMD64VPMADDUBSWMasked256,
ssa.OpAMD64VPMADDUBSWMasked512,
[dev.simd] cmd/compile, simd: add Expand This CL is generated by CL 693336. Change-Id: Ic1712d49fcad0544fa3c19b0249d8bc65b347104 Reviewed-on: https://go-review.googlesource.com/c/go/+/693375 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-05 19:42:12 +00:00
ssa.OpAMD64VEXPANDPSMasked128,
ssa.OpAMD64VEXPANDPSMasked256,
ssa.OpAMD64VEXPANDPSMasked512,
ssa.OpAMD64VEXPANDPDMasked128,
ssa.OpAMD64VEXPANDPDMasked256,
ssa.OpAMD64VEXPANDPDMasked512,
ssa.OpAMD64VPEXPANDBMasked128,
ssa.OpAMD64VPEXPANDBMasked256,
ssa.OpAMD64VPEXPANDBMasked512,
ssa.OpAMD64VPEXPANDWMasked128,
ssa.OpAMD64VPEXPANDWMasked256,
ssa.OpAMD64VPEXPANDWMasked512,
ssa.OpAMD64VPEXPANDDMasked128,
ssa.OpAMD64VPEXPANDDMasked256,
ssa.OpAMD64VPEXPANDDMasked512,
ssa.OpAMD64VPEXPANDQMasked128,
ssa.OpAMD64VPEXPANDQMasked256,
ssa.OpAMD64VPEXPANDQMasked512,
[dev.simd] cmd/compile, simd: add galois field operations This CL is generated by CL 684275. Change-Id: Ie1efd0979af0ef0a56781bf9013071bf4d2c52c5 Reviewed-on: https://go-review.googlesource.com/c/go/+/684175 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-26 04:07:48 +00:00
ssa.OpAMD64VGF2P8AFFINEINVQBMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VGF2P8AFFINEINVQBMasked128load,
[dev.simd] cmd/compile, simd: add galois field operations This CL is generated by CL 684275. Change-Id: Ie1efd0979af0ef0a56781bf9013071bf4d2c52c5 Reviewed-on: https://go-review.googlesource.com/c/go/+/684175 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-26 04:07:48 +00:00
ssa.OpAMD64VGF2P8AFFINEINVQBMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VGF2P8AFFINEINVQBMasked256load,
[dev.simd] cmd/compile, simd: add galois field operations This CL is generated by CL 684275. Change-Id: Ie1efd0979af0ef0a56781bf9013071bf4d2c52c5 Reviewed-on: https://go-review.googlesource.com/c/go/+/684175 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-26 04:07:48 +00:00
ssa.OpAMD64VGF2P8AFFINEINVQBMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VGF2P8AFFINEINVQBMasked512load,
[dev.simd] cmd/compile, simd: rename Masked$OP to $(OP)Masked. This CL is generated by CL 686575. Change-Id: I1483189a1ae9bed51446fd69daab3f7b128549ae Reviewed-on: https://go-review.googlesource.com/c/go/+/686516 Reviewed-by: David Chase <drchase@google.com> TryBot-Bypass: David Chase <drchase@google.com>
2025-07-08 18:18:55 +00:00
ssa.OpAMD64VGF2P8AFFINEQBMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VGF2P8AFFINEQBMasked128load,
[dev.simd] cmd/compile, simd: rename Masked$OP to $(OP)Masked. This CL is generated by CL 686575. Change-Id: I1483189a1ae9bed51446fd69daab3f7b128549ae Reviewed-on: https://go-review.googlesource.com/c/go/+/686516 Reviewed-by: David Chase <drchase@google.com> TryBot-Bypass: David Chase <drchase@google.com>
2025-07-08 18:18:55 +00:00
ssa.OpAMD64VGF2P8AFFINEQBMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VGF2P8AFFINEQBMasked256load,
[dev.simd] cmd/compile, simd: rename Masked$OP to $(OP)Masked. This CL is generated by CL 686575. Change-Id: I1483189a1ae9bed51446fd69daab3f7b128549ae Reviewed-on: https://go-review.googlesource.com/c/go/+/686516 Reviewed-by: David Chase <drchase@google.com> TryBot-Bypass: David Chase <drchase@google.com>
2025-07-08 18:18:55 +00:00
ssa.OpAMD64VGF2P8AFFINEQBMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VGF2P8AFFINEQBMasked512load,
[dev.simd] cmd/compile, simd: add galois field operations This CL is generated by CL 684275. Change-Id: Ie1efd0979af0ef0a56781bf9013071bf4d2c52c5 Reviewed-on: https://go-review.googlesource.com/c/go/+/684175 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-26 04:07:48 +00:00
ssa.OpAMD64VGF2P8MULBMasked128,
ssa.OpAMD64VGF2P8MULBMasked256,
ssa.OpAMD64VGF2P8MULBMasked512,
[dev.simd] cmd/compile, simd: add VPLZCNT[DQ] Change-Id: Ifd6d8c12deac9c41722fdf2511d860a334e83438 Reviewed-on: https://go-review.googlesource.com/c/go/+/701915 Reviewed-by: Cherry Mui <cherryyz@google.com> TryBot-Bypass: Junyang Shao <shaojunyang@google.com>
2025-09-08 19:38:56 +00:00
ssa.OpAMD64VPLZCNTDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPLZCNTDMasked128load,
[dev.simd] cmd/compile, simd: add VPLZCNT[DQ] Change-Id: Ifd6d8c12deac9c41722fdf2511d860a334e83438 Reviewed-on: https://go-review.googlesource.com/c/go/+/701915 Reviewed-by: Cherry Mui <cherryyz@google.com> TryBot-Bypass: Junyang Shao <shaojunyang@google.com>
2025-09-08 19:38:56 +00:00
ssa.OpAMD64VPLZCNTDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPLZCNTDMasked256load,
[dev.simd] cmd/compile, simd: add VPLZCNT[DQ] Change-Id: Ifd6d8c12deac9c41722fdf2511d860a334e83438 Reviewed-on: https://go-review.googlesource.com/c/go/+/701915 Reviewed-by: Cherry Mui <cherryyz@google.com> TryBot-Bypass: Junyang Shao <shaojunyang@google.com>
2025-09-08 19:38:56 +00:00
ssa.OpAMD64VPLZCNTDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPLZCNTDMasked512load,
[dev.simd] cmd/compile, simd: add VPLZCNT[DQ] Change-Id: Ifd6d8c12deac9c41722fdf2511d860a334e83438 Reviewed-on: https://go-review.googlesource.com/c/go/+/701915 Reviewed-by: Cherry Mui <cherryyz@google.com> TryBot-Bypass: Junyang Shao <shaojunyang@google.com>
2025-09-08 19:38:56 +00:00
ssa.OpAMD64VPLZCNTQMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPLZCNTQMasked128load,
[dev.simd] cmd/compile, simd: add VPLZCNT[DQ] Change-Id: Ifd6d8c12deac9c41722fdf2511d860a334e83438 Reviewed-on: https://go-review.googlesource.com/c/go/+/701915 Reviewed-by: Cherry Mui <cherryyz@google.com> TryBot-Bypass: Junyang Shao <shaojunyang@google.com>
2025-09-08 19:38:56 +00:00
ssa.OpAMD64VPLZCNTQMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPLZCNTQMasked256load,
[dev.simd] cmd/compile, simd: add VPLZCNT[DQ] Change-Id: Ifd6d8c12deac9c41722fdf2511d860a334e83438 Reviewed-on: https://go-review.googlesource.com/c/go/+/701915 Reviewed-by: Cherry Mui <cherryyz@google.com> TryBot-Bypass: Junyang Shao <shaojunyang@google.com>
2025-09-08 19:38:56 +00:00
ssa.OpAMD64VPLZCNTQMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPLZCNTQMasked512load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VMAXPSMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VMAXPSMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VMAXPSMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VMAXPSMasked256load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VMAXPSMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VMAXPSMasked512load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VMAXPDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VMAXPDMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VMAXPDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VMAXPDMasked256load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VMAXPDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VMAXPDMasked512load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPMAXSBMasked128,
ssa.OpAMD64VPMAXSBMasked256,
ssa.OpAMD64VPMAXSBMasked512,
ssa.OpAMD64VPMAXSWMasked128,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMAXSWMasked256,
ssa.OpAMD64VPMAXSWMasked512,
ssa.OpAMD64VPMAXSDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMAXSDMasked128load,
[dev.simd] cmd/compile: generated codes for amd64 SIMD This CL is generated by tool in CL 667155. Change-Id: I3829d0d2c96fe7000e2dd025a3006f96957d777a Reviewed-on: https://go-review.googlesource.com/c/go/+/675618 Reviewed-by: Junyang Shao <shaojunyang@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-05-22 19:59:12 +00:00
ssa.OpAMD64VPMAXSDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMAXSDMasked256load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPMAXSDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMAXSDMasked512load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMAXSQMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMAXSQMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMAXSQMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMAXSQMasked256load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMAXSQMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMAXSQMasked512load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPMAXUBMasked128,
ssa.OpAMD64VPMAXUBMasked256,
ssa.OpAMD64VPMAXUBMasked512,
ssa.OpAMD64VPMAXUWMasked128,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMAXUWMasked256,
ssa.OpAMD64VPMAXUWMasked512,
ssa.OpAMD64VPMAXUDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMAXUDMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMAXUDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMAXUDMasked256load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPMAXUDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMAXUDMasked512load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMAXUQMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMAXUQMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMAXUQMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMAXUQMasked256load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMAXUQMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMAXUQMasked512load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VMINPSMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VMINPSMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VMINPSMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VMINPSMasked256load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VMINPSMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VMINPSMasked512load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VMINPDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VMINPDMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VMINPDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VMINPDMasked256load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VMINPDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VMINPDMasked512load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPMINSBMasked128,
ssa.OpAMD64VPMINSBMasked256,
ssa.OpAMD64VPMINSBMasked512,
ssa.OpAMD64VPMINSWMasked128,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMINSWMasked256,
ssa.OpAMD64VPMINSWMasked512,
ssa.OpAMD64VPMINSDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMINSDMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMINSDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMINSDMasked256load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPMINSDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMINSDMasked512load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMINSQMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMINSQMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMINSQMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMINSQMasked256load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMINSQMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMINSQMasked512load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPMINUBMasked128,
ssa.OpAMD64VPMINUBMasked256,
ssa.OpAMD64VPMINUBMasked512,
ssa.OpAMD64VPMINUWMasked128,
[dev.simd] cmd/compile: generated codes for amd64 SIMD This CL is generated by tool in CL 667155. Change-Id: I3829d0d2c96fe7000e2dd025a3006f96957d777a Reviewed-on: https://go-review.googlesource.com/c/go/+/675618 Reviewed-by: Junyang Shao <shaojunyang@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-05-22 19:59:12 +00:00
ssa.OpAMD64VPMINUWMasked256,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMINUWMasked512,
ssa.OpAMD64VPMINUDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMINUDMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMINUDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMINUDMasked256load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPMINUDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMINUDMasked512load,
[dev.simd] cmd/compile: generated codes for amd64 SIMD This CL is generated by tool in CL 667155. Change-Id: I3829d0d2c96fe7000e2dd025a3006f96957d777a Reviewed-on: https://go-review.googlesource.com/c/go/+/675618 Reviewed-by: Junyang Shao <shaojunyang@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-05-22 19:59:12 +00:00
ssa.OpAMD64VPMINUQMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMINUQMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMINUQMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMINUQMasked256load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMINUQMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMINUQMasked512load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VFMADD213PSMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VFMADD213PSMasked128load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VFMADD213PSMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VFMADD213PSMasked256load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VFMADD213PSMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VFMADD213PSMasked512load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VFMADD213PDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VFMADD213PDMasked128load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VFMADD213PDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VFMADD213PDMasked256load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VFMADD213PDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VFMADD213PDMasked512load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VFMADDSUB213PSMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VFMADDSUB213PSMasked128load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VFMADDSUB213PSMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VFMADDSUB213PSMasked256load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VFMADDSUB213PSMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VFMADDSUB213PSMasked512load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VFMADDSUB213PDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VFMADDSUB213PDMasked128load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VFMADDSUB213PDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VFMADDSUB213PDMasked256load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VFMADDSUB213PDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VFMADDSUB213PDMasked512load,
[dev.simd] cmd/compile, simd: update generated files This CL is generated by x/arch CL 694857. Change-Id: I9745fa8c9b2e3f49bd2cff5ff6b5578c0c67bfa1 Reviewed-on: https://go-review.googlesource.com/c/go/+/694915 Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Austin Clements <austin@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-11 15:58:31 -04:00
ssa.OpAMD64VPMULHWMasked128,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VPMULHWMasked256,
[dev.simd] cmd/compile, simd: update generated files This CL is generated by x/arch CL 694857. Change-Id: I9745fa8c9b2e3f49bd2cff5ff6b5578c0c67bfa1 Reviewed-on: https://go-review.googlesource.com/c/go/+/694915 Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Austin Clements <austin@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-11 15:58:31 -04:00
ssa.OpAMD64VPMULHWMasked512,
ssa.OpAMD64VPMULHUWMasked128,
ssa.OpAMD64VPMULHUWMasked256,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMULHUWMasked512,
[dev.simd] simd, cmd/compile: rename some methods generated by simdgen CL 692556 these are the "easy" ones SaturatedOp -> OpSaturated PairwiseOp -> OpPairs OpWithPrecision -> OpScaled DiffWithOpWithPrecision -> OpScaledResidue Change-Id: I036bf89c0690bcf9922c376d62cef48392942af3 Reviewed-on: https://go-review.googlesource.com/c/go/+/692357 Reviewed-by: Junyang Shao <shaojunyang@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-01 15:58:29 -04:00
ssa.OpAMD64VMULPSMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VMULPSMasked128load,
[dev.simd] simd, cmd/compile: rename some methods generated by simdgen CL 692556 these are the "easy" ones SaturatedOp -> OpSaturated PairwiseOp -> OpPairs OpWithPrecision -> OpScaled DiffWithOpWithPrecision -> OpScaledResidue Change-Id: I036bf89c0690bcf9922c376d62cef48392942af3 Reviewed-on: https://go-review.googlesource.com/c/go/+/692357 Reviewed-by: Junyang Shao <shaojunyang@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-01 15:58:29 -04:00
ssa.OpAMD64VMULPSMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VMULPSMasked256load,
[dev.simd] simd, cmd/compile: rename some methods generated by simdgen CL 692556 these are the "easy" ones SaturatedOp -> OpSaturated PairwiseOp -> OpPairs OpWithPrecision -> OpScaled DiffWithOpWithPrecision -> OpScaledResidue Change-Id: I036bf89c0690bcf9922c376d62cef48392942af3 Reviewed-on: https://go-review.googlesource.com/c/go/+/692357 Reviewed-by: Junyang Shao <shaojunyang@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-01 15:58:29 -04:00
ssa.OpAMD64VMULPSMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VMULPSMasked512load,
[dev.simd] simd, cmd/compile: rename some methods generated by simdgen CL 692556 these are the "easy" ones SaturatedOp -> OpSaturated PairwiseOp -> OpPairs OpWithPrecision -> OpScaled DiffWithOpWithPrecision -> OpScaledResidue Change-Id: I036bf89c0690bcf9922c376d62cef48392942af3 Reviewed-on: https://go-review.googlesource.com/c/go/+/692357 Reviewed-by: Junyang Shao <shaojunyang@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-01 15:58:29 -04:00
ssa.OpAMD64VMULPDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VMULPDMasked128load,
[dev.simd] simd, cmd/compile: rename some methods generated by simdgen CL 692556 these are the "easy" ones SaturatedOp -> OpSaturated PairwiseOp -> OpPairs OpWithPrecision -> OpScaled DiffWithOpWithPrecision -> OpScaledResidue Change-Id: I036bf89c0690bcf9922c376d62cef48392942af3 Reviewed-on: https://go-review.googlesource.com/c/go/+/692357 Reviewed-by: Junyang Shao <shaojunyang@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-01 15:58:29 -04:00
ssa.OpAMD64VMULPDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VMULPDMasked256load,
[dev.simd] simd, cmd/compile: rename some methods generated by simdgen CL 692556 these are the "easy" ones SaturatedOp -> OpSaturated PairwiseOp -> OpPairs OpWithPrecision -> OpScaled DiffWithOpWithPrecision -> OpScaledResidue Change-Id: I036bf89c0690bcf9922c376d62cef48392942af3 Reviewed-on: https://go-review.googlesource.com/c/go/+/692357 Reviewed-by: Junyang Shao <shaojunyang@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-01 15:58:29 -04:00
ssa.OpAMD64VMULPDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VMULPDMasked512load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPMULLWMasked128,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMULLWMasked256,
ssa.OpAMD64VPMULLWMasked512,
ssa.OpAMD64VPMULLDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMULLDMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMULLDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMULLDMasked256load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPMULLDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMULLDMasked512load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMULLQMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMULLQMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMULLQMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMULLQMasked256load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPMULLQMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPMULLQMasked512load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VFMSUBADD213PSMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VFMSUBADD213PSMasked128load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VFMSUBADD213PSMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VFMSUBADD213PSMasked256load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VFMSUBADD213PSMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VFMSUBADD213PSMasked512load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VFMSUBADD213PDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VFMSUBADD213PDMasked128load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VFMSUBADD213PDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VFMSUBADD213PDMasked256load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VFMSUBADD213PDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VFMSUBADD213PDMasked512load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VPOPCNTBMasked128,
ssa.OpAMD64VPOPCNTBMasked256,
ssa.OpAMD64VPOPCNTBMasked512,
ssa.OpAMD64VPOPCNTWMasked128,
ssa.OpAMD64VPOPCNTWMasked256,
ssa.OpAMD64VPOPCNTWMasked512,
ssa.OpAMD64VPOPCNTDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPOPCNTDMasked128load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VPOPCNTDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPOPCNTDMasked256load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VPOPCNTDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPOPCNTDMasked512load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VPOPCNTQMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPOPCNTQMasked128load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VPOPCNTQMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPOPCNTQMasked256load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VPOPCNTQMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPOPCNTQMasked512load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPORDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPORDMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPORDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPORDMasked256load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPORDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPORDMasked512load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPORQMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPORQMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPORQMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPORQMasked256load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPORQMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPORQMasked512load,
[dev.simd] cmd/compile, simd: add variable Permute This CL also added some tests for them. This CL is generated by CL 687919. Change-Id: I9ddd2cd23bb98ecca91bfbeaffd62faa4bd85e0d Reviewed-on: https://go-review.googlesource.com/c/go/+/687939 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-14 19:39:44 +00:00
ssa.OpAMD64VPERMI2BMasked128,
ssa.OpAMD64VPERMI2BMasked256,
ssa.OpAMD64VPERMI2BMasked512,
ssa.OpAMD64VPERMI2WMasked128,
ssa.OpAMD64VPERMI2WMasked256,
ssa.OpAMD64VPERMI2WMasked512,
ssa.OpAMD64VPERMI2PSMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPERMI2PSMasked128load,
[dev.simd] cmd/compile, simd: add variable Permute This CL also added some tests for them. This CL is generated by CL 687919. Change-Id: I9ddd2cd23bb98ecca91bfbeaffd62faa4bd85e0d Reviewed-on: https://go-review.googlesource.com/c/go/+/687939 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-14 19:39:44 +00:00
ssa.OpAMD64VPERMI2DMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPERMI2DMasked128load,
[dev.simd] cmd/compile, simd: add variable Permute This CL also added some tests for them. This CL is generated by CL 687919. Change-Id: I9ddd2cd23bb98ecca91bfbeaffd62faa4bd85e0d Reviewed-on: https://go-review.googlesource.com/c/go/+/687939 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-14 19:39:44 +00:00
ssa.OpAMD64VPERMI2PSMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPERMI2PSMasked256load,
[dev.simd] cmd/compile, simd: add variable Permute This CL also added some tests for them. This CL is generated by CL 687919. Change-Id: I9ddd2cd23bb98ecca91bfbeaffd62faa4bd85e0d Reviewed-on: https://go-review.googlesource.com/c/go/+/687939 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-14 19:39:44 +00:00
ssa.OpAMD64VPERMI2DMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPERMI2DMasked256load,
[dev.simd] cmd/compile, simd: add variable Permute This CL also added some tests for them. This CL is generated by CL 687919. Change-Id: I9ddd2cd23bb98ecca91bfbeaffd62faa4bd85e0d Reviewed-on: https://go-review.googlesource.com/c/go/+/687939 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-14 19:39:44 +00:00
ssa.OpAMD64VPERMI2PSMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPERMI2PSMasked512load,
[dev.simd] cmd/compile, simd: add variable Permute This CL also added some tests for them. This CL is generated by CL 687919. Change-Id: I9ddd2cd23bb98ecca91bfbeaffd62faa4bd85e0d Reviewed-on: https://go-review.googlesource.com/c/go/+/687939 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-14 19:39:44 +00:00
ssa.OpAMD64VPERMI2DMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPERMI2DMasked512load,
[dev.simd] cmd/compile, simd: add variable Permute This CL also added some tests for them. This CL is generated by CL 687919. Change-Id: I9ddd2cd23bb98ecca91bfbeaffd62faa4bd85e0d Reviewed-on: https://go-review.googlesource.com/c/go/+/687939 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-14 19:39:44 +00:00
ssa.OpAMD64VPERMI2PDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPERMI2PDMasked128load,
[dev.simd] cmd/compile, simd: add variable Permute This CL also added some tests for them. This CL is generated by CL 687919. Change-Id: I9ddd2cd23bb98ecca91bfbeaffd62faa4bd85e0d Reviewed-on: https://go-review.googlesource.com/c/go/+/687939 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-14 19:39:44 +00:00
ssa.OpAMD64VPERMI2QMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPERMI2QMasked128load,
[dev.simd] cmd/compile, simd: add variable Permute This CL also added some tests for them. This CL is generated by CL 687919. Change-Id: I9ddd2cd23bb98ecca91bfbeaffd62faa4bd85e0d Reviewed-on: https://go-review.googlesource.com/c/go/+/687939 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-14 19:39:44 +00:00
ssa.OpAMD64VPERMI2PDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPERMI2PDMasked256load,
[dev.simd] cmd/compile, simd: add variable Permute This CL also added some tests for them. This CL is generated by CL 687919. Change-Id: I9ddd2cd23bb98ecca91bfbeaffd62faa4bd85e0d Reviewed-on: https://go-review.googlesource.com/c/go/+/687939 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-14 19:39:44 +00:00
ssa.OpAMD64VPERMI2QMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPERMI2QMasked256load,
[dev.simd] cmd/compile, simd: add variable Permute This CL also added some tests for them. This CL is generated by CL 687919. Change-Id: I9ddd2cd23bb98ecca91bfbeaffd62faa4bd85e0d Reviewed-on: https://go-review.googlesource.com/c/go/+/687939 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-14 19:39:44 +00:00
ssa.OpAMD64VPERMI2PDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPERMI2PDMasked512load,
[dev.simd] cmd/compile, simd: add variable Permute This CL also added some tests for them. This CL is generated by CL 687919. Change-Id: I9ddd2cd23bb98ecca91bfbeaffd62faa4bd85e0d Reviewed-on: https://go-review.googlesource.com/c/go/+/687939 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-14 19:39:44 +00:00
ssa.OpAMD64VPERMI2QMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPERMI2QMasked512load,
[dev.simd] cmd/compile, simd: complete AVX2? u?int shuffles The namings follow the following convention: - If its indices are from constant, amend "Constant" to the name. - If its indices are used by multiple groups, mend "Grouped" to the name. - If its indexing only the low part, amend "Lo", similarly "Hi". Change-Id: I6a58f5dae54c882ebd59f39b5288f6f3f14d957f Reviewed-on: https://go-review.googlesource.com/c/go/+/698296 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-21 20:37:57 +00:00
ssa.OpAMD64VPSHUFDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSHUFDMasked256load,
[dev.simd] cmd/compile, simd: complete AVX2? u?int shuffles The namings follow the following convention: - If its indices are from constant, amend "Constant" to the name. - If its indices are used by multiple groups, mend "Grouped" to the name. - If its indexing only the low part, amend "Lo", similarly "Hi". Change-Id: I6a58f5dae54c882ebd59f39b5288f6f3f14d957f Reviewed-on: https://go-review.googlesource.com/c/go/+/698296 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-21 20:37:57 +00:00
ssa.OpAMD64VPSHUFDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSHUFDMasked512load,
[dev.simd] cmd/compile, simd: complete AVX2? u?int shuffles The namings follow the following convention: - If its indices are from constant, amend "Constant" to the name. - If its indices are used by multiple groups, mend "Grouped" to the name. - If its indexing only the low part, amend "Lo", similarly "Hi". Change-Id: I6a58f5dae54c882ebd59f39b5288f6f3f14d957f Reviewed-on: https://go-review.googlesource.com/c/go/+/698296 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-21 20:37:57 +00:00
ssa.OpAMD64VPSHUFHWMasked256,
ssa.OpAMD64VPSHUFHWMasked512,
ssa.OpAMD64VPSHUFHWMasked128,
ssa.OpAMD64VPSHUFDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSHUFDMasked128load,
[dev.simd] cmd/compile, simd: complete AVX2? u?int shuffles The namings follow the following convention: - If its indices are from constant, amend "Constant" to the name. - If its indices are used by multiple groups, mend "Grouped" to the name. - If its indexing only the low part, amend "Lo", similarly "Hi". Change-Id: I6a58f5dae54c882ebd59f39b5288f6f3f14d957f Reviewed-on: https://go-review.googlesource.com/c/go/+/698296 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-21 20:37:57 +00:00
ssa.OpAMD64VPSHUFBMasked256,
ssa.OpAMD64VPSHUFBMasked512,
[dev.simd] cmd/compile, simd: make Permute 128-bit use AVX VPSHUFB Change-Id: Ib89f602f797065e411eb0cbc95ccf2748b25fdec Reviewed-on: https://go-review.googlesource.com/c/go/+/698295 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-21 19:11:30 +00:00
ssa.OpAMD64VPSHUFBMasked128,
[dev.simd] cmd/compile, simd: add variable Permute This CL also added some tests for them. This CL is generated by CL 687919. Change-Id: I9ddd2cd23bb98ecca91bfbeaffd62faa4bd85e0d Reviewed-on: https://go-review.googlesource.com/c/go/+/687939 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-14 19:39:44 +00:00
ssa.OpAMD64VPERMBMasked256,
ssa.OpAMD64VPERMBMasked512,
ssa.OpAMD64VPERMWMasked128,
ssa.OpAMD64VPERMWMasked256,
ssa.OpAMD64VPERMWMasked512,
ssa.OpAMD64VPERMPSMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPERMPSMasked256load,
[dev.simd] cmd/compile, simd: add variable Permute This CL also added some tests for them. This CL is generated by CL 687919. Change-Id: I9ddd2cd23bb98ecca91bfbeaffd62faa4bd85e0d Reviewed-on: https://go-review.googlesource.com/c/go/+/687939 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-14 19:39:44 +00:00
ssa.OpAMD64VPERMDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPERMDMasked256load,
[dev.simd] cmd/compile, simd: add variable Permute This CL also added some tests for them. This CL is generated by CL 687919. Change-Id: I9ddd2cd23bb98ecca91bfbeaffd62faa4bd85e0d Reviewed-on: https://go-review.googlesource.com/c/go/+/687939 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-14 19:39:44 +00:00
ssa.OpAMD64VPERMPSMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPERMPSMasked512load,
[dev.simd] cmd/compile, simd: add variable Permute This CL also added some tests for them. This CL is generated by CL 687919. Change-Id: I9ddd2cd23bb98ecca91bfbeaffd62faa4bd85e0d Reviewed-on: https://go-review.googlesource.com/c/go/+/687939 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-14 19:39:44 +00:00
ssa.OpAMD64VPERMDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPERMDMasked512load,
[dev.simd] cmd/compile, simd: add variable Permute This CL also added some tests for them. This CL is generated by CL 687919. Change-Id: I9ddd2cd23bb98ecca91bfbeaffd62faa4bd85e0d Reviewed-on: https://go-review.googlesource.com/c/go/+/687939 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-14 19:39:44 +00:00
ssa.OpAMD64VPERMPDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPERMPDMasked256load,
[dev.simd] cmd/compile, simd: add variable Permute This CL also added some tests for them. This CL is generated by CL 687919. Change-Id: I9ddd2cd23bb98ecca91bfbeaffd62faa4bd85e0d Reviewed-on: https://go-review.googlesource.com/c/go/+/687939 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-14 19:39:44 +00:00
ssa.OpAMD64VPERMQMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPERMQMasked256load,
[dev.simd] cmd/compile, simd: add variable Permute This CL also added some tests for them. This CL is generated by CL 687919. Change-Id: I9ddd2cd23bb98ecca91bfbeaffd62faa4bd85e0d Reviewed-on: https://go-review.googlesource.com/c/go/+/687939 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-14 19:39:44 +00:00
ssa.OpAMD64VPERMPDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPERMPDMasked512load,
[dev.simd] cmd/compile, simd: add variable Permute This CL also added some tests for them. This CL is generated by CL 687919. Change-Id: I9ddd2cd23bb98ecca91bfbeaffd62faa4bd85e0d Reviewed-on: https://go-review.googlesource.com/c/go/+/687939 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-07-14 19:39:44 +00:00
ssa.OpAMD64VPERMQMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPERMQMasked512load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VRCP14PSMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VRCP14PSMasked128load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VRCP14PSMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VRCP14PSMasked256load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VRCP14PSMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VRCP14PSMasked512load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VRCP14PDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VRCP14PDMasked128load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VRCP14PDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VRCP14PDMasked256load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VRCP14PDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VRCP14PDMasked512load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VRSQRT14PSMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VRSQRT14PSMasked128load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VRSQRT14PSMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VRSQRT14PSMasked256load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VRSQRT14PSMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VRSQRT14PSMasked512load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VRSQRT14PDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VRSQRT14PDMasked128load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VRSQRT14PDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VRSQRT14PDMasked256load,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VRSQRT14PDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VRSQRT14PDMasked512load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPROLDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPROLDMasked128load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPROLDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPROLDMasked256load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPROLDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPROLDMasked512load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPROLQMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPROLQMasked128load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPROLQMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPROLQMasked256load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPROLQMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPROLQMasked512load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPRORDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPRORDMasked128load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPRORDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPRORDMasked256load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPRORDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPRORDMasked512load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPRORQMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPRORQMasked128load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPRORQMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPRORQMasked256load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPRORQMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPRORQMasked512load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPROLVDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPROLVDMasked128load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPROLVDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPROLVDMasked256load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPROLVDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPROLVDMasked512load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPROLVQMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPROLVQMasked128load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPROLVQMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPROLVQMasked256load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPROLVQMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPROLVQMasked512load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPRORVDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPRORVDMasked128load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPRORVDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPRORVDMasked256load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPRORVDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPRORVDMasked512load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPRORVQMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPRORVQMasked128load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPRORVQMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPRORVQMasked256load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPRORVQMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPRORVQMasked512load,
[dev.simd] simd, cmd/compile: rename some methods generated by simdgen CL 692556 these are the "easy" ones SaturatedOp -> OpSaturated PairwiseOp -> OpPairs OpWithPrecision -> OpScaled DiffWithOpWithPrecision -> OpScaledResidue Change-Id: I036bf89c0690bcf9922c376d62cef48392942af3 Reviewed-on: https://go-review.googlesource.com/c/go/+/692357 Reviewed-by: Junyang Shao <shaojunyang@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-01 15:58:29 -04:00
ssa.OpAMD64VSCALEFPSMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VSCALEFPSMasked128load,
[dev.simd] simd, cmd/compile: rename some methods generated by simdgen CL 692556 these are the "easy" ones SaturatedOp -> OpSaturated PairwiseOp -> OpPairs OpWithPrecision -> OpScaled DiffWithOpWithPrecision -> OpScaledResidue Change-Id: I036bf89c0690bcf9922c376d62cef48392942af3 Reviewed-on: https://go-review.googlesource.com/c/go/+/692357 Reviewed-by: Junyang Shao <shaojunyang@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-01 15:58:29 -04:00
ssa.OpAMD64VSCALEFPSMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VSCALEFPSMasked256load,
[dev.simd] simd, cmd/compile: rename some methods generated by simdgen CL 692556 these are the "easy" ones SaturatedOp -> OpSaturated PairwiseOp -> OpPairs OpWithPrecision -> OpScaled DiffWithOpWithPrecision -> OpScaledResidue Change-Id: I036bf89c0690bcf9922c376d62cef48392942af3 Reviewed-on: https://go-review.googlesource.com/c/go/+/692357 Reviewed-by: Junyang Shao <shaojunyang@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-01 15:58:29 -04:00
ssa.OpAMD64VSCALEFPSMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VSCALEFPSMasked512load,
[dev.simd] simd, cmd/compile: rename some methods generated by simdgen CL 692556 these are the "easy" ones SaturatedOp -> OpSaturated PairwiseOp -> OpPairs OpWithPrecision -> OpScaled DiffWithOpWithPrecision -> OpScaledResidue Change-Id: I036bf89c0690bcf9922c376d62cef48392942af3 Reviewed-on: https://go-review.googlesource.com/c/go/+/692357 Reviewed-by: Junyang Shao <shaojunyang@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-01 15:58:29 -04:00
ssa.OpAMD64VSCALEFPDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VSCALEFPDMasked128load,
[dev.simd] simd, cmd/compile: rename some methods generated by simdgen CL 692556 these are the "easy" ones SaturatedOp -> OpSaturated PairwiseOp -> OpPairs OpWithPrecision -> OpScaled DiffWithOpWithPrecision -> OpScaledResidue Change-Id: I036bf89c0690bcf9922c376d62cef48392942af3 Reviewed-on: https://go-review.googlesource.com/c/go/+/692357 Reviewed-by: Junyang Shao <shaojunyang@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-01 15:58:29 -04:00
ssa.OpAMD64VSCALEFPDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VSCALEFPDMasked256load,
[dev.simd] simd, cmd/compile: rename some methods generated by simdgen CL 692556 these are the "easy" ones SaturatedOp -> OpSaturated PairwiseOp -> OpPairs OpWithPrecision -> OpScaled DiffWithOpWithPrecision -> OpScaledResidue Change-Id: I036bf89c0690bcf9922c376d62cef48392942af3 Reviewed-on: https://go-review.googlesource.com/c/go/+/692357 Reviewed-by: Junyang Shao <shaojunyang@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-01 15:58:29 -04:00
ssa.OpAMD64VSCALEFPDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VSCALEFPDMasked512load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSHLDWMasked128,
ssa.OpAMD64VPSHLDWMasked256,
ssa.OpAMD64VPSHLDWMasked512,
ssa.OpAMD64VPSHLDDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSHLDDMasked128load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSHLDDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSHLDDMasked256load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSHLDDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSHLDDMasked512load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSHLDQMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSHLDQMasked128load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSHLDQMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSHLDQMasked256load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSHLDQMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSHLDQMasked512load,
[dev.simd] cmd/compile, simd: adjust Shift.* operations This CL does: 1. Removes ShiftRightSignExtended, default signed vectors to shift arithmetic, and unsigned to shift logical. 2. Add the missing Shifts which were left out by YAML error in the generator. This CL is generated by CL 687595. Change-Id: I663115498adb91c82e89a8476e6748794e997cfa Reviewed-on: https://go-review.googlesource.com/c/go/+/687596 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-07-11 17:56:22 +00:00
ssa.OpAMD64VPSLLWMasked128,
ssa.OpAMD64VPSLLWMasked256,
ssa.OpAMD64VPSLLWMasked512,
ssa.OpAMD64VPSLLDMasked128,
ssa.OpAMD64VPSLLDMasked256,
ssa.OpAMD64VPSLLDMasked512,
[dev.simd] cmd/compile, simd: rename Masked$OP to $(OP)Masked. This CL is generated by CL 686575. Change-Id: I1483189a1ae9bed51446fd69daab3f7b128549ae Reviewed-on: https://go-review.googlesource.com/c/go/+/686516 Reviewed-by: David Chase <drchase@google.com> TryBot-Bypass: David Chase <drchase@google.com>
2025-07-08 18:18:55 +00:00
ssa.OpAMD64VPSLLQMasked128,
ssa.OpAMD64VPSLLQMasked256,
ssa.OpAMD64VPSLLQMasked512,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSHRDWMasked128,
ssa.OpAMD64VPSHRDWMasked256,
ssa.OpAMD64VPSHRDWMasked512,
ssa.OpAMD64VPSHRDDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSHRDDMasked128load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSHRDDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSHRDDMasked256load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSHRDDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSHRDDMasked512load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSHRDQMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSHRDQMasked128load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSHRDQMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSHRDQMasked256load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSHRDQMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSHRDQMasked512load,
[dev.simd] cmd/compile, simd: adjust Shift.* operations This CL does: 1. Removes ShiftRightSignExtended, default signed vectors to shift arithmetic, and unsigned to shift logical. 2. Add the missing Shifts which were left out by YAML error in the generator. This CL is generated by CL 687595. Change-Id: I663115498adb91c82e89a8476e6748794e997cfa Reviewed-on: https://go-review.googlesource.com/c/go/+/687596 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-07-11 17:56:22 +00:00
ssa.OpAMD64VPSRAWMasked128,
ssa.OpAMD64VPSRAWMasked256,
ssa.OpAMD64VPSRAWMasked512,
ssa.OpAMD64VPSRADMasked128,
ssa.OpAMD64VPSRADMasked256,
ssa.OpAMD64VPSRADMasked512,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSRAQMasked128,
ssa.OpAMD64VPSRAQMasked256,
ssa.OpAMD64VPSRAQMasked512,
[dev.simd] cmd/compile, simd: adjust Shift.* operations This CL does: 1. Removes ShiftRightSignExtended, default signed vectors to shift arithmetic, and unsigned to shift logical. 2. Add the missing Shifts which were left out by YAML error in the generator. This CL is generated by CL 687595. Change-Id: I663115498adb91c82e89a8476e6748794e997cfa Reviewed-on: https://go-review.googlesource.com/c/go/+/687596 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-07-11 17:56:22 +00:00
ssa.OpAMD64VPSRLWMasked128,
ssa.OpAMD64VPSRLWMasked256,
ssa.OpAMD64VPSRLWMasked512,
ssa.OpAMD64VPSRLDMasked128,
ssa.OpAMD64VPSRLDMasked256,
ssa.OpAMD64VPSRLDMasked512,
ssa.OpAMD64VPSRLQMasked128,
ssa.OpAMD64VPSRLQMasked256,
ssa.OpAMD64VPSRLQMasked512,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSHLDVWMasked128,
ssa.OpAMD64VPSHLDVWMasked256,
ssa.OpAMD64VPSHLDVWMasked512,
ssa.OpAMD64VPSHLDVDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSHLDVDMasked128load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSHLDVDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSHLDVDMasked256load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSHLDVDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSHLDVDMasked512load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSHLDVQMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSHLDVQMasked128load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSHLDVQMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSHLDVQMasked256load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSHLDVQMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSHLDVQMasked512load,
[dev.simd] cmd/compile, simd: rename Masked$OP to $(OP)Masked. This CL is generated by CL 686575. Change-Id: I1483189a1ae9bed51446fd69daab3f7b128549ae Reviewed-on: https://go-review.googlesource.com/c/go/+/686516 Reviewed-by: David Chase <drchase@google.com> TryBot-Bypass: David Chase <drchase@google.com>
2025-07-08 18:18:55 +00:00
ssa.OpAMD64VPSLLVWMasked128,
ssa.OpAMD64VPSLLVWMasked256,
ssa.OpAMD64VPSLLVWMasked512,
ssa.OpAMD64VPSLLVDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSLLVDMasked128load,
[dev.simd] cmd/compile, simd: rename Masked$OP to $(OP)Masked. This CL is generated by CL 686575. Change-Id: I1483189a1ae9bed51446fd69daab3f7b128549ae Reviewed-on: https://go-review.googlesource.com/c/go/+/686516 Reviewed-by: David Chase <drchase@google.com> TryBot-Bypass: David Chase <drchase@google.com>
2025-07-08 18:18:55 +00:00
ssa.OpAMD64VPSLLVDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSLLVDMasked256load,
[dev.simd] cmd/compile, simd: rename Masked$OP to $(OP)Masked. This CL is generated by CL 686575. Change-Id: I1483189a1ae9bed51446fd69daab3f7b128549ae Reviewed-on: https://go-review.googlesource.com/c/go/+/686516 Reviewed-by: David Chase <drchase@google.com> TryBot-Bypass: David Chase <drchase@google.com>
2025-07-08 18:18:55 +00:00
ssa.OpAMD64VPSLLVDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSLLVDMasked512load,
[dev.simd] cmd/compile, simd: rename Masked$OP to $(OP)Masked. This CL is generated by CL 686575. Change-Id: I1483189a1ae9bed51446fd69daab3f7b128549ae Reviewed-on: https://go-review.googlesource.com/c/go/+/686516 Reviewed-by: David Chase <drchase@google.com> TryBot-Bypass: David Chase <drchase@google.com>
2025-07-08 18:18:55 +00:00
ssa.OpAMD64VPSLLVQMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSLLVQMasked128load,
[dev.simd] cmd/compile, simd: rename Masked$OP to $(OP)Masked. This CL is generated by CL 686575. Change-Id: I1483189a1ae9bed51446fd69daab3f7b128549ae Reviewed-on: https://go-review.googlesource.com/c/go/+/686516 Reviewed-by: David Chase <drchase@google.com> TryBot-Bypass: David Chase <drchase@google.com>
2025-07-08 18:18:55 +00:00
ssa.OpAMD64VPSLLVQMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSLLVQMasked256load,
[dev.simd] cmd/compile, simd: rename Masked$OP to $(OP)Masked. This CL is generated by CL 686575. Change-Id: I1483189a1ae9bed51446fd69daab3f7b128549ae Reviewed-on: https://go-review.googlesource.com/c/go/+/686516 Reviewed-by: David Chase <drchase@google.com> TryBot-Bypass: David Chase <drchase@google.com>
2025-07-08 18:18:55 +00:00
ssa.OpAMD64VPSLLVQMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSLLVQMasked512load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSHRDVWMasked128,
ssa.OpAMD64VPSHRDVWMasked256,
ssa.OpAMD64VPSHRDVWMasked512,
ssa.OpAMD64VPSHRDVDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSHRDVDMasked128load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSHRDVDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSHRDVDMasked256load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSHRDVDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSHRDVDMasked512load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSHRDVQMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSHRDVQMasked128load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSHRDVQMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSHRDVQMasked256load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSHRDVQMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSHRDVQMasked512load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSRAVWMasked128,
ssa.OpAMD64VPSRAVWMasked256,
ssa.OpAMD64VPSRAVWMasked512,
ssa.OpAMD64VPSRAVDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSRAVDMasked128load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSRAVDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSRAVDMasked256load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSRAVDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSRAVDMasked512load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSRAVQMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSRAVQMasked128load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSRAVQMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSRAVQMasked256load,
[dev.simd] cmd/compile, simd: add shift operations This CL is generated by CL 683475. Change-Id: I9e3ac6aff6f711cb26ff85e4c8729d9e2cc38e7d Reviewed-on: https://go-review.googlesource.com/c/go/+/683715 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com>
2025-06-24 15:21:29 +00:00
ssa.OpAMD64VPSRAVQMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSRAVQMasked512load,
[dev.simd] cmd/compile, simd: adjust Shift.* operations This CL does: 1. Removes ShiftRightSignExtended, default signed vectors to shift arithmetic, and unsigned to shift logical. 2. Add the missing Shifts which were left out by YAML error in the generator. This CL is generated by CL 687595. Change-Id: I663115498adb91c82e89a8476e6748794e997cfa Reviewed-on: https://go-review.googlesource.com/c/go/+/687596 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-07-11 17:56:22 +00:00
ssa.OpAMD64VPSRLVWMasked128,
ssa.OpAMD64VPSRLVWMasked256,
ssa.OpAMD64VPSRLVWMasked512,
ssa.OpAMD64VPSRLVDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSRLVDMasked128load,
[dev.simd] cmd/compile, simd: adjust Shift.* operations This CL does: 1. Removes ShiftRightSignExtended, default signed vectors to shift arithmetic, and unsigned to shift logical. 2. Add the missing Shifts which were left out by YAML error in the generator. This CL is generated by CL 687595. Change-Id: I663115498adb91c82e89a8476e6748794e997cfa Reviewed-on: https://go-review.googlesource.com/c/go/+/687596 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-07-11 17:56:22 +00:00
ssa.OpAMD64VPSRLVDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSRLVDMasked256load,
[dev.simd] cmd/compile, simd: adjust Shift.* operations This CL does: 1. Removes ShiftRightSignExtended, default signed vectors to shift arithmetic, and unsigned to shift logical. 2. Add the missing Shifts which were left out by YAML error in the generator. This CL is generated by CL 687595. Change-Id: I663115498adb91c82e89a8476e6748794e997cfa Reviewed-on: https://go-review.googlesource.com/c/go/+/687596 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-07-11 17:56:22 +00:00
ssa.OpAMD64VPSRLVDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSRLVDMasked512load,
[dev.simd] cmd/compile, simd: adjust Shift.* operations This CL does: 1. Removes ShiftRightSignExtended, default signed vectors to shift arithmetic, and unsigned to shift logical. 2. Add the missing Shifts which were left out by YAML error in the generator. This CL is generated by CL 687595. Change-Id: I663115498adb91c82e89a8476e6748794e997cfa Reviewed-on: https://go-review.googlesource.com/c/go/+/687596 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-07-11 17:56:22 +00:00
ssa.OpAMD64VPSRLVQMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSRLVQMasked128load,
[dev.simd] cmd/compile, simd: adjust Shift.* operations This CL does: 1. Removes ShiftRightSignExtended, default signed vectors to shift arithmetic, and unsigned to shift logical. 2. Add the missing Shifts which were left out by YAML error in the generator. This CL is generated by CL 687595. Change-Id: I663115498adb91c82e89a8476e6748794e997cfa Reviewed-on: https://go-review.googlesource.com/c/go/+/687596 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-07-11 17:56:22 +00:00
ssa.OpAMD64VPSRLVQMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSRLVQMasked256load,
[dev.simd] cmd/compile, simd: adjust Shift.* operations This CL does: 1. Removes ShiftRightSignExtended, default signed vectors to shift arithmetic, and unsigned to shift logical. 2. Add the missing Shifts which were left out by YAML error in the generator. This CL is generated by CL 687595. Change-Id: I663115498adb91c82e89a8476e6748794e997cfa Reviewed-on: https://go-review.googlesource.com/c/go/+/687596 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-07-11 17:56:22 +00:00
ssa.OpAMD64VPSRLVQMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSRLVQMasked512load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VSQRTPSMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VSQRTPSMasked128load,
[dev.simd] cmd/compile: generated codes for amd64 SIMD This CL is generated by tool in CL 667155. Change-Id: I3829d0d2c96fe7000e2dd025a3006f96957d777a Reviewed-on: https://go-review.googlesource.com/c/go/+/675618 Reviewed-by: Junyang Shao <shaojunyang@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-05-22 19:59:12 +00:00
ssa.OpAMD64VSQRTPSMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VSQRTPSMasked256load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VSQRTPSMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VSQRTPSMasked512load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VSQRTPDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VSQRTPDMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VSQRTPDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VSQRTPDMasked256load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VSQRTPDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VSQRTPDMasked512load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VSUBPSMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VSUBPSMasked128load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VSUBPSMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VSUBPSMasked256load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VSUBPSMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VSUBPSMasked512load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VSUBPDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VSUBPDMasked128load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VSUBPDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VSUBPDMasked256load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VSUBPDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VSUBPDMasked512load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPSUBBMasked128,
ssa.OpAMD64VPSUBBMasked256,
ssa.OpAMD64VPSUBBMasked512,
ssa.OpAMD64VPSUBWMasked128,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPSUBWMasked256,
ssa.OpAMD64VPSUBWMasked512,
ssa.OpAMD64VPSUBDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSUBDMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPSUBDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSUBDMasked256load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPSUBDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSUBDMasked512load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPSUBQMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSUBQMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPSUBQMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSUBQMasked256load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPSUBQMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSUBQMasked512load,
[dev.simd] simd, cmd/compile: rename some methods generated by simdgen CL 692556 these are the "easy" ones SaturatedOp -> OpSaturated PairwiseOp -> OpPairs OpWithPrecision -> OpScaled DiffWithOpWithPrecision -> OpScaledResidue Change-Id: I036bf89c0690bcf9922c376d62cef48392942af3 Reviewed-on: https://go-review.googlesource.com/c/go/+/692357 Reviewed-by: Junyang Shao <shaojunyang@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-01 15:58:29 -04:00
ssa.OpAMD64VPSUBSBMasked128,
ssa.OpAMD64VPSUBSBMasked256,
ssa.OpAMD64VPSUBSBMasked512,
ssa.OpAMD64VPSUBSWMasked128,
ssa.OpAMD64VPSUBSWMasked256,
ssa.OpAMD64VPSUBSWMasked512,
[dev.simd] cmd/compile, simd: API interface fixes - Absolute -> Abs - ApproximateReciprocal -> Reciprocal - Other derived apis also changed. - Round -> RoundToEven - Other derived apis also changed. - Drop DotProdBroadcast - Fused(Mul|Add)(Mul|Add)? -> remove the "Fused" - MulEvenWiden -> remove 64bit - MulLow -> Mul, add unit - PairDotProd -> DotProdPairs - make AddDotProdPairs machine ops only - peepholes will be in another CL at dev.simd. - PopCount -> OnesCount - Saturated* -> *Saturated - Fix (Add|Sub)Saturated uint mappings. - UnsignedSignedQuadDotProdAccumulate -> AddDotProdQuadruple - The "DotProdQuadruple" instruction does not exist, so no peepholes for this. This CL is generated by CL 694095. Change-Id: If4110cc04ab96240cf56f2348d35ed2a719687de Reviewed-on: https://go-review.googlesource.com/c/go/+/694115 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-08-07 17:05:50 +00:00
ssa.OpAMD64VPSUBUSBMasked128,
ssa.OpAMD64VPSUBUSBMasked256,
ssa.OpAMD64VPSUBUSBMasked512,
ssa.OpAMD64VPSUBUSWMasked128,
ssa.OpAMD64VPSUBUSWMasked256,
ssa.OpAMD64VPSUBUSWMasked512,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPXORDMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPXORDMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPXORDMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPXORDMasked256load,
[dev.simd] cmd/compile: reorder stubs This CL is generated by CL 682035. Change-Id: I0a8b7382470afb5a6571ab7d4abe038de0ff239e Reviewed-on: https://go-review.googlesource.com/c/go/+/682055 Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com>
2025-06-16 20:11:27 +00:00
ssa.OpAMD64VPXORDMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPXORDMasked512load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPXORQMasked128,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPXORQMasked128load,
[dev.simd] cmd/compile: updates simd ordering and docs This CL is generated by CL 681395. Change-Id: Ic930aeeb24fc7f95a4d74c77403532d0b0eb39ff Reviewed-on: https://go-review.googlesource.com/c/go/+/681215 Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2025-06-12 03:54:34 +00:00
ssa.OpAMD64VPXORQMasked256,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPXORQMasked256load,
[dev.simd] cmd/compile: add ShiftAll immediate variant This CL is generated by CL 693136. Change-Id: Ifd2278d3f927efa008a14cc5e592e7c14b7120ff Reviewed-on: https://go-review.googlesource.com/c/go/+/693157 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-05 04:28:44 +00:00
ssa.OpAMD64VPXORQMasked512,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPXORQMasked512load,
[dev.simd] simd, cmd/compile: remove move from API These should really be machine ops only. Change-Id: Idcc611719eff068153d88c5162dd2e0883e5e0ca Reviewed-on: https://go-review.googlesource.com/c/go/+/717821 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 20:33:52 +00:00
ssa.OpAMD64VMOVDQU8Masked128,
ssa.OpAMD64VMOVDQU8Masked256,
[dev.simd] simd, cmd/compile: sample peephole optimization for .Masked() This is not the end of such peephole optimizations, there would need to be many of these for many simd operations. Change-Id: I4511f6fac502bc7259c1c4414c96f56eb400c202 Reviewed-on: https://go-review.googlesource.com/c/go/+/697157 TryBot-Bypass: David Chase <drchase@google.com> Commit-Queue: David Chase <drchase@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-08-18 17:58:30 -04:00
ssa.OpAMD64VMOVDQU8Masked512,
[dev.simd] simd, cmd/compile: remove move from API These should really be machine ops only. Change-Id: Idcc611719eff068153d88c5162dd2e0883e5e0ca Reviewed-on: https://go-review.googlesource.com/c/go/+/717821 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 20:33:52 +00:00
ssa.OpAMD64VMOVDQU16Masked128,
ssa.OpAMD64VMOVDQU16Masked256,
[dev.simd] simd, cmd/compile: sample peephole optimization for .Masked() This is not the end of such peephole optimizations, there would need to be many of these for many simd operations. Change-Id: I4511f6fac502bc7259c1c4414c96f56eb400c202 Reviewed-on: https://go-review.googlesource.com/c/go/+/697157 TryBot-Bypass: David Chase <drchase@google.com> Commit-Queue: David Chase <drchase@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-08-18 17:58:30 -04:00
ssa.OpAMD64VMOVDQU16Masked512,
[dev.simd] simd, cmd/compile: remove move from API These should really be machine ops only. Change-Id: Idcc611719eff068153d88c5162dd2e0883e5e0ca Reviewed-on: https://go-review.googlesource.com/c/go/+/717821 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 20:33:52 +00:00
ssa.OpAMD64VMOVDQU32Masked128,
ssa.OpAMD64VMOVDQU32Masked256,
[dev.simd] simd, cmd/compile: sample peephole optimization for .Masked() This is not the end of such peephole optimizations, there would need to be many of these for many simd operations. Change-Id: I4511f6fac502bc7259c1c4414c96f56eb400c202 Reviewed-on: https://go-review.googlesource.com/c/go/+/697157 TryBot-Bypass: David Chase <drchase@google.com> Commit-Queue: David Chase <drchase@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-08-18 17:58:30 -04:00
ssa.OpAMD64VMOVDQU32Masked512,
[dev.simd] simd, cmd/compile: remove move from API These should really be machine ops only. Change-Id: Idcc611719eff068153d88c5162dd2e0883e5e0ca Reviewed-on: https://go-review.googlesource.com/c/go/+/717821 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 20:33:52 +00:00
ssa.OpAMD64VMOVDQU64Masked128,
ssa.OpAMD64VMOVDQU64Masked256,
[dev.simd] simd, cmd/compile: sample peephole optimization for .Masked() This is not the end of such peephole optimizations, there would need to be many of these for many simd operations. Change-Id: I4511f6fac502bc7259c1c4414c96f56eb400c202 Reviewed-on: https://go-review.googlesource.com/c/go/+/697157 TryBot-Bypass: David Chase <drchase@google.com> Commit-Queue: David Chase <drchase@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-08-18 17:58:30 -04:00
ssa.OpAMD64VMOVDQU64Masked512,
[dev.simd] cmd/compile: add ShiftAll immediate variant This CL is generated by CL 693136. Change-Id: Ifd2278d3f927efa008a14cc5e592e7c14b7120ff Reviewed-on: https://go-review.googlesource.com/c/go/+/693157 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-05 04:28:44 +00:00
ssa.OpAMD64VPSLLWMasked128const,
ssa.OpAMD64VPSLLWMasked256const,
ssa.OpAMD64VPSLLWMasked512const,
ssa.OpAMD64VPSLLDMasked128const,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSLLDMasked128constload,
[dev.simd] cmd/compile: add ShiftAll immediate variant This CL is generated by CL 693136. Change-Id: Ifd2278d3f927efa008a14cc5e592e7c14b7120ff Reviewed-on: https://go-review.googlesource.com/c/go/+/693157 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-05 04:28:44 +00:00
ssa.OpAMD64VPSLLDMasked256const,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSLLDMasked256constload,
[dev.simd] cmd/compile: add ShiftAll immediate variant This CL is generated by CL 693136. Change-Id: Ifd2278d3f927efa008a14cc5e592e7c14b7120ff Reviewed-on: https://go-review.googlesource.com/c/go/+/693157 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-05 04:28:44 +00:00
ssa.OpAMD64VPSLLDMasked512const,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSLLDMasked512constload,
[dev.simd] cmd/compile: add ShiftAll immediate variant This CL is generated by CL 693136. Change-Id: Ifd2278d3f927efa008a14cc5e592e7c14b7120ff Reviewed-on: https://go-review.googlesource.com/c/go/+/693157 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-05 04:28:44 +00:00
ssa.OpAMD64VPSLLQMasked128const,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSLLQMasked128constload,
[dev.simd] cmd/compile: add ShiftAll immediate variant This CL is generated by CL 693136. Change-Id: Ifd2278d3f927efa008a14cc5e592e7c14b7120ff Reviewed-on: https://go-review.googlesource.com/c/go/+/693157 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-05 04:28:44 +00:00
ssa.OpAMD64VPSLLQMasked256const,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSLLQMasked256constload,
[dev.simd] cmd/compile: add ShiftAll immediate variant This CL is generated by CL 693136. Change-Id: Ifd2278d3f927efa008a14cc5e592e7c14b7120ff Reviewed-on: https://go-review.googlesource.com/c/go/+/693157 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-05 04:28:44 +00:00
ssa.OpAMD64VPSLLQMasked512const,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSLLQMasked512constload,
[dev.simd] cmd/compile: add ShiftAll immediate variant This CL is generated by CL 693136. Change-Id: Ifd2278d3f927efa008a14cc5e592e7c14b7120ff Reviewed-on: https://go-review.googlesource.com/c/go/+/693157 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-05 04:28:44 +00:00
ssa.OpAMD64VPSRLWMasked128const,
ssa.OpAMD64VPSRLWMasked256const,
ssa.OpAMD64VPSRLWMasked512const,
ssa.OpAMD64VPSRLDMasked128const,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSRLDMasked128constload,
[dev.simd] cmd/compile: add ShiftAll immediate variant This CL is generated by CL 693136. Change-Id: Ifd2278d3f927efa008a14cc5e592e7c14b7120ff Reviewed-on: https://go-review.googlesource.com/c/go/+/693157 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-05 04:28:44 +00:00
ssa.OpAMD64VPSRLDMasked256const,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSRLDMasked256constload,
[dev.simd] cmd/compile: add ShiftAll immediate variant This CL is generated by CL 693136. Change-Id: Ifd2278d3f927efa008a14cc5e592e7c14b7120ff Reviewed-on: https://go-review.googlesource.com/c/go/+/693157 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-05 04:28:44 +00:00
ssa.OpAMD64VPSRLDMasked512const,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSRLDMasked512constload,
[dev.simd] cmd/compile: add ShiftAll immediate variant This CL is generated by CL 693136. Change-Id: Ifd2278d3f927efa008a14cc5e592e7c14b7120ff Reviewed-on: https://go-review.googlesource.com/c/go/+/693157 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-05 04:28:44 +00:00
ssa.OpAMD64VPSRLQMasked128const,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSRLQMasked128constload,
[dev.simd] cmd/compile: add ShiftAll immediate variant This CL is generated by CL 693136. Change-Id: Ifd2278d3f927efa008a14cc5e592e7c14b7120ff Reviewed-on: https://go-review.googlesource.com/c/go/+/693157 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-05 04:28:44 +00:00
ssa.OpAMD64VPSRLQMasked256const,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSRLQMasked256constload,
[dev.simd] cmd/compile: add ShiftAll immediate variant This CL is generated by CL 693136. Change-Id: Ifd2278d3f927efa008a14cc5e592e7c14b7120ff Reviewed-on: https://go-review.googlesource.com/c/go/+/693157 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-05 04:28:44 +00:00
ssa.OpAMD64VPSRLQMasked512const,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSRLQMasked512constload,
[dev.simd] cmd/compile: add ShiftAll immediate variant This CL is generated by CL 693136. Change-Id: Ifd2278d3f927efa008a14cc5e592e7c14b7120ff Reviewed-on: https://go-review.googlesource.com/c/go/+/693157 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-05 04:28:44 +00:00
ssa.OpAMD64VPSRAWMasked128const,
ssa.OpAMD64VPSRAWMasked256const,
ssa.OpAMD64VPSRAWMasked512const,
ssa.OpAMD64VPSRADMasked128const,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSRADMasked128constload,
[dev.simd] cmd/compile: add ShiftAll immediate variant This CL is generated by CL 693136. Change-Id: Ifd2278d3f927efa008a14cc5e592e7c14b7120ff Reviewed-on: https://go-review.googlesource.com/c/go/+/693157 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-05 04:28:44 +00:00
ssa.OpAMD64VPSRADMasked256const,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSRADMasked256constload,
[dev.simd] cmd/compile: add ShiftAll immediate variant This CL is generated by CL 693136. Change-Id: Ifd2278d3f927efa008a14cc5e592e7c14b7120ff Reviewed-on: https://go-review.googlesource.com/c/go/+/693157 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-05 04:28:44 +00:00
ssa.OpAMD64VPSRADMasked512const,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSRADMasked512constload,
[dev.simd] cmd/compile: add ShiftAll immediate variant This CL is generated by CL 693136. Change-Id: Ifd2278d3f927efa008a14cc5e592e7c14b7120ff Reviewed-on: https://go-review.googlesource.com/c/go/+/693157 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-05 04:28:44 +00:00
ssa.OpAMD64VPSRAQMasked128const,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSRAQMasked128constload,
[dev.simd] cmd/compile: add ShiftAll immediate variant This CL is generated by CL 693136. Change-Id: Ifd2278d3f927efa008a14cc5e592e7c14b7120ff Reviewed-on: https://go-review.googlesource.com/c/go/+/693157 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-05 04:28:44 +00:00
ssa.OpAMD64VPSRAQMasked256const,
[dev.simd] cmd/compile: add peepholes for all masked ops and bug fixes For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-11-04 21:46:06 +00:00
ssa.OpAMD64VPSRAQMasked256constload,
ssa.OpAMD64VPSRAQMasked512const,
ssa.OpAMD64VPSRAQMasked512constload:
[dev.simd] cmd/compile: generated codes for amd64 SIMD This CL is generated by tool in CL 667155. Change-Id: I3829d0d2c96fe7000e2dd025a3006f96957d777a Reviewed-on: https://go-review.googlesource.com/c/go/+/675618 Reviewed-by: Junyang Shao <shaojunyang@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2025-05-22 19:59:12 +00:00
x86.ParseSuffix(p, "Z")
}
[dev.simd] cmd/compile: adapters for simd This combines several CLs into a single patch of "glue" for the generated SIMD extensions. This glue includes GOEXPERIMENT checks that disable the creation of user-visible "simd" types and that disable the registration of "simd" intrinsics. The simd type checks were changed to work for either package "simd" or "internal/simd" so that moving that package won't be quite so fragile. cmd/compile, internal/simd: glue for adding SIMD extensions to Go cmd/compile: theft of Cherry's sample SIMD compilation Change-Id: Id44e2f4bafe74032c26de576a8691b6f7d977e01 Reviewed-on: https://go-review.googlesource.com/c/go/+/675598 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Junyang Shao <shaojunyang@google.com>
2025-03-31 10:45:23 +11:00
return true
}
Reference in a new issue Copy permalink