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go/src/cmd/internal/obj/mips/asm0.go

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cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
// cmd/9l/optab.c, cmd/9l/asmout.c from Vita Nuova.
//
// Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved.
// Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net)
// Portions Copyright © 1997-1999 Vita Nuova Limited
// Portions Copyright © 2000-2008 Vita Nuova Holdings Limited (www.vitanuova.com)
// Portions Copyright © 2004,2006 Bruce Ellis
// Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net)
// Revisions Copyright © 2000-2008 Lucent Technologies Inc. and others
all: make copyright headers consistent with one space after period Follows suit with https://go-review.googlesource.com/#/c/20111. Generated by running $ grep -R 'Go Authors. All' * | cut -d":" -f1 | while read F;do perl -pi -e 's/Go Authors. All/Go Authors. All/g' $F;done The code in cmd/internal/unvendor wasn't changed. Fixes #15213 Change-Id: I4f235cee0a62ec435f9e8540a1ec08ae03b1a75f Reviewed-on: https://go-review.googlesource.com/21819 Reviewed-by: Ian Lance Taylor <iant@golang.org> Run-TryBot: Ian Lance Taylor <iant@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-04-10 14:32:26 -07:00
// Portions Copyright © 2009 The Go Authors. All rights reserved.
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
//
// Permission is hereby granted, free of charge, to any person obtaining a copy
// of this software and associated documentation files (the "Software"), to deal
// in the Software without restriction, including without limitation the rights
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
// copies of the Software, and to permit persons to whom the Software is
// furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in
// all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
// THE SOFTWARE.
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
package mips
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
import (
"cmd/internal/obj"
cmd/internal/objabi: extract shared functionality from obj Now only cmd/asm and cmd/compile depend on cmd/internal/obj. Changing the assembler backends no longer requires reinstalling cmd/link or cmd/addr2line. There's also now one canonical definition of the object file format in cmd/internal/objabi/doc.go, with a warning to update all three implementations. objabi is still something of a grab bag of unrelated code (e.g., flag and environment variable handling probably belong in a separate "tool" package), but this is still progress. Fixes #15165. Fixes #20026. Change-Id: Ic4b92fac7d0d35438e0d20c9579aad4085c5534c Reviewed-on: https://go-review.googlesource.com/40972 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2017-04-18 12:53:25 -07:00
"cmd/internal/objabi"
cmd/internal/obj: eliminate Ctxt.Mode Replace Ctxt.Mode with a method, Ctxt.RegWidth, which is calculated directly off the arch info. I believe that Prog.Mode can also be removed; future CL. This is a step towards obj.Link immutability. Passes toolstash-check -all. Updates #15756 Change-Id: Ifd7f8f6ed0a2fdc032d1dd306fcd695a14aa5bc5 Reviewed-on: https://go-review.googlesource.com/38446 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-03-21 22:23:45 -07:00
"cmd/internal/sys"
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
"fmt"
"log"
"sort"
)
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
// ctxt0 holds state while assembling a single function.
// Each function gets a fresh ctxt0.
// This allows for multiple functions to be safely concurrently assembled.
type ctxt0 struct {
ctxt *obj.Link
newprog obj.ProgAlloc
cursym *obj.LSym
autosize int32
instoffset int64
pc int64
}
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
// Instruction layout.
const (
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
mips64FuncAlign = 8
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
)
const (
r0iszero = 1
)
type Optab struct {
cmd/internal/obj: eliminate Ctxt.Mode Replace Ctxt.Mode with a method, Ctxt.RegWidth, which is calculated directly off the arch info. I believe that Prog.Mode can also be removed; future CL. This is a step towards obj.Link immutability. Passes toolstash-check -all. Updates #15756 Change-Id: Ifd7f8f6ed0a2fdc032d1dd306fcd695a14aa5bc5 Reviewed-on: https://go-review.googlesource.com/38446 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-03-21 22:23:45 -07:00
as obj.As
a1 uint8
a2 uint8
a3 uint8
type_ int8
size int8
param int16
cmd/internal/obj/mips: standardize on sys.MIPS and sys.MIPS64 constants CL 38446 introduced the use of the sys.ArchFamily type into the cmd/internal/obj/mips package and redefined the mips.Mips32 and mips.Mips64 constants in terms of their sys.ArchFamily counterparts. This CL removes these local declarations and consolidates on sys.MIPS and sys.MIPS64 respectively. Change-Id: Id7aab6c7fd0de42ff43dde605df6bd4c85a3d895 Reviewed-on: https://go-review.googlesource.com/38287 Reviewed-by: Cherry Zhang <cherryyz@google.com> Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org>
2017-03-23 10:56:58 +11:00
family sys.ArchFamily // 0 means both sys.MIPS and sys.MIPS64
cmd/internal/obj/mips: add a flag field to Optab The flag field will be used for marking unsafe points. This CL just adds the field, not doing anything with it. The next CL will make use of it. This is for making the diff simpler. Change-Id: I6ff5406ba2e53ae8a882184733d88482a2ca8e2a Reviewed-on: https://go-review.googlesource.com/c/go/+/203938 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Austin Clements <austin@google.com>
2019-10-28 14:41:49 -04:00
flag uint8
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: mark unsafe points For async preemption, we will be using REGTMP as a temporary register in injected call on MIPS, which will clobber it. So any code that uses REGTMP is not safe for async preemption. In the assembler backend, we expand a Prog to multiple machine instructions and use REGTMP as a temporary register if necessary. These need to be marked unsafe. In fact, most of the multi-instruction Progs use REGTMP, so we mark all of them, except ones that are whitelisted. Change-Id: Ic00ae5589683c2c9525abdaee076d884df6b0d1e Reviewed-on: https://go-review.googlesource.com/c/go/+/203718 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Keith Randall <khr@golang.org>
2019-10-26 22:49:13 -04:00
const (
// Optab.flag
NOTUSETMP = 1 << iota // p expands to multiple instructions, but does NOT use REGTMP
)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
var optab = []Optab{
cmd/internal/obj/mips: add a flag field to Optab The flag field will be used for marking unsafe points. This CL just adds the field, not doing anything with it. The next CL will make use of it. This is for making the diff simpler. Change-Id: I6ff5406ba2e53ae8a882184733d88482a2ca8e2a Reviewed-on: https://go-review.googlesource.com/c/go/+/203938 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Austin Clements <austin@google.com>
2019-10-28 14:41:49 -04:00
{obj.ATEXT, C_LEXT, C_NONE, C_TEXTSIZE, 0, 0, 0, sys.MIPS64, 0},
{obj.ATEXT, C_ADDR, C_NONE, C_TEXTSIZE, 0, 0, 0, 0, 0},
{AMOVW, C_REG, C_NONE, C_REG, 1, 4, 0, 0, 0},
{AMOVV, C_REG, C_NONE, C_REG, 1, 4, 0, sys.MIPS64, 0},
cmd/internal/obj/mips: mark unsafe points For async preemption, we will be using REGTMP as a temporary register in injected call on MIPS, which will clobber it. So any code that uses REGTMP is not safe for async preemption. In the assembler backend, we expand a Prog to multiple machine instructions and use REGTMP as a temporary register if necessary. These need to be marked unsafe. In fact, most of the multi-instruction Progs use REGTMP, so we mark all of them, except ones that are whitelisted. Change-Id: Ic00ae5589683c2c9525abdaee076d884df6b0d1e Reviewed-on: https://go-review.googlesource.com/c/go/+/203718 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Keith Randall <khr@golang.org>
2019-10-26 22:49:13 -04:00
{AMOVB, C_REG, C_NONE, C_REG, 12, 8, 0, 0, NOTUSETMP},
cmd/internal/obj/mips: add a flag field to Optab The flag field will be used for marking unsafe points. This CL just adds the field, not doing anything with it. The next CL will make use of it. This is for making the diff simpler. Change-Id: I6ff5406ba2e53ae8a882184733d88482a2ca8e2a Reviewed-on: https://go-review.googlesource.com/c/go/+/203938 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Austin Clements <austin@google.com>
2019-10-28 14:41:49 -04:00
{AMOVBU, C_REG, C_NONE, C_REG, 13, 4, 0, 0, 0},
cmd/internal/obj/mips: mark unsafe points For async preemption, we will be using REGTMP as a temporary register in injected call on MIPS, which will clobber it. So any code that uses REGTMP is not safe for async preemption. In the assembler backend, we expand a Prog to multiple machine instructions and use REGTMP as a temporary register if necessary. These need to be marked unsafe. In fact, most of the multi-instruction Progs use REGTMP, so we mark all of them, except ones that are whitelisted. Change-Id: Ic00ae5589683c2c9525abdaee076d884df6b0d1e Reviewed-on: https://go-review.googlesource.com/c/go/+/203718 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Keith Randall <khr@golang.org>
2019-10-26 22:49:13 -04:00
{AMOVWU, C_REG, C_NONE, C_REG, 14, 8, 0, sys.MIPS64, NOTUSETMP},
cmd/internal/obj/mips: add a flag field to Optab The flag field will be used for marking unsafe points. This CL just adds the field, not doing anything with it. The next CL will make use of it. This is for making the diff simpler. Change-Id: I6ff5406ba2e53ae8a882184733d88482a2ca8e2a Reviewed-on: https://go-review.googlesource.com/c/go/+/203938 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Austin Clements <austin@google.com>
2019-10-28 14:41:49 -04:00
{ASUB, C_REG, C_REG, C_REG, 2, 4, 0, 0, 0},
{ASUBV, C_REG, C_REG, C_REG, 2, 4, 0, sys.MIPS64, 0},
{AADD, C_REG, C_REG, C_REG, 2, 4, 0, 0, 0},
{AADDV, C_REG, C_REG, C_REG, 2, 4, 0, sys.MIPS64, 0},
{AAND, C_REG, C_REG, C_REG, 2, 4, 0, 0, 0},
{ASUB, C_REG, C_NONE, C_REG, 2, 4, 0, 0, 0},
{ASUBV, C_REG, C_NONE, C_REG, 2, 4, 0, sys.MIPS64, 0},
{AADD, C_REG, C_NONE, C_REG, 2, 4, 0, 0, 0},
{AADDV, C_REG, C_NONE, C_REG, 2, 4, 0, sys.MIPS64, 0},
{AAND, C_REG, C_NONE, C_REG, 2, 4, 0, 0, 0},
{ACMOVN, C_REG, C_REG, C_REG, 2, 4, 0, 0, 0},
{ANEGW, C_REG, C_NONE, C_REG, 2, 4, 0, 0, 0},
{ANEGV, C_REG, C_NONE, C_REG, 2, 4, 0, sys.MIPS64, 0},
{ASLL, C_REG, C_NONE, C_REG, 9, 4, 0, 0, 0},
{ASLL, C_REG, C_REG, C_REG, 9, 4, 0, 0, 0},
{ASLLV, C_REG, C_NONE, C_REG, 9, 4, 0, sys.MIPS64, 0},
{ASLLV, C_REG, C_REG, C_REG, 9, 4, 0, sys.MIPS64, 0},
{ACLO, C_REG, C_NONE, C_REG, 9, 4, 0, 0, 0},
{AADDF, C_FREG, C_NONE, C_FREG, 32, 4, 0, 0, 0},
{AADDF, C_FREG, C_REG, C_FREG, 32, 4, 0, 0, 0},
{ACMPEQF, C_FREG, C_REG, C_NONE, 32, 4, 0, 0, 0},
{AABSF, C_FREG, C_NONE, C_FREG, 33, 4, 0, 0, 0},
{AMOVVF, C_FREG, C_NONE, C_FREG, 33, 4, 0, sys.MIPS64, 0},
{AMOVF, C_FREG, C_NONE, C_FREG, 33, 4, 0, 0, 0},
{AMOVD, C_FREG, C_NONE, C_FREG, 33, 4, 0, 0, 0},
{AMOVW, C_REG, C_NONE, C_SEXT, 7, 4, REGSB, sys.MIPS64, 0},
{AMOVWU, C_REG, C_NONE, C_SEXT, 7, 4, REGSB, sys.MIPS64, 0},
{AMOVV, C_REG, C_NONE, C_SEXT, 7, 4, REGSB, sys.MIPS64, 0},
{AMOVB, C_REG, C_NONE, C_SEXT, 7, 4, REGSB, sys.MIPS64, 0},
{AMOVBU, C_REG, C_NONE, C_SEXT, 7, 4, REGSB, sys.MIPS64, 0},
{AMOVWL, C_REG, C_NONE, C_SEXT, 7, 4, REGSB, sys.MIPS64, 0},
{AMOVVL, C_REG, C_NONE, C_SEXT, 7, 4, REGSB, sys.MIPS64, 0},
{AMOVW, C_REG, C_NONE, C_SAUTO, 7, 4, REGSP, 0, 0},
{AMOVWU, C_REG, C_NONE, C_SAUTO, 7, 4, REGSP, sys.MIPS64, 0},
{AMOVV, C_REG, C_NONE, C_SAUTO, 7, 4, REGSP, sys.MIPS64, 0},
{AMOVB, C_REG, C_NONE, C_SAUTO, 7, 4, REGSP, 0, 0},
{AMOVBU, C_REG, C_NONE, C_SAUTO, 7, 4, REGSP, 0, 0},
{AMOVWL, C_REG, C_NONE, C_SAUTO, 7, 4, REGSP, 0, 0},
{AMOVVL, C_REG, C_NONE, C_SAUTO, 7, 4, REGSP, sys.MIPS64, 0},
{AMOVW, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO, 0, 0},
{AMOVWU, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO, sys.MIPS64, 0},
{AMOVV, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO, sys.MIPS64, 0},
{AMOVB, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO, 0, 0},
{AMOVBU, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO, 0, 0},
{AMOVWL, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO, 0, 0},
{AMOVVL, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO, sys.MIPS64, 0},
{ASC, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO, 0, 0},
{ASCV, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO, sys.MIPS64, 0},
{AMOVW, C_SEXT, C_NONE, C_REG, 8, 4, REGSB, sys.MIPS64, 0},
{AMOVWU, C_SEXT, C_NONE, C_REG, 8, 4, REGSB, sys.MIPS64, 0},
{AMOVV, C_SEXT, C_NONE, C_REG, 8, 4, REGSB, sys.MIPS64, 0},
{AMOVB, C_SEXT, C_NONE, C_REG, 8, 4, REGSB, sys.MIPS64, 0},
{AMOVBU, C_SEXT, C_NONE, C_REG, 8, 4, REGSB, sys.MIPS64, 0},
{AMOVWL, C_SEXT, C_NONE, C_REG, 8, 4, REGSB, sys.MIPS64, 0},
{AMOVVL, C_SEXT, C_NONE, C_REG, 8, 4, REGSB, sys.MIPS64, 0},
{AMOVW, C_SAUTO, C_NONE, C_REG, 8, 4, REGSP, 0, 0},
{AMOVWU, C_SAUTO, C_NONE, C_REG, 8, 4, REGSP, sys.MIPS64, 0},
{AMOVV, C_SAUTO, C_NONE, C_REG, 8, 4, REGSP, sys.MIPS64, 0},
{AMOVB, C_SAUTO, C_NONE, C_REG, 8, 4, REGSP, 0, 0},
{AMOVBU, C_SAUTO, C_NONE, C_REG, 8, 4, REGSP, 0, 0},
{AMOVWL, C_SAUTO, C_NONE, C_REG, 8, 4, REGSP, 0, 0},
{AMOVVL, C_SAUTO, C_NONE, C_REG, 8, 4, REGSP, sys.MIPS64, 0},
{AMOVW, C_SOREG, C_NONE, C_REG, 8, 4, REGZERO, 0, 0},
{AMOVWU, C_SOREG, C_NONE, C_REG, 8, 4, REGZERO, sys.MIPS64, 0},
{AMOVV, C_SOREG, C_NONE, C_REG, 8, 4, REGZERO, sys.MIPS64, 0},
{AMOVB, C_SOREG, C_NONE, C_REG, 8, 4, REGZERO, 0, 0},
{AMOVBU, C_SOREG, C_NONE, C_REG, 8, 4, REGZERO, 0, 0},
{AMOVWL, C_SOREG, C_NONE, C_REG, 8, 4, REGZERO, 0, 0},
{AMOVVL, C_SOREG, C_NONE, C_REG, 8, 4, REGZERO, sys.MIPS64, 0},
{ALL, C_SOREG, C_NONE, C_REG, 8, 4, REGZERO, 0, 0},
{ALLV, C_SOREG, C_NONE, C_REG, 8, 4, REGZERO, sys.MIPS64, 0},
{AMOVW, C_REG, C_NONE, C_LEXT, 35, 12, REGSB, sys.MIPS64, 0},
{AMOVWU, C_REG, C_NONE, C_LEXT, 35, 12, REGSB, sys.MIPS64, 0},
{AMOVV, C_REG, C_NONE, C_LEXT, 35, 12, REGSB, sys.MIPS64, 0},
{AMOVB, C_REG, C_NONE, C_LEXT, 35, 12, REGSB, sys.MIPS64, 0},
{AMOVBU, C_REG, C_NONE, C_LEXT, 35, 12, REGSB, sys.MIPS64, 0},
{AMOVW, C_REG, C_NONE, C_LAUTO, 35, 12, REGSP, 0, 0},
{AMOVWU, C_REG, C_NONE, C_LAUTO, 35, 12, REGSP, sys.MIPS64, 0},
{AMOVV, C_REG, C_NONE, C_LAUTO, 35, 12, REGSP, sys.MIPS64, 0},
{AMOVB, C_REG, C_NONE, C_LAUTO, 35, 12, REGSP, 0, 0},
{AMOVBU, C_REG, C_NONE, C_LAUTO, 35, 12, REGSP, 0, 0},
{AMOVW, C_REG, C_NONE, C_LOREG, 35, 12, REGZERO, 0, 0},
{AMOVWU, C_REG, C_NONE, C_LOREG, 35, 12, REGZERO, sys.MIPS64, 0},
{AMOVV, C_REG, C_NONE, C_LOREG, 35, 12, REGZERO, sys.MIPS64, 0},
{AMOVB, C_REG, C_NONE, C_LOREG, 35, 12, REGZERO, 0, 0},
{AMOVBU, C_REG, C_NONE, C_LOREG, 35, 12, REGZERO, 0, 0},
{ASC, C_REG, C_NONE, C_LOREG, 35, 12, REGZERO, 0, 0},
{AMOVW, C_REG, C_NONE, C_ADDR, 50, 8, 0, sys.MIPS, 0},
{AMOVW, C_REG, C_NONE, C_ADDR, 50, 12, 0, sys.MIPS64, 0},
{AMOVWU, C_REG, C_NONE, C_ADDR, 50, 12, 0, sys.MIPS64, 0},
{AMOVV, C_REG, C_NONE, C_ADDR, 50, 12, 0, sys.MIPS64, 0},
{AMOVB, C_REG, C_NONE, C_ADDR, 50, 8, 0, sys.MIPS, 0},
{AMOVB, C_REG, C_NONE, C_ADDR, 50, 12, 0, sys.MIPS64, 0},
{AMOVBU, C_REG, C_NONE, C_ADDR, 50, 8, 0, sys.MIPS, 0},
{AMOVBU, C_REG, C_NONE, C_ADDR, 50, 12, 0, sys.MIPS64, 0},
cmd/internal/obj/mips: mark unsafe points For async preemption, we will be using REGTMP as a temporary register in injected call on MIPS, which will clobber it. So any code that uses REGTMP is not safe for async preemption. In the assembler backend, we expand a Prog to multiple machine instructions and use REGTMP as a temporary register if necessary. These need to be marked unsafe. In fact, most of the multi-instruction Progs use REGTMP, so we mark all of them, except ones that are whitelisted. Change-Id: Ic00ae5589683c2c9525abdaee076d884df6b0d1e Reviewed-on: https://go-review.googlesource.com/c/go/+/203718 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Keith Randall <khr@golang.org>
2019-10-26 22:49:13 -04:00
{AMOVW, C_REG, C_NONE, C_TLS, 53, 8, 0, 0, NOTUSETMP},
{AMOVWU, C_REG, C_NONE, C_TLS, 53, 8, 0, sys.MIPS64, NOTUSETMP},
{AMOVV, C_REG, C_NONE, C_TLS, 53, 8, 0, sys.MIPS64, NOTUSETMP},
{AMOVB, C_REG, C_NONE, C_TLS, 53, 8, 0, 0, NOTUSETMP},
{AMOVBU, C_REG, C_NONE, C_TLS, 53, 8, 0, 0, NOTUSETMP},
cmd/internal/obj/mips: add a flag field to Optab The flag field will be used for marking unsafe points. This CL just adds the field, not doing anything with it. The next CL will make use of it. This is for making the diff simpler. Change-Id: I6ff5406ba2e53ae8a882184733d88482a2ca8e2a Reviewed-on: https://go-review.googlesource.com/c/go/+/203938 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Austin Clements <austin@google.com>
2019-10-28 14:41:49 -04:00
{AMOVW, C_LEXT, C_NONE, C_REG, 36, 12, REGSB, sys.MIPS64, 0},
{AMOVWU, C_LEXT, C_NONE, C_REG, 36, 12, REGSB, sys.MIPS64, 0},
{AMOVV, C_LEXT, C_NONE, C_REG, 36, 12, REGSB, sys.MIPS64, 0},
{AMOVB, C_LEXT, C_NONE, C_REG, 36, 12, REGSB, sys.MIPS64, 0},
{AMOVBU, C_LEXT, C_NONE, C_REG, 36, 12, REGSB, sys.MIPS64, 0},
{AMOVW, C_LAUTO, C_NONE, C_REG, 36, 12, REGSP, 0, 0},
{AMOVWU, C_LAUTO, C_NONE, C_REG, 36, 12, REGSP, sys.MIPS64, 0},
{AMOVV, C_LAUTO, C_NONE, C_REG, 36, 12, REGSP, sys.MIPS64, 0},
{AMOVB, C_LAUTO, C_NONE, C_REG, 36, 12, REGSP, 0, 0},
{AMOVBU, C_LAUTO, C_NONE, C_REG, 36, 12, REGSP, 0, 0},
{AMOVW, C_LOREG, C_NONE, C_REG, 36, 12, REGZERO, 0, 0},
{AMOVWU, C_LOREG, C_NONE, C_REG, 36, 12, REGZERO, sys.MIPS64, 0},
{AMOVV, C_LOREG, C_NONE, C_REG, 36, 12, REGZERO, sys.MIPS64, 0},
{AMOVB, C_LOREG, C_NONE, C_REG, 36, 12, REGZERO, 0, 0},
{AMOVBU, C_LOREG, C_NONE, C_REG, 36, 12, REGZERO, 0, 0},
{AMOVW, C_ADDR, C_NONE, C_REG, 51, 8, 0, sys.MIPS, 0},
{AMOVW, C_ADDR, C_NONE, C_REG, 51, 12, 0, sys.MIPS64, 0},
{AMOVWU, C_ADDR, C_NONE, C_REG, 51, 12, 0, sys.MIPS64, 0},
{AMOVV, C_ADDR, C_NONE, C_REG, 51, 12, 0, sys.MIPS64, 0},
{AMOVB, C_ADDR, C_NONE, C_REG, 51, 8, 0, sys.MIPS, 0},
{AMOVB, C_ADDR, C_NONE, C_REG, 51, 12, 0, sys.MIPS64, 0},
{AMOVBU, C_ADDR, C_NONE, C_REG, 51, 8, 0, sys.MIPS, 0},
{AMOVBU, C_ADDR, C_NONE, C_REG, 51, 12, 0, sys.MIPS64, 0},
cmd/internal/obj/mips: mark unsafe points For async preemption, we will be using REGTMP as a temporary register in injected call on MIPS, which will clobber it. So any code that uses REGTMP is not safe for async preemption. In the assembler backend, we expand a Prog to multiple machine instructions and use REGTMP as a temporary register if necessary. These need to be marked unsafe. In fact, most of the multi-instruction Progs use REGTMP, so we mark all of them, except ones that are whitelisted. Change-Id: Ic00ae5589683c2c9525abdaee076d884df6b0d1e Reviewed-on: https://go-review.googlesource.com/c/go/+/203718 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Keith Randall <khr@golang.org>
2019-10-26 22:49:13 -04:00
{AMOVW, C_TLS, C_NONE, C_REG, 54, 8, 0, 0, NOTUSETMP},
{AMOVWU, C_TLS, C_NONE, C_REG, 54, 8, 0, sys.MIPS64, NOTUSETMP},
{AMOVV, C_TLS, C_NONE, C_REG, 54, 8, 0, sys.MIPS64, NOTUSETMP},
{AMOVB, C_TLS, C_NONE, C_REG, 54, 8, 0, 0, NOTUSETMP},
{AMOVBU, C_TLS, C_NONE, C_REG, 54, 8, 0, 0, NOTUSETMP},
cmd/internal/obj/mips: add a flag field to Optab The flag field will be used for marking unsafe points. This CL just adds the field, not doing anything with it. The next CL will make use of it. This is for making the diff simpler. Change-Id: I6ff5406ba2e53ae8a882184733d88482a2ca8e2a Reviewed-on: https://go-review.googlesource.com/c/go/+/203938 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Austin Clements <austin@google.com>
2019-10-28 14:41:49 -04:00
{AMOVW, C_SECON, C_NONE, C_REG, 3, 4, REGSB, sys.MIPS64, 0},
{AMOVV, C_SECON, C_NONE, C_REG, 3, 4, REGSB, sys.MIPS64, 0},
{AMOVW, C_SACON, C_NONE, C_REG, 3, 4, REGSP, 0, 0},
{AMOVV, C_SACON, C_NONE, C_REG, 3, 4, REGSP, sys.MIPS64, 0},
cmd/internal/obj/mips: mark unsafe points For async preemption, we will be using REGTMP as a temporary register in injected call on MIPS, which will clobber it. So any code that uses REGTMP is not safe for async preemption. In the assembler backend, we expand a Prog to multiple machine instructions and use REGTMP as a temporary register if necessary. These need to be marked unsafe. In fact, most of the multi-instruction Progs use REGTMP, so we mark all of them, except ones that are whitelisted. Change-Id: Ic00ae5589683c2c9525abdaee076d884df6b0d1e Reviewed-on: https://go-review.googlesource.com/c/go/+/203718 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Keith Randall <khr@golang.org>
2019-10-26 22:49:13 -04:00
{AMOVW, C_LECON, C_NONE, C_REG, 52, 8, REGSB, sys.MIPS, NOTUSETMP},
{AMOVW, C_LECON, C_NONE, C_REG, 52, 12, REGSB, sys.MIPS64, NOTUSETMP},
{AMOVV, C_LECON, C_NONE, C_REG, 52, 12, REGSB, sys.MIPS64, NOTUSETMP},
cmd/internal/obj/mips: add a flag field to Optab The flag field will be used for marking unsafe points. This CL just adds the field, not doing anything with it. The next CL will make use of it. This is for making the diff simpler. Change-Id: I6ff5406ba2e53ae8a882184733d88482a2ca8e2a Reviewed-on: https://go-review.googlesource.com/c/go/+/203938 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Austin Clements <austin@google.com>
2019-10-28 14:41:49 -04:00
{AMOVW, C_LACON, C_NONE, C_REG, 26, 12, REGSP, 0, 0},
{AMOVV, C_LACON, C_NONE, C_REG, 26, 12, REGSP, sys.MIPS64, 0},
{AMOVW, C_ADDCON, C_NONE, C_REG, 3, 4, REGZERO, 0, 0},
{AMOVV, C_ADDCON, C_NONE, C_REG, 3, 4, REGZERO, sys.MIPS64, 0},
{AMOVW, C_ANDCON, C_NONE, C_REG, 3, 4, REGZERO, 0, 0},
{AMOVV, C_ANDCON, C_NONE, C_REG, 3, 4, REGZERO, sys.MIPS64, 0},
cmd/internal/obj/mips: mark unsafe points For async preemption, we will be using REGTMP as a temporary register in injected call on MIPS, which will clobber it. So any code that uses REGTMP is not safe for async preemption. In the assembler backend, we expand a Prog to multiple machine instructions and use REGTMP as a temporary register if necessary. These need to be marked unsafe. In fact, most of the multi-instruction Progs use REGTMP, so we mark all of them, except ones that are whitelisted. Change-Id: Ic00ae5589683c2c9525abdaee076d884df6b0d1e Reviewed-on: https://go-review.googlesource.com/c/go/+/203718 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Keith Randall <khr@golang.org>
2019-10-26 22:49:13 -04:00
{AMOVW, C_STCON, C_NONE, C_REG, 55, 8, 0, 0, NOTUSETMP},
{AMOVV, C_STCON, C_NONE, C_REG, 55, 8, 0, sys.MIPS64, NOTUSETMP},
cmd/internal/obj/mips: add a flag field to Optab The flag field will be used for marking unsafe points. This CL just adds the field, not doing anything with it. The next CL will make use of it. This is for making the diff simpler. Change-Id: I6ff5406ba2e53ae8a882184733d88482a2ca8e2a Reviewed-on: https://go-review.googlesource.com/c/go/+/203938 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Austin Clements <austin@google.com>
2019-10-28 14:41:49 -04:00
{AMOVW, C_UCON, C_NONE, C_REG, 24, 4, 0, 0, 0},
{AMOVV, C_UCON, C_NONE, C_REG, 24, 4, 0, sys.MIPS64, 0},
cmd/internal/obj/mips: mark unsafe points For async preemption, we will be using REGTMP as a temporary register in injected call on MIPS, which will clobber it. So any code that uses REGTMP is not safe for async preemption. In the assembler backend, we expand a Prog to multiple machine instructions and use REGTMP as a temporary register if necessary. These need to be marked unsafe. In fact, most of the multi-instruction Progs use REGTMP, so we mark all of them, except ones that are whitelisted. Change-Id: Ic00ae5589683c2c9525abdaee076d884df6b0d1e Reviewed-on: https://go-review.googlesource.com/c/go/+/203718 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Keith Randall <khr@golang.org>
2019-10-26 22:49:13 -04:00
{AMOVW, C_LCON, C_NONE, C_REG, 19, 8, 0, 0, NOTUSETMP},
{AMOVV, C_LCON, C_NONE, C_REG, 19, 8, 0, sys.MIPS64, NOTUSETMP},
cmd/internal/obj/mips: add a flag field to Optab The flag field will be used for marking unsafe points. This CL just adds the field, not doing anything with it. The next CL will make use of it. This is for making the diff simpler. Change-Id: I6ff5406ba2e53ae8a882184733d88482a2ca8e2a Reviewed-on: https://go-review.googlesource.com/c/go/+/203938 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Austin Clements <austin@google.com>
2019-10-28 14:41:49 -04:00
{AMOVW, C_HI, C_NONE, C_REG, 20, 4, 0, 0, 0},
{AMOVV, C_HI, C_NONE, C_REG, 20, 4, 0, sys.MIPS64, 0},
{AMOVW, C_LO, C_NONE, C_REG, 20, 4, 0, 0, 0},
{AMOVV, C_LO, C_NONE, C_REG, 20, 4, 0, sys.MIPS64, 0},
{AMOVW, C_REG, C_NONE, C_HI, 21, 4, 0, 0, 0},
{AMOVV, C_REG, C_NONE, C_HI, 21, 4, 0, sys.MIPS64, 0},
{AMOVW, C_REG, C_NONE, C_LO, 21, 4, 0, 0, 0},
{AMOVV, C_REG, C_NONE, C_LO, 21, 4, 0, sys.MIPS64, 0},
{AMUL, C_REG, C_REG, C_NONE, 22, 4, 0, 0, 0},
{AMUL, C_REG, C_REG, C_REG, 22, 4, 0, 0, 0},
{AMULV, C_REG, C_REG, C_NONE, 22, 4, 0, sys.MIPS64, 0},
{AADD, C_ADD0CON, C_REG, C_REG, 4, 4, 0, 0, 0},
{AADD, C_ADD0CON, C_NONE, C_REG, 4, 4, 0, 0, 0},
{AADD, C_ANDCON, C_REG, C_REG, 10, 8, 0, 0, 0},
{AADD, C_ANDCON, C_NONE, C_REG, 10, 8, 0, 0, 0},
{AADDV, C_ADD0CON, C_REG, C_REG, 4, 4, 0, sys.MIPS64, 0},
{AADDV, C_ADD0CON, C_NONE, C_REG, 4, 4, 0, sys.MIPS64, 0},
{AADDV, C_ANDCON, C_REG, C_REG, 10, 8, 0, sys.MIPS64, 0},
{AADDV, C_ANDCON, C_NONE, C_REG, 10, 8, 0, sys.MIPS64, 0},
{AAND, C_AND0CON, C_REG, C_REG, 4, 4, 0, 0, 0},
{AAND, C_AND0CON, C_NONE, C_REG, 4, 4, 0, 0, 0},
{AAND, C_ADDCON, C_REG, C_REG, 10, 8, 0, 0, 0},
{AAND, C_ADDCON, C_NONE, C_REG, 10, 8, 0, 0, 0},
{AADD, C_UCON, C_REG, C_REG, 25, 8, 0, 0, 0},
{AADD, C_UCON, C_NONE, C_REG, 25, 8, 0, 0, 0},
{AADDV, C_UCON, C_REG, C_REG, 25, 8, 0, sys.MIPS64, 0},
{AADDV, C_UCON, C_NONE, C_REG, 25, 8, 0, sys.MIPS64, 0},
{AAND, C_UCON, C_REG, C_REG, 25, 8, 0, 0, 0},
{AAND, C_UCON, C_NONE, C_REG, 25, 8, 0, 0, 0},
{AADD, C_LCON, C_NONE, C_REG, 23, 12, 0, 0, 0},
{AADDV, C_LCON, C_NONE, C_REG, 23, 12, 0, sys.MIPS64, 0},
{AAND, C_LCON, C_NONE, C_REG, 23, 12, 0, 0, 0},
{AADD, C_LCON, C_REG, C_REG, 23, 12, 0, 0, 0},
{AADDV, C_LCON, C_REG, C_REG, 23, 12, 0, sys.MIPS64, 0},
{AAND, C_LCON, C_REG, C_REG, 23, 12, 0, 0, 0},
{ASLL, C_SCON, C_REG, C_REG, 16, 4, 0, 0, 0},
{ASLL, C_SCON, C_NONE, C_REG, 16, 4, 0, 0, 0},
{ASLLV, C_SCON, C_REG, C_REG, 16, 4, 0, sys.MIPS64, 0},
{ASLLV, C_SCON, C_NONE, C_REG, 16, 4, 0, sys.MIPS64, 0},
{ASYSCALL, C_NONE, C_NONE, C_NONE, 5, 4, 0, 0, 0},
{ABEQ, C_REG, C_REG, C_SBRA, 6, 4, 0, 0, 0},
{ABEQ, C_REG, C_NONE, C_SBRA, 6, 4, 0, 0, 0},
{ABLEZ, C_REG, C_NONE, C_SBRA, 6, 4, 0, 0, 0},
cmd/internal/obj/mips: mark unsafe points For async preemption, we will be using REGTMP as a temporary register in injected call on MIPS, which will clobber it. So any code that uses REGTMP is not safe for async preemption. In the assembler backend, we expand a Prog to multiple machine instructions and use REGTMP as a temporary register if necessary. These need to be marked unsafe. In fact, most of the multi-instruction Progs use REGTMP, so we mark all of them, except ones that are whitelisted. Change-Id: Ic00ae5589683c2c9525abdaee076d884df6b0d1e Reviewed-on: https://go-review.googlesource.com/c/go/+/203718 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Keith Randall <khr@golang.org>
2019-10-26 22:49:13 -04:00
{ABFPT, C_NONE, C_NONE, C_SBRA, 6, 8, 0, 0, NOTUSETMP},
cmd/internal/obj/mips: add a flag field to Optab The flag field will be used for marking unsafe points. This CL just adds the field, not doing anything with it. The next CL will make use of it. This is for making the diff simpler. Change-Id: I6ff5406ba2e53ae8a882184733d88482a2ca8e2a Reviewed-on: https://go-review.googlesource.com/c/go/+/203938 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Austin Clements <austin@google.com>
2019-10-28 14:41:49 -04:00
{AJMP, C_NONE, C_NONE, C_LBRA, 11, 4, 0, 0, 0},
{AJAL, C_NONE, C_NONE, C_LBRA, 11, 4, 0, 0, 0},
{AJMP, C_NONE, C_NONE, C_ZOREG, 18, 4, REGZERO, 0, 0},
{AJAL, C_NONE, C_NONE, C_ZOREG, 18, 4, REGLINK, 0, 0},
{AMOVW, C_SEXT, C_NONE, C_FREG, 27, 4, REGSB, sys.MIPS64, 0},
{AMOVF, C_SEXT, C_NONE, C_FREG, 27, 4, REGSB, sys.MIPS64, 0},
{AMOVD, C_SEXT, C_NONE, C_FREG, 27, 4, REGSB, sys.MIPS64, 0},
{AMOVW, C_SAUTO, C_NONE, C_FREG, 27, 4, REGSP, sys.MIPS64, 0},
{AMOVF, C_SAUTO, C_NONE, C_FREG, 27, 4, REGSP, 0, 0},
{AMOVD, C_SAUTO, C_NONE, C_FREG, 27, 4, REGSP, 0, 0},
{AMOVW, C_SOREG, C_NONE, C_FREG, 27, 4, REGZERO, sys.MIPS64, 0},
{AMOVF, C_SOREG, C_NONE, C_FREG, 27, 4, REGZERO, 0, 0},
{AMOVD, C_SOREG, C_NONE, C_FREG, 27, 4, REGZERO, 0, 0},
{AMOVW, C_LEXT, C_NONE, C_FREG, 27, 12, REGSB, sys.MIPS64, 0},
{AMOVF, C_LEXT, C_NONE, C_FREG, 27, 12, REGSB, sys.MIPS64, 0},
{AMOVD, C_LEXT, C_NONE, C_FREG, 27, 12, REGSB, sys.MIPS64, 0},
{AMOVW, C_LAUTO, C_NONE, C_FREG, 27, 12, REGSP, sys.MIPS64, 0},
{AMOVF, C_LAUTO, C_NONE, C_FREG, 27, 12, REGSP, 0, 0},
{AMOVD, C_LAUTO, C_NONE, C_FREG, 27, 12, REGSP, 0, 0},
{AMOVW, C_LOREG, C_NONE, C_FREG, 27, 12, REGZERO, sys.MIPS64, 0},
{AMOVF, C_LOREG, C_NONE, C_FREG, 27, 12, REGZERO, 0, 0},
{AMOVD, C_LOREG, C_NONE, C_FREG, 27, 12, REGZERO, 0, 0},
{AMOVF, C_ADDR, C_NONE, C_FREG, 51, 8, 0, sys.MIPS, 0},
{AMOVF, C_ADDR, C_NONE, C_FREG, 51, 12, 0, sys.MIPS64, 0},
{AMOVD, C_ADDR, C_NONE, C_FREG, 51, 8, 0, sys.MIPS, 0},
{AMOVD, C_ADDR, C_NONE, C_FREG, 51, 12, 0, sys.MIPS64, 0},
{AMOVW, C_FREG, C_NONE, C_SEXT, 28, 4, REGSB, sys.MIPS64, 0},
{AMOVF, C_FREG, C_NONE, C_SEXT, 28, 4, REGSB, sys.MIPS64, 0},
{AMOVD, C_FREG, C_NONE, C_SEXT, 28, 4, REGSB, sys.MIPS64, 0},
{AMOVW, C_FREG, C_NONE, C_SAUTO, 28, 4, REGSP, sys.MIPS64, 0},
{AMOVF, C_FREG, C_NONE, C_SAUTO, 28, 4, REGSP, 0, 0},
{AMOVD, C_FREG, C_NONE, C_SAUTO, 28, 4, REGSP, 0, 0},
{AMOVW, C_FREG, C_NONE, C_SOREG, 28, 4, REGZERO, sys.MIPS64, 0},
{AMOVF, C_FREG, C_NONE, C_SOREG, 28, 4, REGZERO, 0, 0},
{AMOVD, C_FREG, C_NONE, C_SOREG, 28, 4, REGZERO, 0, 0},
{AMOVW, C_FREG, C_NONE, C_LEXT, 28, 12, REGSB, sys.MIPS64, 0},
{AMOVF, C_FREG, C_NONE, C_LEXT, 28, 12, REGSB, sys.MIPS64, 0},
{AMOVD, C_FREG, C_NONE, C_LEXT, 28, 12, REGSB, sys.MIPS64, 0},
{AMOVW, C_FREG, C_NONE, C_LAUTO, 28, 12, REGSP, sys.MIPS64, 0},
{AMOVF, C_FREG, C_NONE, C_LAUTO, 28, 12, REGSP, 0, 0},
{AMOVD, C_FREG, C_NONE, C_LAUTO, 28, 12, REGSP, 0, 0},
{AMOVW, C_FREG, C_NONE, C_LOREG, 28, 12, REGZERO, sys.MIPS64, 0},
{AMOVF, C_FREG, C_NONE, C_LOREG, 28, 12, REGZERO, 0, 0},
{AMOVD, C_FREG, C_NONE, C_LOREG, 28, 12, REGZERO, 0, 0},
{AMOVF, C_FREG, C_NONE, C_ADDR, 50, 8, 0, sys.MIPS, 0},
{AMOVF, C_FREG, C_NONE, C_ADDR, 50, 12, 0, sys.MIPS64, 0},
{AMOVD, C_FREG, C_NONE, C_ADDR, 50, 8, 0, sys.MIPS, 0},
{AMOVD, C_FREG, C_NONE, C_ADDR, 50, 12, 0, sys.MIPS64, 0},
{AMOVW, C_REG, C_NONE, C_FREG, 30, 4, 0, 0, 0},
{AMOVW, C_FREG, C_NONE, C_REG, 31, 4, 0, 0, 0},
{AMOVV, C_REG, C_NONE, C_FREG, 47, 4, 0, sys.MIPS64, 0},
{AMOVV, C_FREG, C_NONE, C_REG, 48, 4, 0, sys.MIPS64, 0},
{AMOVW, C_ADDCON, C_NONE, C_FREG, 34, 8, 0, sys.MIPS64, 0},
{AMOVW, C_ANDCON, C_NONE, C_FREG, 34, 8, 0, sys.MIPS64, 0},
{AMOVW, C_REG, C_NONE, C_MREG, 37, 4, 0, 0, 0},
{AMOVV, C_REG, C_NONE, C_MREG, 37, 4, 0, sys.MIPS64, 0},
{AMOVW, C_MREG, C_NONE, C_REG, 38, 4, 0, 0, 0},
{AMOVV, C_MREG, C_NONE, C_REG, 38, 4, 0, sys.MIPS64, 0},
{AWORD, C_LCON, C_NONE, C_NONE, 40, 4, 0, 0, 0},
{AMOVW, C_REG, C_NONE, C_FCREG, 41, 4, 0, 0, 0},
{AMOVV, C_REG, C_NONE, C_FCREG, 41, 4, 0, sys.MIPS64, 0},
{AMOVW, C_FCREG, C_NONE, C_REG, 42, 4, 0, 0, 0},
{AMOVV, C_FCREG, C_NONE, C_REG, 42, 4, 0, sys.MIPS64, 0},
{ATEQ, C_SCON, C_REG, C_REG, 15, 4, 0, 0, 0},
{ATEQ, C_SCON, C_NONE, C_REG, 15, 4, 0, 0, 0},
{ACMOVT, C_REG, C_NONE, C_REG, 17, 4, 0, 0, 0},
cmd/asm: add MIPS MSA LD/ST/LDI support for mips64x This CL adding primitive asm support of MIPS MSA by introducing new sets of register W0-W31 (C_WREG) and 12 new instructions: * VMOV{B,H,W,D} ADDCONST, WREG (Vector load immediate) * VMOV{B,H,W,D} SOREG, WREG (Vector load) * VMOV{B,H,W,D} WREG, SOREG (Vector store) Ref: MIPS Architecture for Programmers Volume IV-j: The MIPS64 SIMD Architecture Module Change-Id: I3362c59a73c82c94769c18a19a0bee7e5029217d Reviewed-on: https://go-review.googlesource.com/c/go/+/215723 Run-TryBot: Meng Zhuo <mengzhuo1203@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2020-03-03 23:05:32 +08:00
{AVMOVB, C_SCON, C_NONE, C_WREG, 56, 4, 0, sys.MIPS64, 0},
{AVMOVB, C_ADDCON, C_NONE, C_WREG, 56, 4, 0, sys.MIPS64, 0},
{AVMOVB, C_SOREG, C_NONE, C_WREG, 57, 4, 0, sys.MIPS64, 0},
{AVMOVB, C_WREG, C_NONE, C_SOREG, 58, 4, 0, sys.MIPS64, 0},
cmd/internal/obj/mips: add a flag field to Optab The flag field will be used for marking unsafe points. This CL just adds the field, not doing anything with it. The next CL will make use of it. This is for making the diff simpler. Change-Id: I6ff5406ba2e53ae8a882184733d88482a2ca8e2a Reviewed-on: https://go-review.googlesource.com/c/go/+/203938 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Austin Clements <austin@google.com>
2019-10-28 14:41:49 -04:00
{ABREAK, C_REG, C_NONE, C_SEXT, 7, 4, REGSB, sys.MIPS64, 0}, /* really CACHE instruction */
{ABREAK, C_REG, C_NONE, C_SAUTO, 7, 4, REGSP, sys.MIPS64, 0},
{ABREAK, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO, sys.MIPS64, 0},
{ABREAK, C_NONE, C_NONE, C_NONE, 5, 4, 0, 0, 0},
{obj.AUNDEF, C_NONE, C_NONE, C_NONE, 49, 4, 0, 0, 0},
{obj.APCDATA, C_LCON, C_NONE, C_LCON, 0, 0, 0, 0, 0},
{obj.AFUNCDATA, C_SCON, C_NONE, C_ADDR, 0, 0, 0, 0, 0},
{obj.ANOP, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0, 0},
{obj.ADUFFZERO, C_NONE, C_NONE, C_LBRA, 11, 4, 0, 0, 0}, // same as AJMP
{obj.ADUFFCOPY, C_NONE, C_NONE, C_LBRA, 11, 4, 0, 0, 0}, // same as AJMP
{obj.AXXX, C_NONE, C_NONE, C_NONE, 0, 4, 0, 0, 0},
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj: more Optab range simplification Same idea as golang.org/cl/20322. Passes toolstash/buildall. Change-Id: Ida5960e57ff6e1e8de75c2720f21aeae56a8e415 Reviewed-on: https://go-review.googlesource.com/20352 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
2016-03-07 20:30:38 -08:00
var oprange [ALAST & obj.AMask][]Optab
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj: more Optab range simplification Same idea as golang.org/cl/20322. Passes toolstash/buildall. Change-Id: Ida5960e57ff6e1e8de75c2720f21aeae56a8e415 Reviewed-on: https://go-review.googlesource.com/20352 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
2016-03-07 20:30:38 -08:00
var xcmp [C_NCLASS][C_NCLASS]bool
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/compile: teach assemblers to accept a Prog allocator The existing bulk Prog allocator is not concurrency-safe. To allow for concurrency-safe bulk allocation of Progs, I want to move Prog allocation and caching upstream, to the clients of cmd/internal/obj. This is a preliminary enabling refactoring. After this CL, instead of calling Ctxt.NewProg throughout the assemblers, we thread through a newprog function that returns a new Prog. That function is set up to be Ctxt.NewProg, so there are no real changes in this CL; this CL only establishes the plumbing. Passes toolstash-check -all. Negligible compiler performance impact. Updates #15756 name old time/op new time/op delta Template 213ms ± 3% 214ms ± 4% ~ (p=0.574 n=49+47) Unicode 90.1ms ± 5% 89.9ms ± 4% ~ (p=0.417 n=50+49) GoTypes 585ms ± 4% 584ms ± 3% ~ (p=0.466 n=49+49) SSA 6.50s ± 3% 6.52s ± 2% ~ (p=0.251 n=49+49) Flate 128ms ± 4% 128ms ± 4% ~ (p=0.673 n=49+50) GoParser 152ms ± 3% 152ms ± 3% ~ (p=0.810 n=48+49) Reflect 372ms ± 4% 372ms ± 5% ~ (p=0.778 n=49+50) Tar 113ms ± 5% 111ms ± 4% -0.98% (p=0.016 n=50+49) XML 208ms ± 3% 208ms ± 2% ~ (p=0.483 n=47+49) [Geo mean] 285ms 285ms -0.17% name old user-ns/op new user-ns/op delta Template 253M ± 8% 254M ± 9% ~ (p=0.899 n=50+50) Unicode 106M ± 9% 106M ±11% ~ (p=0.642 n=50+50) GoTypes 736M ± 4% 740M ± 4% ~ (p=0.121 n=50+49) SSA 8.82G ± 3% 8.88G ± 2% +0.65% (p=0.006 n=49+48) Flate 147M ± 4% 147M ± 5% ~ (p=0.844 n=47+48) GoParser 179M ± 4% 178M ± 6% ~ (p=0.785 n=50+50) Reflect 443M ± 6% 441M ± 5% ~ (p=0.850 n=48+47) Tar 126M ± 5% 126M ± 5% ~ (p=0.734 n=50+50) XML 244M ± 5% 244M ± 5% ~ (p=0.594 n=49+50) [Geo mean] 341M 341M +0.11% Change-Id: Ice962f61eb3a524c2db00a166cb582c22caa7d68 Reviewed-on: https://go-review.googlesource.com/39633 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Keith Randall <khr@golang.org>
2017-04-04 14:31:55 -07:00
func span0(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) {
cmd/asm, cmd/compile, runtime: add -spectre=ret mode This commit extends the -spectre flag to cmd/asm and adds a new Spectre mitigation mode "ret", which enables the use of retpolines. Retpolines prevent speculation about the target of an indirect jump or call and are described in more detail here: https://support.google.com/faqs/answer/7625886 Change-Id: I4f2cb982fa94e44d91e49bd98974fd125619c93a Reviewed-on: https://go-review.googlesource.com/c/go/+/222661 Reviewed-by: Keith Randall <khr@golang.org>
2020-01-17 13:54:30 -05:00
if ctxt.Retpoline {
ctxt.Diag("-spectre=ret not supported on mips")
ctxt.Retpoline = false // don't keep printing
}
cmd/internal/obj: un-embed FuncInfo field in LSym Automated refactoring using github.com/mdempsky/unbed (to rewrite s.Foo to s.FuncInfo.Foo) and then gorename (to rename the FuncInfo field to just Func). Passes toolstash-check -all. Change-Id: I802c07a1239e0efea058a91a87c5efe12170083a Reviewed-on: https://go-review.googlesource.com/40670 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2017-04-18 10:18:34 -07:00
p := cursym.Func.Text
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
if p == nil || p.Link == nil { // handle external functions and ELF section symbols
return
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
c := ctxt0{ctxt: ctxt, newprog: newprog, cursym: cursym, autosize: int32(p.To.Offset + ctxt.FixedFrameSize())}
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj: more Optab range simplification Same idea as golang.org/cl/20322. Passes toolstash/buildall. Change-Id: Ida5960e57ff6e1e8de75c2720f21aeae56a8e415 Reviewed-on: https://go-review.googlesource.com/20352 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
2016-03-07 20:30:38 -08:00
if oprange[AOR&obj.AMask] == nil {
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
c.ctxt.Diag("mips ops not initialized, call mips.buildop first")
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj: rename some local variables not c I plan to use c as a consistent local variable in this packages. Rename most variables named c, excepting only some simple functions in asm9.go. Changes prepared with gorename. Passes toolstash-check -all. Updates #15756 Change-Id: If79baac43fca68fad1076e1ff23ae87c2ba638e4 Reviewed-on: https://go-review.googlesource.com/40172 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
2017-04-10 07:31:23 -07:00
pc := int64(0)
p.Pc = pc
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
var m int
var o *Optab
for p = p.Link; p != nil; p = p.Link {
cmd/internal/obj: rename some local variables not c I plan to use c as a consistent local variable in this packages. Rename most variables named c, excepting only some simple functions in asm9.go. Changes prepared with gorename. Passes toolstash-check -all. Updates #15756 Change-Id: If79baac43fca68fad1076e1ff23ae87c2ba638e4 Reviewed-on: https://go-review.googlesource.com/40172 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
2017-04-10 07:31:23 -07:00
p.Pc = pc
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o = c.oplook(p)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
m = int(o.size)
if m == 0 {
cmd/internal/obj: remove AUSEFIELD pseudo-op Instead, cmd/compile can directly emit R_USEFIELD relocations. Manually verified rsc.io/tmp/fieldtrack still passes. Change-Id: Ib1fb5ab902ff0ad17ef6a862a9a5692caf7f87d1 Reviewed-on: https://go-review.googlesource.com/37871 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2017-03-03 14:27:24 -08:00
if p.As != obj.ANOP && p.As != obj.AFUNCDATA && p.As != obj.APCDATA {
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
c.ctxt.Diag("zero-width instruction\n%v", p)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
continue
}
cmd/internal/obj: rename some local variables not c I plan to use c as a consistent local variable in this packages. Rename most variables named c, excepting only some simple functions in asm9.go. Changes prepared with gorename. Passes toolstash-check -all. Updates #15756 Change-Id: If79baac43fca68fad1076e1ff23ae87c2ba638e4 Reviewed-on: https://go-review.googlesource.com/40172 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
2017-04-10 07:31:23 -07:00
pc += int64(m)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
c.cursym.Size = pc
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
/*
* if any procedure is large enough to
* generate a large SBRA branch, then
* generate extra passes putting branches
* around jmps to fix. this is rare.
*/
bflag := 1
var otxt int64
var q *obj.Prog
for bflag != 0 {
bflag = 0
cmd/internal/obj: rename some local variables not c I plan to use c as a consistent local variable in this packages. Rename most variables named c, excepting only some simple functions in asm9.go. Changes prepared with gorename. Passes toolstash-check -all. Updates #15756 Change-Id: If79baac43fca68fad1076e1ff23ae87c2ba638e4 Reviewed-on: https://go-review.googlesource.com/40172 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
2017-04-10 07:31:23 -07:00
pc = 0
cmd/internal/obj: un-embed FuncInfo field in LSym Automated refactoring using github.com/mdempsky/unbed (to rewrite s.Foo to s.FuncInfo.Foo) and then gorename (to rename the FuncInfo field to just Func). Passes toolstash-check -all. Change-Id: I802c07a1239e0efea058a91a87c5efe12170083a Reviewed-on: https://go-review.googlesource.com/40670 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2017-04-18 10:18:34 -07:00
for p = c.cursym.Func.Text.Link; p != nil; p = p.Link {
cmd/internal/obj: rename some local variables not c I plan to use c as a consistent local variable in this packages. Rename most variables named c, excepting only some simple functions in asm9.go. Changes prepared with gorename. Passes toolstash-check -all. Updates #15756 Change-Id: If79baac43fca68fad1076e1ff23ae87c2ba638e4 Reviewed-on: https://go-review.googlesource.com/40172 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
2017-04-10 07:31:23 -07:00
p.Pc = pc
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o = c.oplook(p)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
// very large conditional branches
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
if o.type_ == 6 && p.Pcond != nil {
cmd/internal/obj: rename some local variables not c I plan to use c as a consistent local variable in this packages. Rename most variables named c, excepting only some simple functions in asm9.go. Changes prepared with gorename. Passes toolstash-check -all. Updates #15756 Change-Id: If79baac43fca68fad1076e1ff23ae87c2ba638e4 Reviewed-on: https://go-review.googlesource.com/40172 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
2017-04-10 07:31:23 -07:00
otxt = p.Pcond.Pc - pc
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
if otxt < -(1<<17)+10 || otxt >= (1<<17)-10 {
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
q = c.newprog()
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
q.Link = p.Link
p.Link = q
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
q.As = AJMP
[dev.inline] cmd/internal/obj: rename Prog.Lineno to Prog.Pos Change-Id: I7585d85907869f5a286b36936dfd035f1e8e9906 Reviewed-on: https://go-review.googlesource.com/34197 Run-TryBot: David Lazar <lazard@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Austin Clements <austin@google.com>
2016-12-09 14:30:40 -05:00
q.Pos = p.Pos
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
q.To.Type = obj.TYPE_BRANCH
q.Pcond = p.Pcond
p.Pcond = q
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
q = c.newprog()
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
q.Link = p.Link
p.Link = q
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
q.As = AJMP
[dev.inline] cmd/internal/obj: rename Prog.Lineno to Prog.Pos Change-Id: I7585d85907869f5a286b36936dfd035f1e8e9906 Reviewed-on: https://go-review.googlesource.com/34197 Run-TryBot: David Lazar <lazard@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Austin Clements <austin@google.com>
2016-12-09 14:30:40 -05:00
q.Pos = p.Pos
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
q.To.Type = obj.TYPE_BRANCH
q.Pcond = q.Link.Link
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
c.addnop(p.Link)
c.addnop(p)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
bflag = 1
}
}
m = int(o.size)
if m == 0 {
cmd/internal/obj: remove AUSEFIELD pseudo-op Instead, cmd/compile can directly emit R_USEFIELD relocations. Manually verified rsc.io/tmp/fieldtrack still passes. Change-Id: Ib1fb5ab902ff0ad17ef6a862a9a5692caf7f87d1 Reviewed-on: https://go-review.googlesource.com/37871 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2017-03-03 14:27:24 -08:00
if p.As != obj.ANOP && p.As != obj.AFUNCDATA && p.As != obj.APCDATA {
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
c.ctxt.Diag("zero-width instruction\n%v", p)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
continue
}
cmd/internal/obj: rename some local variables not c I plan to use c as a consistent local variable in this packages. Rename most variables named c, excepting only some simple functions in asm9.go. Changes prepared with gorename. Passes toolstash-check -all. Updates #15756 Change-Id: If79baac43fca68fad1076e1ff23ae87c2ba638e4 Reviewed-on: https://go-review.googlesource.com/40172 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
2017-04-10 07:31:23 -07:00
pc += int64(m)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
c.cursym.Size = pc
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
if c.ctxt.Arch.Family == sys.MIPS64 {
cmd/internal/obj: rename some local variables not c I plan to use c as a consistent local variable in this packages. Rename most variables named c, excepting only some simple functions in asm9.go. Changes prepared with gorename. Passes toolstash-check -all. Updates #15756 Change-Id: If79baac43fca68fad1076e1ff23ae87c2ba638e4 Reviewed-on: https://go-review.googlesource.com/40172 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
2017-04-10 07:31:23 -07:00
pc += -pc & (mips64FuncAlign - 1)
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
c.cursym.Size = pc
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
/*
* lay out the code, emitting code and data relocations.
*/
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
c.cursym.Grow(c.cursym.Size)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
bp := c.cursym.P
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
var i int32
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
var out [4]uint32
cmd/internal/obj: un-embed FuncInfo field in LSym Automated refactoring using github.com/mdempsky/unbed (to rewrite s.Foo to s.FuncInfo.Foo) and then gorename (to rename the FuncInfo field to just Func). Passes toolstash-check -all. Change-Id: I802c07a1239e0efea058a91a87c5efe12170083a Reviewed-on: https://go-review.googlesource.com/40670 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2017-04-18 10:18:34 -07:00
for p := c.cursym.Func.Text.Link; p != nil; p = p.Link {
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
c.pc = p.Pc
o = c.oplook(p)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
if int(o.size) > 4*len(out) {
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
log.Fatalf("out array in span0 is too small, need at least %d for %v", o.size/4, p)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
c.asmout(p, o, out[:])
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
for i = 0; i < int32(o.size/4); i++ {
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
c.ctxt.Arch.ByteOrder.PutUint32(bp, out[i])
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
bp = bp[4:]
}
}
cmd/internal/obj/mips: mark unsafe points For async preemption, we will be using REGTMP as a temporary register in injected call on MIPS, which will clobber it. So any code that uses REGTMP is not safe for async preemption. In the assembler backend, we expand a Prog to multiple machine instructions and use REGTMP as a temporary register if necessary. These need to be marked unsafe. In fact, most of the multi-instruction Progs use REGTMP, so we mark all of them, except ones that are whitelisted. Change-Id: Ic00ae5589683c2c9525abdaee076d884df6b0d1e Reviewed-on: https://go-review.googlesource.com/c/go/+/203718 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Keith Randall <khr@golang.org>
2019-10-26 22:49:13 -04:00
// Mark nonpreemptible instruction sequences.
// We use REGTMP as a scratch register during call injection,
// so instruction sequences that use REGTMP are unsafe to
// preempt asynchronously.
cmd/internal/obj, runtime: preempt & restart some instruction sequences On some architectures, for async preemption the injected call needs to clobber a register (usually REGTMP) in order to return to the preempted function. As a consequence, the PC ranges where REGTMP is live are not preemptible. The uses of REGTMP are usually generated by the assembler, where it needs to load or materialize a large constant or offset that doesn't fit into the instruction. In those cases, REGTMP is not live at the start of the instruction sequence. Instead of giving up preemption in those cases, we could preempt it and restart the sequence when resuming the execution. Basically, this is like reissuing an interrupted instruction, except that here the "instruction" is a Prog that consists of multiple machine instructions. For this to work, we need to generate PC data to mark the start of the Prog. Currently this is only done for ARM64. TODO: the split-stack function prologue is currently not async preemptible. We could use this mechanism, preempt it and restart at the function entry. Change-Id: I37cb282f8e606e7ab6f67b3edfdc6063097b4bd1 Reviewed-on: https://go-review.googlesource.com/c/go/+/208126 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Austin Clements <austin@google.com>
2019-11-20 17:10:34 -05:00
obj.MarkUnsafePoints(c.ctxt, c.cursym.Func.Text, c.newprog, c.isUnsafePoint, nil)
cmd/internal/obj/mips: mark unsafe points For async preemption, we will be using REGTMP as a temporary register in injected call on MIPS, which will clobber it. So any code that uses REGTMP is not safe for async preemption. In the assembler backend, we expand a Prog to multiple machine instructions and use REGTMP as a temporary register if necessary. These need to be marked unsafe. In fact, most of the multi-instruction Progs use REGTMP, so we mark all of them, except ones that are whitelisted. Change-Id: Ic00ae5589683c2c9525abdaee076d884df6b0d1e Reviewed-on: https://go-review.googlesource.com/c/go/+/203718 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Keith Randall <khr@golang.org>
2019-10-26 22:49:13 -04:00
}
// Return whether p is an unsafe point.
func (c *ctxt0) isUnsafePoint(p *obj.Prog) bool {
if p.From.Reg == REGTMP || p.To.Reg == REGTMP || p.Reg == REGTMP {
return true
}
// Most of the multi-instruction sequence uses REGTMP, except
// ones marked safe.
o := c.oplook(p)
return o.size > 4 && o.flag&NOTUSETMP == 0
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
func isint32(v int64) bool {
return int64(int32(v)) == v
}
func isuint32(v uint64) bool {
return uint64(uint32(v)) == v
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
func (c *ctxt0) aclass(a *obj.Addr) int {
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
switch a.Type {
case obj.TYPE_NONE:
return C_NONE
case obj.TYPE_REG:
if REG_R0 <= a.Reg && a.Reg <= REG_R31 {
return C_REG
}
if REG_F0 <= a.Reg && a.Reg <= REG_F31 {
return C_FREG
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
if REG_M0 <= a.Reg && a.Reg <= REG_M31 {
return C_MREG
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
if REG_FCR0 <= a.Reg && a.Reg <= REG_FCR31 {
return C_FCREG
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/asm: add MIPS MSA LD/ST/LDI support for mips64x This CL adding primitive asm support of MIPS MSA by introducing new sets of register W0-W31 (C_WREG) and 12 new instructions: * VMOV{B,H,W,D} ADDCONST, WREG (Vector load immediate) * VMOV{B,H,W,D} SOREG, WREG (Vector load) * VMOV{B,H,W,D} WREG, SOREG (Vector store) Ref: MIPS Architecture for Programmers Volume IV-j: The MIPS64 SIMD Architecture Module Change-Id: I3362c59a73c82c94769c18a19a0bee7e5029217d Reviewed-on: https://go-review.googlesource.com/c/go/+/215723 Run-TryBot: Meng Zhuo <mengzhuo1203@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2020-03-03 23:05:32 +08:00
if REG_W0 <= a.Reg && a.Reg <= REG_W31 {
return C_WREG
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
if a.Reg == REG_LO {
return C_LO
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
if a.Reg == REG_HI {
return C_HI
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
return C_GOK
case obj.TYPE_MEM:
switch a.Name {
case obj.NAME_EXTERN,
obj.NAME_STATIC:
if a.Sym == nil {
break
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
c.instoffset = a.Offset
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
if a.Sym != nil { // use relocation
cmd/internal/objabi: extract shared functionality from obj Now only cmd/asm and cmd/compile depend on cmd/internal/obj. Changing the assembler backends no longer requires reinstalling cmd/link or cmd/addr2line. There's also now one canonical definition of the object file format in cmd/internal/objabi/doc.go, with a warning to update all three implementations. objabi is still something of a grab bag of unrelated code (e.g., flag and environment variable handling probably belong in a separate "tool" package), but this is still progress. Fixes #15165. Fixes #20026. Change-Id: Ic4b92fac7d0d35438e0d20c9579aad4085c5534c Reviewed-on: https://go-review.googlesource.com/40972 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2017-04-18 12:53:25 -07:00
if a.Sym.Type == objabi.STLSBSS {
cmd/internal/obj/mips, cmd/link: add support TLS relocation for mips64x a new relocation R_ADDRMIPSTLS is added, which resolves to 16-bit offset of a TLS address on mips64x. Change-Id: Ic60d0e1ba49ff1c433cead242f5884677ab227a5 Reviewed-on: https://go-review.googlesource.com/19804 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:14 -04:00
return C_TLS
}
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
return C_ADDR
}
return C_LEXT
case obj.NAME_AUTO:
cmd/compile: set/unset base register for better assembly print For address of an auto or arg, on all non-x86 architectures the assembler backend encodes the actual SP offset in the instruction but leaves the offset in Prog unchanged. When the assembly is printed in compile -S, it shows an offset relative to pseudo FP/SP with an actual hardware SP base register (e.g. R13 on ARM). This is confusing. Unset the base register if it is indeed SP, so the assembly output is consistent. If the base register isn't SP, it should be an error and the error output contains the actual base register. For address loading instructions, the base register isn't set in the compiler on non-x86 architectures. Set it. Normally it is SP and will be unset in the change mentioned above for printing. If it is not, it will be an error and the error output contains the actual base register. No change in generated binary, only printed assembly. Passes "go build -a -toolexec 'toolstash -cmp' std cmd" on all architectures. Fixes #21064. Change-Id: Ifafe8d5f9b437efbe824b63b3cbc2f5f6cdc1fd5 Reviewed-on: https://go-review.googlesource.com/49432 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: David Chase <drchase@google.com>
2017-07-18 08:35:00 -04:00
if a.Reg == REGSP {
// unset base register for better printing, since
// a.Offset is still relative to pseudo-SP.
a.Reg = obj.REG_NONE
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
c.instoffset = int64(c.autosize) + a.Offset
if c.instoffset >= -BIG && c.instoffset < BIG {
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
return C_SAUTO
}
return C_LAUTO
case obj.NAME_PARAM:
cmd/compile: set/unset base register for better assembly print For address of an auto or arg, on all non-x86 architectures the assembler backend encodes the actual SP offset in the instruction but leaves the offset in Prog unchanged. When the assembly is printed in compile -S, it shows an offset relative to pseudo FP/SP with an actual hardware SP base register (e.g. R13 on ARM). This is confusing. Unset the base register if it is indeed SP, so the assembly output is consistent. If the base register isn't SP, it should be an error and the error output contains the actual base register. For address loading instructions, the base register isn't set in the compiler on non-x86 architectures. Set it. Normally it is SP and will be unset in the change mentioned above for printing. If it is not, it will be an error and the error output contains the actual base register. No change in generated binary, only printed assembly. Passes "go build -a -toolexec 'toolstash -cmp' std cmd" on all architectures. Fixes #21064. Change-Id: Ifafe8d5f9b437efbe824b63b3cbc2f5f6cdc1fd5 Reviewed-on: https://go-review.googlesource.com/49432 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: David Chase <drchase@google.com>
2017-07-18 08:35:00 -04:00
if a.Reg == REGSP {
// unset base register for better printing, since
// a.Offset is still relative to pseudo-FP.
a.Reg = obj.REG_NONE
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
c.instoffset = int64(c.autosize) + a.Offset + c.ctxt.FixedFrameSize()
if c.instoffset >= -BIG && c.instoffset < BIG {
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
return C_SAUTO
}
return C_LAUTO
case obj.NAME_NONE:
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
c.instoffset = a.Offset
if c.instoffset == 0 {
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
return C_ZOREG
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
if c.instoffset >= -BIG && c.instoffset < BIG {
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
return C_SOREG
}
return C_LOREG
}
return C_GOK
case obj.TYPE_TEXTSIZE:
return C_TEXTSIZE
case obj.TYPE_CONST,
obj.TYPE_ADDR:
switch a.Name {
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case obj.NAME_NONE:
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
c.instoffset = a.Offset
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
if a.Reg != 0 {
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
if -BIG <= c.instoffset && c.instoffset <= BIG {
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
return C_SACON
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
if isint32(c.instoffset) {
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
return C_LACON
}
return C_DACON
}
case obj.NAME_EXTERN,
obj.NAME_STATIC:
s := a.Sym
if s == nil {
cmd: remove some unnecessary gotos Pick the low-hanging fruit, which are the gotos that don't go very far and labels that aren't used often. All of them have easy replacements with breaks and returns. One slightly tricky rewrite is defaultlitreuse. We cannot use a defer func to reset lineno, because one of its return paths does not reset lineno, and thus broke toolstash -cmp. Passes toolstash -cmp on std cmd. Change-Id: Id1c0967868d69bb073addc7c5c3017ca91ff966f Reviewed-on: https://go-review.googlesource.com/110063 Run-TryBot: Daniel Martí <mvdan@mvdan.cc> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Matthew Dempsky <mdempsky@google.com>
2018-04-29 22:17:23 +09:00
return C_GOK
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
c.instoffset = a.Offset
cmd/internal/objabi: extract shared functionality from obj Now only cmd/asm and cmd/compile depend on cmd/internal/obj. Changing the assembler backends no longer requires reinstalling cmd/link or cmd/addr2line. There's also now one canonical definition of the object file format in cmd/internal/objabi/doc.go, with a warning to update all three implementations. objabi is still something of a grab bag of unrelated code (e.g., flag and environment variable handling probably belong in a separate "tool" package), but this is still progress. Fixes #15165. Fixes #20026. Change-Id: Ic4b92fac7d0d35438e0d20c9579aad4085c5534c Reviewed-on: https://go-review.googlesource.com/40972 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2017-04-18 12:53:25 -07:00
if s.Type == objabi.STLSBSS {
cmd/internal/obj/mips, cmd/link: add support TLS relocation for mips64x a new relocation R_ADDRMIPSTLS is added, which resolves to 16-bit offset of a TLS address on mips64x. Change-Id: Ic60d0e1ba49ff1c433cead242f5884677ab227a5 Reviewed-on: https://go-review.googlesource.com/19804 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:14 -04:00
return C_STCON // address of TLS variable
}
cmd/internal/obj/mips et al.: introduce SB register on mips64x SB register (R28) is introduced for access external addresses with shorter instruction sequences. It is loaded at entry points. External data within 2G of SB can be accessed this way. cmd/internal/obj: relocaltion R_ADDRMIPS is split into two relocations R_ADDRMIPS and R_ADDRMIPSU, handling the low 16 bits and the "upper" 16 bits of external addresses, respectively, since the instructios may not be adjacent. It might be better if relocation Variant could be used. cmd/link/internal/mips64: support new relocations. cmd/compile/internal/mips64: reserve SB register. runtime: initialize SB register at entry points. Change-Id: I5f34868f88c5a9698c042a8a1f12f76806c187b9 Reviewed-on: https://go-review.googlesource.com/19802 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:02 -04:00
return C_LECON
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
case obj.NAME_AUTO:
cmd/compile: set/unset base register for better assembly print For address of an auto or arg, on all non-x86 architectures the assembler backend encodes the actual SP offset in the instruction but leaves the offset in Prog unchanged. When the assembly is printed in compile -S, it shows an offset relative to pseudo FP/SP with an actual hardware SP base register (e.g. R13 on ARM). This is confusing. Unset the base register if it is indeed SP, so the assembly output is consistent. If the base register isn't SP, it should be an error and the error output contains the actual base register. For address loading instructions, the base register isn't set in the compiler on non-x86 architectures. Set it. Normally it is SP and will be unset in the change mentioned above for printing. If it is not, it will be an error and the error output contains the actual base register. No change in generated binary, only printed assembly. Passes "go build -a -toolexec 'toolstash -cmp' std cmd" on all architectures. Fixes #21064. Change-Id: Ifafe8d5f9b437efbe824b63b3cbc2f5f6cdc1fd5 Reviewed-on: https://go-review.googlesource.com/49432 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: David Chase <drchase@google.com>
2017-07-18 08:35:00 -04:00
if a.Reg == REGSP {
// unset base register for better printing, since
// a.Offset is still relative to pseudo-SP.
a.Reg = obj.REG_NONE
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
c.instoffset = int64(c.autosize) + a.Offset
if c.instoffset >= -BIG && c.instoffset < BIG {
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
return C_SACON
}
return C_LACON
case obj.NAME_PARAM:
cmd/compile: set/unset base register for better assembly print For address of an auto or arg, on all non-x86 architectures the assembler backend encodes the actual SP offset in the instruction but leaves the offset in Prog unchanged. When the assembly is printed in compile -S, it shows an offset relative to pseudo FP/SP with an actual hardware SP base register (e.g. R13 on ARM). This is confusing. Unset the base register if it is indeed SP, so the assembly output is consistent. If the base register isn't SP, it should be an error and the error output contains the actual base register. For address loading instructions, the base register isn't set in the compiler on non-x86 architectures. Set it. Normally it is SP and will be unset in the change mentioned above for printing. If it is not, it will be an error and the error output contains the actual base register. No change in generated binary, only printed assembly. Passes "go build -a -toolexec 'toolstash -cmp' std cmd" on all architectures. Fixes #21064. Change-Id: Ifafe8d5f9b437efbe824b63b3cbc2f5f6cdc1fd5 Reviewed-on: https://go-review.googlesource.com/49432 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: David Chase <drchase@google.com>
2017-07-18 08:35:00 -04:00
if a.Reg == REGSP {
// unset base register for better printing, since
// a.Offset is still relative to pseudo-FP.
a.Reg = obj.REG_NONE
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
c.instoffset = int64(c.autosize) + a.Offset + c.ctxt.FixedFrameSize()
if c.instoffset >= -BIG && c.instoffset < BIG {
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
return C_SACON
}
return C_LACON
cmd: remove some unnecessary gotos Pick the low-hanging fruit, which are the gotos that don't go very far and labels that aren't used often. All of them have easy replacements with breaks and returns. One slightly tricky rewrite is defaultlitreuse. We cannot use a defer func to reset lineno, because one of its return paths does not reset lineno, and thus broke toolstash -cmp. Passes toolstash -cmp on std cmd. Change-Id: Id1c0967868d69bb073addc7c5c3017ca91ff966f Reviewed-on: https://go-review.googlesource.com/110063 Run-TryBot: Daniel Martí <mvdan@mvdan.cc> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Matthew Dempsky <mdempsky@google.com>
2018-04-29 22:17:23 +09:00
default:
return C_GOK
}
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
if c.instoffset >= 0 {
if c.instoffset == 0 {
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
return C_ZCON
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
if c.instoffset <= 0x7fff {
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
return C_SCON
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
if c.instoffset <= 0xffff {
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
return C_ANDCON
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
if c.instoffset&0xffff == 0 && isuint32(uint64(c.instoffset)) { /* && (instoffset & (1<<31)) == 0) */
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
return C_UCON
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
if isint32(c.instoffset) || isuint32(uint64(c.instoffset)) {
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
return C_LCON
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return C_LCON // C_DCON
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
if c.instoffset >= -0x8000 {
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
return C_ADDCON
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
if c.instoffset&0xffff == 0 && isint32(c.instoffset) {
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
return C_UCON
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
if isint32(c.instoffset) {
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
return C_LCON
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return C_LCON // C_DCON
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
case obj.TYPE_BRANCH:
return C_SBRA
}
return C_GOK
}
func prasm(p *obj.Prog) {
fmt.Printf("%v\n", p)
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
func (c *ctxt0) oplook(p *obj.Prog) *Optab {
cmd/internal/obj: more Optab range simplification Same idea as golang.org/cl/20322. Passes toolstash/buildall. Change-Id: Ida5960e57ff6e1e8de75c2720f21aeae56a8e415 Reviewed-on: https://go-review.googlesource.com/20352 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
2016-03-07 20:30:38 -08:00
if oprange[AOR&obj.AMask] == nil {
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
c.ctxt.Diag("mips ops not initialized, call mips.buildop first")
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
}
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
a1 := int(p.Optab)
if a1 != 0 {
cmd: replace x[i:][0] expressions with x[i] Passes toolstash -cmp. Change-Id: Id504e71ed1f23900e24a9aed25143c94f4d7d50c Reviewed-on: https://go-review.googlesource.com/21899 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-04-12 12:16:20 -07:00
return &optab[a1-1]
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
a1 = int(p.From.Class)
if a1 == 0 {
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
a1 = c.aclass(&p.From) + 1
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
p.From.Class = int8(a1)
}
a1--
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
a3 := int(p.To.Class)
if a3 == 0 {
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
a3 = c.aclass(&p.To) + 1
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
p.To.Class = int8(a3)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
a3--
a2 := C_NONE
if p.Reg != 0 {
a2 = C_REG
}
cmd/internal/obj: more Optab range simplification Same idea as golang.org/cl/20322. Passes toolstash/buildall. Change-Id: Ida5960e57ff6e1e8de75c2720f21aeae56a8e415 Reviewed-on: https://go-review.googlesource.com/20352 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
2016-03-07 20:30:38 -08:00
ops := oprange[p.As&obj.AMask]
c1 := &xcmp[a1]
c3 := &xcmp[a3]
for i := range ops {
op := &ops[i]
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
if int(op.a2) == a2 && c1[op.a1] && c3[op.a3] && (op.family == 0 || c.ctxt.Arch.Family == op.family) {
cmd/internal/obj: more Optab range simplification Same idea as golang.org/cl/20322. Passes toolstash/buildall. Change-Id: Ida5960e57ff6e1e8de75c2720f21aeae56a8e415 Reviewed-on: https://go-review.googlesource.com/20352 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
2016-03-07 20:30:38 -08:00
p.Optab = uint16(cap(optab) - cap(ops) + i + 1)
return op
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
c.ctxt.Diag("illegal combination %v %v %v %v", p.As, DRconv(a1), DRconv(a2), DRconv(a3))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
prasm(p)
cmd/internal/obj/mips: support NEG, avoid crash with illegal instruction Add support of NEG{V,W} pseudo-instructions, which are translated to a SUB instruction from R0 with proper width. Also turn illegal instruction to UNDEF, to avoid crashing in asmout when it tries to read the operands. Fixes #23548. Change-Id: I047b27559ccd9594c3dcf62ab039b636098f30a3 Reviewed-on: https://go-review.googlesource.com/89896 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: David Chase <drchase@google.com>
2018-01-25 11:46:06 -05:00
// Turn illegal instruction into an UNDEF, avoid crashing in asmout.
cmd/internal/obj/mips: add a flag field to Optab The flag field will be used for marking unsafe points. This CL just adds the field, not doing anything with it. The next CL will make use of it. This is for making the diff simpler. Change-Id: I6ff5406ba2e53ae8a882184733d88482a2ca8e2a Reviewed-on: https://go-review.googlesource.com/c/go/+/203938 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Austin Clements <austin@google.com>
2019-10-28 14:41:49 -04:00
return &Optab{obj.AUNDEF, C_NONE, C_NONE, C_NONE, 49, 4, 0, 0, 0}
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
func cmp(a int, b int) bool {
if a == b {
return true
}
switch a {
case C_LCON:
if b == C_ZCON || b == C_SCON || b == C_UCON || b == C_ADDCON || b == C_ANDCON {
return true
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case C_ADD0CON:
if b == C_ADDCON {
return true
}
fallthrough
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
case C_ADDCON:
if b == C_ZCON || b == C_SCON {
return true
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case C_AND0CON:
if b == C_ANDCON {
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
return true
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
fallthrough
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case C_ANDCON:
if b == C_ZCON || b == C_SCON {
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
return true
}
case C_UCON:
if b == C_ZCON {
return true
}
case C_SCON:
if b == C_ZCON {
return true
}
case C_LACON:
if b == C_SACON {
return true
}
case C_LBRA:
if b == C_SBRA {
return true
}
case C_LEXT:
if b == C_SEXT {
return true
}
case C_LAUTO:
if b == C_SAUTO {
return true
}
case C_REG:
if b == C_ZCON {
return r0iszero != 0 /*TypeKind(100016)*/
}
case C_LOREG:
if b == C_ZOREG || b == C_SOREG {
return true
}
case C_SOREG:
if b == C_ZOREG {
return true
}
}
return false
}
type ocmp []Optab
func (x ocmp) Len() int {
return len(x)
}
func (x ocmp) Swap(i, j int) {
x[i], x[j] = x[j], x[i]
}
func (x ocmp) Less(i, j int) bool {
p1 := &x[i]
p2 := &x[j]
n := int(p1.as) - int(p2.as)
if n != 0 {
return n < 0
}
n = int(p1.a1) - int(p2.a1)
if n != 0 {
return n < 0
}
n = int(p1.a2) - int(p2.a2)
if n != 0 {
return n < 0
}
n = int(p1.a3) - int(p2.a3)
if n != 0 {
return n < 0
}
return false
}
cmd/internal/obj/mips et al.: introduce SB register on mips64x SB register (R28) is introduced for access external addresses with shorter instruction sequences. It is loaded at entry points. External data within 2G of SB can be accessed this way. cmd/internal/obj: relocaltion R_ADDRMIPS is split into two relocations R_ADDRMIPS and R_ADDRMIPSU, handling the low 16 bits and the "upper" 16 bits of external addresses, respectively, since the instructios may not be adjacent. It might be better if relocation Variant could be used. cmd/link/internal/mips64: support new relocations. cmd/compile/internal/mips64: reserve SB register. runtime: initialize SB register at entry points. Change-Id: I5f34868f88c5a9698c042a8a1f12f76806c187b9 Reviewed-on: https://go-review.googlesource.com/19802 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:02 -04:00
cmd/internal/obj: add As type for assembly opcodes Passes toolstash/buildall. Fixes #14692. Change-Id: I4352678d8251309f2b8b7793674c550fac948006 Reviewed-on: https://go-review.googlesource.com/20350 Reviewed-by: Dave Cheney <dave@cheney.net> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
2016-03-07 18:00:08 -08:00
func opset(a, b0 obj.As) {
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
oprange[a&obj.AMask] = oprange[b0]
}
func buildop(ctxt *obj.Link) {
cmd/internal/obj: eagerly initialize assemblers CL 38662 changed the x86 assembler to be eagerly initialized, for a concurrent backend. This CL puts in place a proper mechanism for doing so, and switches all architectures to use it. Passes toolstash-check -all. Updates #15756 Change-Id: Id2aa527d3a8259c95797d63a2f0d1123e3ca2a1c Reviewed-on: https://go-review.googlesource.com/39917 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
2017-04-06 13:42:31 -07:00
if oprange[AOR&obj.AMask] != nil {
// Already initialized; stop now.
// This happens in the cmd/asm tests,
// each of which re-initializes the arch.
return
}
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
var n int
for i := 0; i < C_NCLASS; i++ {
for n = 0; n < C_NCLASS; n++ {
if cmp(n, i) {
cmd/internal/obj: more Optab range simplification Same idea as golang.org/cl/20322. Passes toolstash/buildall. Change-Id: Ida5960e57ff6e1e8de75c2720f21aeae56a8e415 Reviewed-on: https://go-review.googlesource.com/20352 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
2016-03-07 20:30:38 -08:00
xcmp[i][n] = true
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
}
}
for n = 0; optab[n].as != obj.AXXX; n++ {
}
sort.Sort(ocmp(optab[:n]))
for i := 0; i < n; i++ {
r := optab[i].as
r0 := r & obj.AMask
cmd/internal/obj: more Optab range simplification Same idea as golang.org/cl/20322. Passes toolstash/buildall. Change-Id: Ida5960e57ff6e1e8de75c2720f21aeae56a8e415 Reviewed-on: https://go-review.googlesource.com/20352 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
2016-03-07 20:30:38 -08:00
start := i
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
for optab[i].as == r {
i++
}
cmd/internal/obj: more Optab range simplification Same idea as golang.org/cl/20322. Passes toolstash/buildall. Change-Id: Ida5960e57ff6e1e8de75c2720f21aeae56a8e415 Reviewed-on: https://go-review.googlesource.com/20352 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
2016-03-07 20:30:38 -08:00
oprange[r0] = optab[start:i]
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
i--
switch r {
default:
cmd/internal/obj: convert Aconv to a stringer Now that assembler opcodes have their own type, they can have a true stringer, rather than explicit calls to Aconv, which makes for nicer format strings. Change-Id: Ic77f5f8ac38b4e519dcaa08c93e7b732226f7bfe Reviewed-on: https://go-review.googlesource.com/25045 Run-TryBot: Michael Pratt <mpratt@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2016-07-18 21:59:14 -07:00
ctxt.Diag("unknown op in build: %v", r)
cmd/compile: abort earlier if stack frame too large If the stack frame is too large, abort immediately. We used to generate code first, then abort. In issue 22200, generating code raised a panic so we got an ICE instead of an error message. Change the max frame size to 1GB (from 2GB). Stack frames between 1.1GB and 2GB didn't used to work anyway, the pcln table generation would have failed and generated an ICE. Fixes #22200 Change-Id: I1d918ab27ba6ebf5c87ec65d1bccf973f8c8541e Reviewed-on: https://go-review.googlesource.com/69810 Run-TryBot: Keith Randall <khr@golang.org> Reviewed-by: Ian Lance Taylor <iant@golang.org>
2017-10-10 17:43:41 -07:00
ctxt.DiagFlush()
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
log.Fatalf("bad code")
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case AABSF:
opset(AMOVFD, r0)
opset(AMOVDF, r0)
opset(AMOVWF, r0)
opset(AMOVFW, r0)
opset(AMOVWD, r0)
opset(AMOVDW, r0)
opset(ANEGF, r0)
opset(ANEGD, r0)
opset(AABSD, r0)
opset(ATRUNCDW, r0)
opset(ATRUNCFW, r0)
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
opset(ASQRTF, r0)
opset(ASQRTD, r0)
case AMOVVF:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
opset(AMOVVD, r0)
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
opset(AMOVFV, r0)
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
opset(AMOVDV, r0)
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
opset(ATRUNCDV, r0)
opset(ATRUNCFV, r0)
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case AADD:
opset(ASGT, r0)
opset(ASGTU, r0)
opset(AADDU, r0)
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
case AADDV:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
opset(AADDVU, r0)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case AADDF:
opset(ADIVF, r0)
opset(ADIVD, r0)
opset(AMULF, r0)
opset(AMULD, r0)
opset(ASUBF, r0)
opset(ASUBD, r0)
opset(AADDD, r0)
case AAND:
opset(AOR, r0)
opset(AXOR, r0)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
case ABEQ:
opset(ABNE, r0)
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case ABLEZ:
opset(ABGEZ, r0)
opset(ABGEZAL, r0)
opset(ABLTZ, r0)
opset(ABLTZAL, r0)
opset(ABGTZ, r0)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case AMOVB:
opset(AMOVH, r0)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case AMOVBU:
opset(AMOVHU, r0)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case AMUL:
opset(AREM, r0)
opset(AREMU, r0)
opset(ADIVU, r0)
opset(AMULU, r0)
opset(ADIV, r0)
cmd/internal/obj/mips: add MADD/MSUB This CL implements MADD&MSUB, which are mips32r2 instructions. Change-Id: I06fe51573569baf3b71536336b34b95ccd24750b Reviewed-on: https://go-review.googlesource.com/c/go/+/167680 Run-TryBot: Ben Shi <powerman1st@163.com> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2019-03-15 08:26:53 +00:00
opset(AMADD, r0)
opset(AMSUB, r0)
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
case AMULV:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
opset(ADIVV, r0)
opset(ADIVVU, r0)
opset(AMULVU, r0)
opset(AREMV, r0)
opset(AREMVU, r0)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case ASLL:
opset(ASRL, r0)
opset(ASRA, r0)
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
case ASLLV:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
opset(ASRAV, r0)
opset(ASRLV, r0)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case ASUB:
opset(ASUBU, r0)
opset(ANOR, r0)
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
case ASUBV:
opset(ASUBVU, r0)
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case ASYSCALL:
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
opset(ASYNC, r0)
cmd/internal/obj/mips: add support of LLV, SCV, NOOP instructions LLV and SCV are 64-bit load-linked and store-conditional. They were used in runtime as #define WORD. Change them to normal instruction form. NOOP is hardware no-op. It was written as WORD $0. Make a name for it for better disassembly output. Fixes #12561. Fixes #18238. Change-Id: I82c667ce756fa83ef37b034b641e8c4366335e83 Reviewed-on: https://go-review.googlesource.com/40297 Reviewed-by: Minux Ma <minux@golang.org> Run-TryBot: Minux Ma <minux@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2017-04-11 10:39:55 -04:00
opset(ANOOP, r0)
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
opset(ATLBP, r0)
opset(ATLBR, r0)
opset(ATLBWI, r0)
opset(ATLBWR, r0)
case ACMPEQF:
opset(ACMPGTF, r0)
opset(ACMPGTD, r0)
opset(ACMPGEF, r0)
opset(ACMPGED, r0)
opset(ACMPEQD, r0)
case ABFPT:
opset(ABFPF, r0)
case AMOVWL:
opset(AMOVWR, r0)
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
case AMOVVL:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
opset(AMOVVR, r0)
cmd/asm: add MIPS MSA LD/ST/LDI support for mips64x This CL adding primitive asm support of MIPS MSA by introducing new sets of register W0-W31 (C_WREG) and 12 new instructions: * VMOV{B,H,W,D} ADDCONST, WREG (Vector load immediate) * VMOV{B,H,W,D} SOREG, WREG (Vector load) * VMOV{B,H,W,D} WREG, SOREG (Vector store) Ref: MIPS Architecture for Programmers Volume IV-j: The MIPS64 SIMD Architecture Module Change-Id: I3362c59a73c82c94769c18a19a0bee7e5029217d Reviewed-on: https://go-review.googlesource.com/c/go/+/215723 Run-TryBot: Meng Zhuo <mengzhuo1203@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2020-03-03 23:05:32 +08:00
case AVMOVB:
opset(AVMOVH, r0)
opset(AVMOVW, r0)
opset(AVMOVD, r0)
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case AMOVW,
AMOVD,
AMOVF,
AMOVV,
ABREAK,
ARFE,
AJAL,
AJMP,
AMOVWU,
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
ALL,
cmd/internal/obj/mips: add support of LLV, SCV, NOOP instructions LLV and SCV are 64-bit load-linked and store-conditional. They were used in runtime as #define WORD. Change them to normal instruction form. NOOP is hardware no-op. It was written as WORD $0. Make a name for it for better disassembly output. Fixes #12561. Fixes #18238. Change-Id: I82c667ce756fa83ef37b034b641e8c4366335e83 Reviewed-on: https://go-review.googlesource.com/40297 Reviewed-by: Minux Ma <minux@golang.org> Run-TryBot: Minux Ma <minux@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2017-04-11 10:39:55 -04:00
ALLV,
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
ASC,
cmd/internal/obj/mips: add support of LLV, SCV, NOOP instructions LLV and SCV are 64-bit load-linked and store-conditional. They were used in runtime as #define WORD. Change them to normal instruction form. NOOP is hardware no-op. It was written as WORD $0. Make a name for it for better disassembly output. Fixes #12561. Fixes #18238. Change-Id: I82c667ce756fa83ef37b034b641e8c4366335e83 Reviewed-on: https://go-review.googlesource.com/40297 Reviewed-by: Minux Ma <minux@golang.org> Run-TryBot: Minux Ma <minux@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2017-04-11 10:39:55 -04:00
ASCV,
cmd/internal/obj/mips: support NEG, avoid crash with illegal instruction Add support of NEG{V,W} pseudo-instructions, which are translated to a SUB instruction from R0 with proper width. Also turn illegal instruction to UNDEF, to avoid crashing in asmout when it tries to read the operands. Fixes #23548. Change-Id: I047b27559ccd9594c3dcf62ab039b636098f30a3 Reviewed-on: https://go-review.googlesource.com/89896 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: David Chase <drchase@google.com>
2018-01-25 11:46:06 -05:00
ANEGW,
ANEGV,
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
AWORD,
obj.ANOP,
obj.ATEXT,
obj.AUNDEF,
obj.AFUNCDATA,
obj.APCDATA,
obj.ADUFFZERO,
obj.ADUFFCOPY:
break
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
case ACMOVN:
opset(ACMOVZ, r0)
case ACMOVT:
opset(ACMOVF, r0)
case ACLO:
opset(ACLZ, r0)
case ATEQ:
opset(ATNE, r0)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
}
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
func OP(x uint32, y uint32) uint32 {
return x<<3 | y<<0
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
func SP(x uint32, y uint32) uint32 {
return x<<29 | y<<26
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
func BCOND(x uint32, y uint32) uint32 {
return x<<19 | y<<16
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
func MMU(x uint32, y uint32) uint32 {
return SP(2, 0) | 16<<21 | x<<3 | y<<0
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
func FPF(x uint32, y uint32) uint32 {
return SP(2, 1) | 16<<21 | x<<3 | y<<0
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
func FPD(x uint32, y uint32) uint32 {
return SP(2, 1) | 17<<21 | x<<3 | y<<0
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
func FPW(x uint32, y uint32) uint32 {
return SP(2, 1) | 20<<21 | x<<3 | y<<0
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
func FPV(x uint32, y uint32) uint32 {
return SP(2, 1) | 21<<21 | x<<3 | y<<0
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
func OP_RRR(op uint32, r1 uint32, r2 uint32, r3 uint32) uint32 {
return op | (r1&31)<<16 | (r2&31)<<21 | (r3&31)<<11
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
func OP_IRR(op uint32, i uint32, r2 uint32, r3 uint32) uint32 {
return op | i&0xFFFF | (r2&31)<<21 | (r3&31)<<16
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
func OP_SRR(op uint32, s uint32, r2 uint32, r3 uint32) uint32 {
return op | (s&31)<<6 | (r2&31)<<16 | (r3&31)<<11
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
func OP_FRRR(op uint32, r1 uint32, r2 uint32, r3 uint32) uint32 {
return op | (r1&31)<<16 | (r2&31)<<11 | (r3&31)<<6
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
func OP_JMP(op uint32, i uint32) uint32 {
return op | i&0x3FFFFFF
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/asm: add MIPS MSA LD/ST/LDI support for mips64x This CL adding primitive asm support of MIPS MSA by introducing new sets of register W0-W31 (C_WREG) and 12 new instructions: * VMOV{B,H,W,D} ADDCONST, WREG (Vector load immediate) * VMOV{B,H,W,D} SOREG, WREG (Vector load) * VMOV{B,H,W,D} WREG, SOREG (Vector store) Ref: MIPS Architecture for Programmers Volume IV-j: The MIPS64 SIMD Architecture Module Change-Id: I3362c59a73c82c94769c18a19a0bee7e5029217d Reviewed-on: https://go-review.googlesource.com/c/go/+/215723 Run-TryBot: Meng Zhuo <mengzhuo1203@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2020-03-03 23:05:32 +08:00
func OP_VI10(op uint32, df uint32, s10 int32, wd uint32, minor uint32) uint32 {
return 0x1e<<26 | (op&7)<<23 | (df&3)<<21 | uint32(s10&0x3FF)<<11 | (wd&31)<<6 | minor&0x3F
}
func OP_VMI10(s10 int32, rs uint32, wd uint32, minor uint32, df uint32) uint32 {
return 0x1e<<26 | uint32(s10&0x3FF)<<16 | (rs&31)<<11 | (wd&31)<<6 | (minor&15)<<2 | df&3
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) {
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
o1 := uint32(0)
o2 := uint32(0)
o3 := uint32(0)
o4 := uint32(0)
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
add := AADDU
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
if c.ctxt.Arch.Family == sys.MIPS64 {
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
add = AADDVU
}
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
switch o.type_ {
default:
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
c.ctxt.Diag("unknown type %d %v", o.type_)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
prasm(p)
case 0: /* pseudo ops */
break
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 1: /* mov r1,r2 ==> OR r1,r0,r2 */
cmd/internal/obj/mips et al.: introduce SB register on mips64x SB register (R28) is introduced for access external addresses with shorter instruction sequences. It is loaded at entry points. External data within 2G of SB can be accessed this way. cmd/internal/obj: relocaltion R_ADDRMIPS is split into two relocations R_ADDRMIPS and R_ADDRMIPSU, handling the low 16 bits and the "upper" 16 bits of external addresses, respectively, since the instructios may not be adjacent. It might be better if relocation Variant could be used. cmd/link/internal/mips64: support new relocations. cmd/compile/internal/mips64: reserve SB register. runtime: initialize SB register at entry points. Change-Id: I5f34868f88c5a9698c042a8a1f12f76806c187b9 Reviewed-on: https://go-review.googlesource.com/19802 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:02 -04:00
a := AOR
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
if p.As == AMOVW && c.ctxt.Arch.Family == sys.MIPS64 {
cmd/compile: fix mips64 instruction UNPREDICTABLE bug Replace addu with a sll instruction with a definite behavior (sll will discard the upper 32 bits of the 64 bits, then do sign extensions, with certain behavior). It won't have any UNPREDICTABLE expectation. Fixes #30459 Change-Id: Id79085c28c5cc4f86939b4ef08ef4bff46077c45 GitHub-Last-Rev: 03569796a9a64ed6c7d56a5bca966fc62c89b4ff GitHub-Pull-Request: golang/go#30461 Reviewed-on: https://go-review.googlesource.com/c/go/+/164758 Reviewed-by: Cherry Zhang <cherryyz@google.com> Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org>
2019-03-05 01:24:35 +00:00
// on MIPS64, most of the 32-bit instructions have unpredictable behavior,
// but SLL is special that the result is always sign-extended to 64-bit.
a = ASLL
cmd/internal/obj/mips et al.: introduce SB register on mips64x SB register (R28) is introduced for access external addresses with shorter instruction sequences. It is loaded at entry points. External data within 2G of SB can be accessed this way. cmd/internal/obj: relocaltion R_ADDRMIPS is split into two relocations R_ADDRMIPS and R_ADDRMIPSU, handling the low 16 bits and the "upper" 16 bits of external addresses, respectively, since the instructios may not be adjacent. It might be better if relocation Variant could be used. cmd/link/internal/mips64: support new relocations. cmd/compile/internal/mips64: reserve SB register. runtime: initialize SB register at entry points. Change-Id: I5f34868f88c5a9698c042a8a1f12f76806c187b9 Reviewed-on: https://go-review.googlesource.com/19802 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:02 -04:00
}
cmd/compile: fix mips64 instruction UNPREDICTABLE bug Replace addu with a sll instruction with a definite behavior (sll will discard the upper 32 bits of the 64 bits, then do sign extensions, with certain behavior). It won't have any UNPREDICTABLE expectation. Fixes #30459 Change-Id: Id79085c28c5cc4f86939b4ef08ef4bff46077c45 GitHub-Last-Rev: 03569796a9a64ed6c7d56a5bca966fc62c89b4ff GitHub-Pull-Request: golang/go#30461 Reviewed-on: https://go-review.googlesource.com/c/go/+/164758 Reviewed-by: Cherry Zhang <cherryyz@google.com> Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org>
2019-03-05 01:24:35 +00:00
o1 = OP_RRR(c.oprrr(a), uint32(p.From.Reg), uint32(REGZERO), uint32(p.To.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 2: /* add/sub r1,[r2],r3 */
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
r := int(p.Reg)
cmd/internal/obj/mips: support NEG, avoid crash with illegal instruction Add support of NEG{V,W} pseudo-instructions, which are translated to a SUB instruction from R0 with proper width. Also turn illegal instruction to UNDEF, to avoid crashing in asmout when it tries to read the operands. Fixes #23548. Change-Id: I047b27559ccd9594c3dcf62ab039b636098f30a3 Reviewed-on: https://go-review.googlesource.com/89896 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: David Chase <drchase@google.com>
2018-01-25 11:46:06 -05:00
if p.As == ANEGW || p.As == ANEGV {
r = REGZERO
}
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
if r == 0 {
r = int(p.To.Reg)
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = OP_RRR(c.oprrr(p.As), uint32(p.From.Reg), uint32(r), uint32(p.To.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 3: /* mov $soreg, r ==> or/add $i,o,r */
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
v := c.regoff(&p.From)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
r := int(p.From.Reg)
if r == 0 {
r = int(o.param)
}
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
a := add
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
if o.a1 == C_ANDCON {
a = AOR
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = OP_IRR(c.opirr(a), uint32(v), uint32(r), uint32(p.To.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 4: /* add $scon,[r1],r2 */
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
v := c.regoff(&p.From)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
r := int(p.Reg)
if r == 0 {
r = int(p.To.Reg)
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = OP_IRR(c.opirr(p.As), uint32(v), uint32(r), uint32(p.To.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
case 5: /* syscall */
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = c.oprrr(p.As)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 6: /* beq r1,[r2],sbra */
v := int32(0)
if p.Pcond == nil {
v = int32(-4) >> 2
} else {
v = int32(p.Pcond.Pc-p.Pc-4) >> 2
}
if (v<<16)>>16 != v {
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
c.ctxt.Diag("short branch too far\n%v", p)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = OP_IRR(c.opirr(p.As), uint32(v), uint32(p.From.Reg), uint32(p.Reg))
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
// for ABFPT and ABFPF only: always fill delay slot with 0
// see comments in func preprocess for details.
o2 = 0
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 7: /* mov r, soreg ==> sw o(r) */
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
r := int(p.To.Reg)
if r == 0 {
r = int(o.param)
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
v := c.regoff(&p.To)
o1 = OP_IRR(c.opirr(p.As), uint32(v), uint32(r), uint32(p.From.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 8: /* mov soreg, r ==> lw o(r) */
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
r := int(p.From.Reg)
if r == 0 {
r = int(o.param)
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
v := c.regoff(&p.From)
o1 = OP_IRR(c.opirr(-p.As), uint32(v), uint32(r), uint32(p.To.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 9: /* sll r1,[r2],r3 */
r := int(p.Reg)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
if r == 0 {
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
r = int(p.To.Reg)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = OP_RRR(c.oprrr(p.As), uint32(r), uint32(p.From.Reg), uint32(p.To.Reg))
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 10: /* add $con,[r1],r2 ==> mov $con, t; add t,[r1],r2 */
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
v := c.regoff(&p.From)
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
a := AOR
if v < 0 {
a = AADDU
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = OP_IRR(c.opirr(a), uint32(v), uint32(0), uint32(REGTMP))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
r := int(p.Reg)
if r == 0 {
r = int(p.To.Reg)
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o2 = OP_RRR(c.oprrr(p.As), uint32(REGTMP), uint32(r), uint32(p.To.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 11: /* jmp lbra */
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
v := int32(0)
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
if c.aclass(&p.To) == C_SBRA && p.To.Sym == nil && p.As == AJMP {
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
// use PC-relative branch for short branches
// BEQ R0, R0, sbra
if p.Pcond == nil {
v = int32(-4) >> 2
} else {
v = int32(p.Pcond.Pc-p.Pc-4) >> 2
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
if (v<<16)>>16 == v {
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = OP_IRR(c.opirr(ABEQ), uint32(v), uint32(REGZERO), uint32(REGZERO))
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
break
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
if p.Pcond == nil {
v = int32(p.Pc) >> 2
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
} else {
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
v = int32(p.Pcond.Pc) >> 2
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = OP_JMP(c.opirr(p.As), uint32(v))
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
if p.To.Sym == nil {
cmd/internal/obj: un-embed FuncInfo field in LSym Automated refactoring using github.com/mdempsky/unbed (to rewrite s.Foo to s.FuncInfo.Foo) and then gorename (to rename the FuncInfo field to just Func). Passes toolstash-check -all. Change-Id: I802c07a1239e0efea058a91a87c5efe12170083a Reviewed-on: https://go-review.googlesource.com/40670 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2017-04-18 10:18:34 -07:00
p.To.Sym = c.cursym.Func.Text.From.Sym
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
p.To.Offset = p.Pcond.Pc
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
rel := obj.Addrel(c.cursym)
rel.Off = int32(c.pc)
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
rel.Siz = 4
rel.Sym = p.To.Sym
rel.Add = p.To.Offset
if p.As == AJAL {
cmd/internal/objabi: extract shared functionality from obj Now only cmd/asm and cmd/compile depend on cmd/internal/obj. Changing the assembler backends no longer requires reinstalling cmd/link or cmd/addr2line. There's also now one canonical definition of the object file format in cmd/internal/objabi/doc.go, with a warning to update all three implementations. objabi is still something of a grab bag of unrelated code (e.g., flag and environment variable handling probably belong in a separate "tool" package), but this is still progress. Fixes #15165. Fixes #20026. Change-Id: Ic4b92fac7d0d35438e0d20c9579aad4085c5534c Reviewed-on: https://go-review.googlesource.com/40972 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2017-04-18 12:53:25 -07:00
rel.Type = objabi.R_CALLMIPS
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
} else {
cmd/internal/objabi: extract shared functionality from obj Now only cmd/asm and cmd/compile depend on cmd/internal/obj. Changing the assembler backends no longer requires reinstalling cmd/link or cmd/addr2line. There's also now one canonical definition of the object file format in cmd/internal/objabi/doc.go, with a warning to update all three implementations. objabi is still something of a grab bag of unrelated code (e.g., flag and environment variable handling probably belong in a separate "tool" package), but this is still progress. Fixes #15165. Fixes #20026. Change-Id: Ic4b92fac7d0d35438e0d20c9579aad4085c5534c Reviewed-on: https://go-review.googlesource.com/40972 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2017-04-18 12:53:25 -07:00
rel.Type = objabi.R_JMPMIPS
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 12: /* movbs r,r */
cmd/internal/obj/mips: mark unsafe points For async preemption, we will be using REGTMP as a temporary register in injected call on MIPS, which will clobber it. So any code that uses REGTMP is not safe for async preemption. In the assembler backend, we expand a Prog to multiple machine instructions and use REGTMP as a temporary register if necessary. These need to be marked unsafe. In fact, most of the multi-instruction Progs use REGTMP, so we mark all of them, except ones that are whitelisted. Change-Id: Ic00ae5589683c2c9525abdaee076d884df6b0d1e Reviewed-on: https://go-review.googlesource.com/c/go/+/203718 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Keith Randall <khr@golang.org>
2019-10-26 22:49:13 -04:00
// NOTE: this case does not use REGTMP. If it ever does,
// remove the NOTUSETMP flag in optab.
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
v := 16
if p.As == AMOVB {
v = 24
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = OP_SRR(c.opirr(ASLL), uint32(v), uint32(p.From.Reg), uint32(p.To.Reg))
o2 = OP_SRR(c.opirr(ASRA), uint32(v), uint32(p.To.Reg), uint32(p.To.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 13: /* movbu r,r */
if p.As == AMOVBU {
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = OP_IRR(c.opirr(AAND), uint32(0xff), uint32(p.From.Reg), uint32(p.To.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
} else {
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = OP_IRR(c.opirr(AAND), uint32(0xffff), uint32(p.From.Reg), uint32(p.To.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 14: /* movwu r,r */
cmd/internal/obj/mips: mark unsafe points For async preemption, we will be using REGTMP as a temporary register in injected call on MIPS, which will clobber it. So any code that uses REGTMP is not safe for async preemption. In the assembler backend, we expand a Prog to multiple machine instructions and use REGTMP as a temporary register if necessary. These need to be marked unsafe. In fact, most of the multi-instruction Progs use REGTMP, so we mark all of them, except ones that are whitelisted. Change-Id: Ic00ae5589683c2c9525abdaee076d884df6b0d1e Reviewed-on: https://go-review.googlesource.com/c/go/+/203718 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Keith Randall <khr@golang.org>
2019-10-26 22:49:13 -04:00
// NOTE: this case does not use REGTMP. If it ever does,
// remove the NOTUSETMP flag in optab.
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = OP_SRR(c.opirr(-ASLLV), uint32(0), uint32(p.From.Reg), uint32(p.To.Reg))
o2 = OP_SRR(c.opirr(-ASRLV), uint32(0), uint32(p.To.Reg), uint32(p.To.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
case 15: /* teq $c r,r */
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
v := c.regoff(&p.From)
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
r := int(p.Reg)
if r == 0 {
r = REGZERO
}
/* only use 10 bits of trap code */
cmd/internal/obj/mips: use r instead of p.Reg in call to OP_IRR Change-Id: Id77764ed2d693e632e2a7b4e4638c17e0caf2276 GitHub-Last-Rev: 9ebe28252086ddcd530905eb9cf50b4a66413291 GitHub-Pull-Request: golang/go#30003 Reviewed-on: https://go-review.googlesource.com/c/160427 Reviewed-by: Cherry Zhang <cherryyz@google.com> Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org>
2019-03-03 16:42:08 +00:00
o1 = OP_IRR(c.opirr(p.As), (uint32(v)&0x3FF)<<6, uint32(r), uint32(p.To.Reg))
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 16: /* sll $c,[r1],r2 */
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
v := c.regoff(&p.From)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
r := int(p.Reg)
if r == 0 {
r = int(p.To.Reg)
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
/* OP_SRR will use only the low 5 bits of the shift value */
if v >= 32 && vshift(p.As) {
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = OP_SRR(c.opirr(-p.As), uint32(v-32), uint32(r), uint32(p.To.Reg))
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
} else {
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = OP_SRR(c.opirr(p.As), uint32(v), uint32(r), uint32(p.To.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
case 17:
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = OP_RRR(c.oprrr(p.As), uint32(REGZERO), uint32(p.From.Reg), uint32(p.To.Reg))
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 18: /* jmp [r1],0(r2) */
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
r := int(p.Reg)
if r == 0 {
r = int(o.param)
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = OP_RRR(c.oprrr(p.As), uint32(0), uint32(p.To.Reg), uint32(r))
cmd/internal/obj/mips: don't emit spurious CALLIND relocations Generate a CALLIND relocation only for indirect calls, not for indirect jumps. In particular, the RET instruction is lowered to JMP (LR), an indirect jump, and occurs frequently. The large amount of spurious relocations causes the linker to do a lot of extra work. Change-Id: Ie0edc04609788f5a687fd00c22558c3f83867697 Reviewed-on: https://go-review.googlesource.com/c/go/+/227079 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Than McIntosh <thanm@google.com> Reviewed-by: David Chase <drchase@google.com>
2020-04-02 22:12:38 -04:00
if p.As == obj.ACALL {
rel := obj.Addrel(c.cursym)
rel.Off = int32(c.pc)
rel.Siz = 0
rel.Type = objabi.R_CALLIND
}
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 19: /* mov $lcon,r ==> lu+or */
cmd/internal/obj/mips: mark unsafe points For async preemption, we will be using REGTMP as a temporary register in injected call on MIPS, which will clobber it. So any code that uses REGTMP is not safe for async preemption. In the assembler backend, we expand a Prog to multiple machine instructions and use REGTMP as a temporary register if necessary. These need to be marked unsafe. In fact, most of the multi-instruction Progs use REGTMP, so we mark all of them, except ones that are whitelisted. Change-Id: Ic00ae5589683c2c9525abdaee076d884df6b0d1e Reviewed-on: https://go-review.googlesource.com/c/go/+/203718 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Keith Randall <khr@golang.org>
2019-10-26 22:49:13 -04:00
// NOTE: this case does not use REGTMP. If it ever does,
// remove the NOTUSETMP flag in optab.
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
v := c.regoff(&p.From)
o1 = OP_IRR(c.opirr(ALUI), uint32(v>>16), uint32(REGZERO), uint32(p.To.Reg))
o2 = OP_IRR(c.opirr(AOR), uint32(v), uint32(p.To.Reg), uint32(p.To.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 20: /* mov lo/hi,r */
a := OP(2, 0) /* mfhi */
if p.From.Reg == REG_LO {
a = OP(2, 2) /* mflo */
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
o1 = OP_RRR(a, uint32(REGZERO), uint32(REGZERO), uint32(p.To.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 21: /* mov r,lo/hi */
a := OP(2, 1) /* mthi */
if p.To.Reg == REG_LO {
a = OP(2, 3) /* mtlo */
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
o1 = OP_RRR(a, uint32(REGZERO), uint32(p.From.Reg), uint32(REGZERO))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
case 22: /* mul r1,r2 [r3]*/
if p.To.Reg != 0 {
r := int(p.Reg)
if r == 0 {
r = int(p.To.Reg)
}
a := SP(3, 4) | 2 /* mul */
o1 = OP_RRR(a, uint32(p.From.Reg), uint32(r), uint32(p.To.Reg))
} else {
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = OP_RRR(c.oprrr(p.As), uint32(p.From.Reg), uint32(p.Reg), uint32(REGZERO))
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
}
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 23: /* add $lcon,r1,r2 ==> lu+or+add */
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
v := c.regoff(&p.From)
o1 = OP_IRR(c.opirr(ALUI), uint32(v>>16), uint32(REGZERO), uint32(REGTMP))
o2 = OP_IRR(c.opirr(AOR), uint32(v), uint32(REGTMP), uint32(REGTMP))
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
r := int(p.Reg)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
if r == 0 {
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
r = int(p.To.Reg)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o3 = OP_RRR(c.oprrr(p.As), uint32(REGTMP), uint32(r), uint32(p.To.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 24: /* mov $ucon,r ==> lu r */
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
v := c.regoff(&p.From)
o1 = OP_IRR(c.opirr(ALUI), uint32(v>>16), uint32(REGZERO), uint32(p.To.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 25: /* add/and $ucon,[r1],r2 ==> lu $con,t; add t,[r1],r2 */
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
v := c.regoff(&p.From)
o1 = OP_IRR(c.opirr(ALUI), uint32(v>>16), uint32(REGZERO), uint32(REGTMP))
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
r := int(p.Reg)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
if r == 0 {
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
r = int(p.To.Reg)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o2 = OP_RRR(c.oprrr(p.As), uint32(REGTMP), uint32(r), uint32(p.To.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 26: /* mov $lsext/auto/oreg,r ==> lu+or+add */
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
v := c.regoff(&p.From)
o1 = OP_IRR(c.opirr(ALUI), uint32(v>>16), uint32(REGZERO), uint32(REGTMP))
o2 = OP_IRR(c.opirr(AOR), uint32(v), uint32(REGTMP), uint32(REGTMP))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
r := int(p.From.Reg)
if r == 0 {
r = int(o.param)
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o3 = OP_RRR(c.oprrr(add), uint32(REGTMP), uint32(r), uint32(p.To.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 27: /* mov [sl]ext/auto/oreg,fr ==> lwc1 o(r) */
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
v := c.regoff(&p.From)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
r := int(p.From.Reg)
if r == 0 {
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
r = int(o.param)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
a := -AMOVF
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
if p.As == AMOVD {
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
a = -AMOVD
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
switch o.size {
cmd/internal/obj/mips et al.: introduce SB register on mips64x SB register (R28) is introduced for access external addresses with shorter instruction sequences. It is loaded at entry points. External data within 2G of SB can be accessed this way. cmd/internal/obj: relocaltion R_ADDRMIPS is split into two relocations R_ADDRMIPS and R_ADDRMIPSU, handling the low 16 bits and the "upper" 16 bits of external addresses, respectively, since the instructios may not be adjacent. It might be better if relocation Variant could be used. cmd/link/internal/mips64: support new relocations. cmd/compile/internal/mips64: reserve SB register. runtime: initialize SB register at entry points. Change-Id: I5f34868f88c5a9698c042a8a1f12f76806c187b9 Reviewed-on: https://go-review.googlesource.com/19802 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:02 -04:00
case 12:
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = OP_IRR(c.opirr(ALUI), uint32((v+1<<15)>>16), uint32(REGZERO), uint32(REGTMP))
o2 = OP_RRR(c.oprrr(add), uint32(r), uint32(REGTMP), uint32(REGTMP))
o3 = OP_IRR(c.opirr(a), uint32(v), uint32(REGTMP), uint32(p.To.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 4:
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = OP_IRR(c.opirr(a), uint32(v), uint32(r), uint32(p.To.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 28: /* mov fr,[sl]ext/auto/oreg ==> swc1 o(r) */
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
v := c.regoff(&p.To)
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
r := int(p.To.Reg)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
if r == 0 {
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
r = int(o.param)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
a := AMOVF
if p.As == AMOVD {
a = AMOVD
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
switch o.size {
cmd/internal/obj/mips et al.: introduce SB register on mips64x SB register (R28) is introduced for access external addresses with shorter instruction sequences. It is loaded at entry points. External data within 2G of SB can be accessed this way. cmd/internal/obj: relocaltion R_ADDRMIPS is split into two relocations R_ADDRMIPS and R_ADDRMIPSU, handling the low 16 bits and the "upper" 16 bits of external addresses, respectively, since the instructios may not be adjacent. It might be better if relocation Variant could be used. cmd/link/internal/mips64: support new relocations. cmd/compile/internal/mips64: reserve SB register. runtime: initialize SB register at entry points. Change-Id: I5f34868f88c5a9698c042a8a1f12f76806c187b9 Reviewed-on: https://go-review.googlesource.com/19802 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:02 -04:00
case 12:
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = OP_IRR(c.opirr(ALUI), uint32((v+1<<15)>>16), uint32(REGZERO), uint32(REGTMP))
o2 = OP_RRR(c.oprrr(add), uint32(r), uint32(REGTMP), uint32(REGTMP))
o3 = OP_IRR(c.opirr(a), uint32(v), uint32(REGTMP), uint32(p.From.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 4:
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = OP_IRR(c.opirr(a), uint32(v), uint32(r), uint32(p.From.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 30: /* movw r,fr */
a := SP(2, 1) | (4 << 21) /* mtc1 */
o1 = OP_RRR(a, uint32(p.From.Reg), uint32(0), uint32(p.To.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 31: /* movw fr,r */
a := SP(2, 1) | (0 << 21) /* mtc1 */
o1 = OP_RRR(a, uint32(p.To.Reg), uint32(0), uint32(p.From.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 32: /* fadd fr1,[fr2],fr3 */
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
r := int(p.Reg)
if r == 0 {
r = int(p.To.Reg)
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = OP_FRRR(c.oprrr(p.As), uint32(p.From.Reg), uint32(r), uint32(p.To.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 33: /* fabs fr1, fr3 */
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = OP_FRRR(c.oprrr(p.As), uint32(0), uint32(p.From.Reg), uint32(p.To.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 34: /* mov $con,fr ==> or/add $i,t; mov t,fr */
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
v := c.regoff(&p.From)
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
a := AADDU
if o.a1 == C_ANDCON {
a = AOR
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = OP_IRR(c.opirr(a), uint32(v), uint32(0), uint32(REGTMP))
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
o2 = OP_RRR(SP(2, 1)|(4<<21), uint32(REGTMP), uint32(0), uint32(p.To.Reg)) /* mtc1 */
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips et al.: introduce SB register on mips64x SB register (R28) is introduced for access external addresses with shorter instruction sequences. It is loaded at entry points. External data within 2G of SB can be accessed this way. cmd/internal/obj: relocaltion R_ADDRMIPS is split into two relocations R_ADDRMIPS and R_ADDRMIPSU, handling the low 16 bits and the "upper" 16 bits of external addresses, respectively, since the instructios may not be adjacent. It might be better if relocation Variant could be used. cmd/link/internal/mips64: support new relocations. cmd/compile/internal/mips64: reserve SB register. runtime: initialize SB register at entry points. Change-Id: I5f34868f88c5a9698c042a8a1f12f76806c187b9 Reviewed-on: https://go-review.googlesource.com/19802 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:02 -04:00
case 35: /* mov r,lext/auto/oreg ==> sw o(REGTMP) */
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
v := c.regoff(&p.To)
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
r := int(p.To.Reg)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
if r == 0 {
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
r = int(o.param)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = OP_IRR(c.opirr(ALUI), uint32((v+1<<15)>>16), uint32(REGZERO), uint32(REGTMP))
o2 = OP_RRR(c.oprrr(add), uint32(r), uint32(REGTMP), uint32(REGTMP))
o3 = OP_IRR(c.opirr(p.As), uint32(v), uint32(REGTMP), uint32(p.From.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips et al.: introduce SB register on mips64x SB register (R28) is introduced for access external addresses with shorter instruction sequences. It is loaded at entry points. External data within 2G of SB can be accessed this way. cmd/internal/obj: relocaltion R_ADDRMIPS is split into two relocations R_ADDRMIPS and R_ADDRMIPSU, handling the low 16 bits and the "upper" 16 bits of external addresses, respectively, since the instructios may not be adjacent. It might be better if relocation Variant could be used. cmd/link/internal/mips64: support new relocations. cmd/compile/internal/mips64: reserve SB register. runtime: initialize SB register at entry points. Change-Id: I5f34868f88c5a9698c042a8a1f12f76806c187b9 Reviewed-on: https://go-review.googlesource.com/19802 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:02 -04:00
case 36: /* mov lext/auto/oreg,r ==> lw o(REGTMP) */
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
v := c.regoff(&p.From)
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
r := int(p.From.Reg)
if r == 0 {
r = int(o.param)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = OP_IRR(c.opirr(ALUI), uint32((v+1<<15)>>16), uint32(REGZERO), uint32(REGTMP))
o2 = OP_RRR(c.oprrr(add), uint32(r), uint32(REGTMP), uint32(REGTMP))
o3 = OP_IRR(c.opirr(-p.As), uint32(v), uint32(REGTMP), uint32(p.To.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 37: /* movw r,mr */
a := SP(2, 0) | (4 << 21) /* mtc0 */
if p.As == AMOVV {
a = SP(2, 0) | (5 << 21) /* dmtc0 */
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
o1 = OP_RRR(a, uint32(p.From.Reg), uint32(0), uint32(p.To.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 38: /* movw mr,r */
a := SP(2, 0) | (0 << 21) /* mfc0 */
if p.As == AMOVV {
a = SP(2, 0) | (1 << 21) /* dmfc0 */
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
o1 = OP_RRR(a, uint32(p.To.Reg), uint32(0), uint32(p.From.Reg))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 40: /* word */
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = uint32(c.regoff(&p.From))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 41: /* movw f,fcr */
cmd/internal/obj/mips: fix encoding of FCR registers The asm encoder generally assumes that the lowest 5 bits of the REG_XX constants match the machine instruction encoding, i.e. the lowest 5 bits is the register number. This was not true for FCR registers and M registers. Make it so. MOV Rx, FCRy was encoded as two machine instructions. The first is unnecessary. Remove. Change-Id: Ib988e6b109ba8f564337cdd31019c1a6f1881f5b Reviewed-on: https://go-review.googlesource.com/c/go/+/203717 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Austin Clements <austin@google.com>
2019-10-26 22:48:15 -04:00
o1 = OP_RRR(SP(2, 1)|(6<<21), uint32(p.From.Reg), uint32(0), uint32(p.To.Reg)) /* mtcc1 */
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case 42: /* movw fcr,r */
o1 = OP_RRR(SP(2, 1)|(2<<21), uint32(p.To.Reg), uint32(0), uint32(p.From.Reg)) /* mfcc1 */
case 47: /* movv r,fr */
a := SP(2, 1) | (5 << 21) /* dmtc1 */
o1 = OP_RRR(a, uint32(p.From.Reg), uint32(0), uint32(p.To.Reg))
case 48: /* movv fr,r */
a := SP(2, 1) | (1 << 21) /* dmtc1 */
o1 = OP_RRR(a, uint32(p.To.Reg), uint32(0), uint32(p.From.Reg))
case 49: /* undef */
cmd/internal/obj/mips et al.: introduce SB register on mips64x SB register (R28) is introduced for access external addresses with shorter instruction sequences. It is loaded at entry points. External data within 2G of SB can be accessed this way. cmd/internal/obj: relocaltion R_ADDRMIPS is split into two relocations R_ADDRMIPS and R_ADDRMIPSU, handling the low 16 bits and the "upper" 16 bits of external addresses, respectively, since the instructios may not be adjacent. It might be better if relocation Variant could be used. cmd/link/internal/mips64: support new relocations. cmd/compile/internal/mips64: reserve SB register. runtime: initialize SB register at entry points. Change-Id: I5f34868f88c5a9698c042a8a1f12f76806c187b9 Reviewed-on: https://go-review.googlesource.com/19802 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:02 -04:00
o1 = 52 /* trap -- teq r0, r0 */
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
/* relocation operations */
cmd/internal/obj/mips et al.: introduce SB register on mips64x SB register (R28) is introduced for access external addresses with shorter instruction sequences. It is loaded at entry points. External data within 2G of SB can be accessed this way. cmd/internal/obj: relocaltion R_ADDRMIPS is split into two relocations R_ADDRMIPS and R_ADDRMIPSU, handling the low 16 bits and the "upper" 16 bits of external addresses, respectively, since the instructios may not be adjacent. It might be better if relocation Variant could be used. cmd/link/internal/mips64: support new relocations. cmd/compile/internal/mips64: reserve SB register. runtime: initialize SB register at entry points. Change-Id: I5f34868f88c5a9698c042a8a1f12f76806c187b9 Reviewed-on: https://go-review.googlesource.com/19802 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:02 -04:00
case 50: /* mov r,addr ==> lu + add REGSB, REGTMP + sw o(REGTMP) */
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = OP_IRR(c.opirr(ALUI), uint32(0), uint32(REGZERO), uint32(REGTMP))
rel := obj.Addrel(c.cursym)
rel.Off = int32(c.pc)
cmd/internal/obj/mips et al.: introduce SB register on mips64x SB register (R28) is introduced for access external addresses with shorter instruction sequences. It is loaded at entry points. External data within 2G of SB can be accessed this way. cmd/internal/obj: relocaltion R_ADDRMIPS is split into two relocations R_ADDRMIPS and R_ADDRMIPSU, handling the low 16 bits and the "upper" 16 bits of external addresses, respectively, since the instructios may not be adjacent. It might be better if relocation Variant could be used. cmd/link/internal/mips64: support new relocations. cmd/compile/internal/mips64: reserve SB register. runtime: initialize SB register at entry points. Change-Id: I5f34868f88c5a9698c042a8a1f12f76806c187b9 Reviewed-on: https://go-review.googlesource.com/19802 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:02 -04:00
rel.Siz = 4
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
rel.Sym = p.To.Sym
rel.Add = p.To.Offset
cmd/internal/objabi: extract shared functionality from obj Now only cmd/asm and cmd/compile depend on cmd/internal/obj. Changing the assembler backends no longer requires reinstalling cmd/link or cmd/addr2line. There's also now one canonical definition of the object file format in cmd/internal/objabi/doc.go, with a warning to update all three implementations. objabi is still something of a grab bag of unrelated code (e.g., flag and environment variable handling probably belong in a separate "tool" package), but this is still progress. Fixes #15165. Fixes #20026. Change-Id: Ic4b92fac7d0d35438e0d20c9579aad4085c5534c Reviewed-on: https://go-review.googlesource.com/40972 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2017-04-18 12:53:25 -07:00
rel.Type = objabi.R_ADDRMIPSU
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o2 = OP_IRR(c.opirr(p.As), uint32(0), uint32(REGTMP), uint32(p.From.Reg))
rel2 := obj.Addrel(c.cursym)
rel2.Off = int32(c.pc + 4)
cmd/internal/obj/mips et al.: introduce SB register on mips64x SB register (R28) is introduced for access external addresses with shorter instruction sequences. It is loaded at entry points. External data within 2G of SB can be accessed this way. cmd/internal/obj: relocaltion R_ADDRMIPS is split into two relocations R_ADDRMIPS and R_ADDRMIPSU, handling the low 16 bits and the "upper" 16 bits of external addresses, respectively, since the instructios may not be adjacent. It might be better if relocation Variant could be used. cmd/link/internal/mips64: support new relocations. cmd/compile/internal/mips64: reserve SB register. runtime: initialize SB register at entry points. Change-Id: I5f34868f88c5a9698c042a8a1f12f76806c187b9 Reviewed-on: https://go-review.googlesource.com/19802 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:02 -04:00
rel2.Siz = 4
rel2.Sym = p.To.Sym
rel2.Add = p.To.Offset
cmd/internal/objabi: extract shared functionality from obj Now only cmd/asm and cmd/compile depend on cmd/internal/obj. Changing the assembler backends no longer requires reinstalling cmd/link or cmd/addr2line. There's also now one canonical definition of the object file format in cmd/internal/objabi/doc.go, with a warning to update all three implementations. objabi is still something of a grab bag of unrelated code (e.g., flag and environment variable handling probably belong in a separate "tool" package), but this is still progress. Fixes #15165. Fixes #20026. Change-Id: Ic4b92fac7d0d35438e0d20c9579aad4085c5534c Reviewed-on: https://go-review.googlesource.com/40972 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2017-04-18 12:53:25 -07:00
rel2.Type = objabi.R_ADDRMIPS
cmd/internal/obj/mips et al.: introduce SB register on mips64x SB register (R28) is introduced for access external addresses with shorter instruction sequences. It is loaded at entry points. External data within 2G of SB can be accessed this way. cmd/internal/obj: relocaltion R_ADDRMIPS is split into two relocations R_ADDRMIPS and R_ADDRMIPSU, handling the low 16 bits and the "upper" 16 bits of external addresses, respectively, since the instructios may not be adjacent. It might be better if relocation Variant could be used. cmd/link/internal/mips64: support new relocations. cmd/compile/internal/mips64: reserve SB register. runtime: initialize SB register at entry points. Change-Id: I5f34868f88c5a9698c042a8a1f12f76806c187b9 Reviewed-on: https://go-review.googlesource.com/19802 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:02 -04:00
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
if o.size == 12 {
o3 = o2
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o2 = OP_RRR(c.oprrr(AADDVU), uint32(REGSB), uint32(REGTMP), uint32(REGTMP))
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
rel2.Off += 4
}
cmd/internal/obj/mips et al.: introduce SB register on mips64x SB register (R28) is introduced for access external addresses with shorter instruction sequences. It is loaded at entry points. External data within 2G of SB can be accessed this way. cmd/internal/obj: relocaltion R_ADDRMIPS is split into two relocations R_ADDRMIPS and R_ADDRMIPSU, handling the low 16 bits and the "upper" 16 bits of external addresses, respectively, since the instructios may not be adjacent. It might be better if relocation Variant could be used. cmd/link/internal/mips64: support new relocations. cmd/compile/internal/mips64: reserve SB register. runtime: initialize SB register at entry points. Change-Id: I5f34868f88c5a9698c042a8a1f12f76806c187b9 Reviewed-on: https://go-review.googlesource.com/19802 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:02 -04:00
case 51: /* mov addr,r ==> lu + add REGSB, REGTMP + lw o(REGTMP) */
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = OP_IRR(c.opirr(ALUI), uint32(0), uint32(REGZERO), uint32(REGTMP))
rel := obj.Addrel(c.cursym)
rel.Off = int32(c.pc)
cmd/internal/obj/mips et al.: introduce SB register on mips64x SB register (R28) is introduced for access external addresses with shorter instruction sequences. It is loaded at entry points. External data within 2G of SB can be accessed this way. cmd/internal/obj: relocaltion R_ADDRMIPS is split into two relocations R_ADDRMIPS and R_ADDRMIPSU, handling the low 16 bits and the "upper" 16 bits of external addresses, respectively, since the instructios may not be adjacent. It might be better if relocation Variant could be used. cmd/link/internal/mips64: support new relocations. cmd/compile/internal/mips64: reserve SB register. runtime: initialize SB register at entry points. Change-Id: I5f34868f88c5a9698c042a8a1f12f76806c187b9 Reviewed-on: https://go-review.googlesource.com/19802 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:02 -04:00
rel.Siz = 4
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
rel.Sym = p.From.Sym
rel.Add = p.From.Offset
cmd/internal/objabi: extract shared functionality from obj Now only cmd/asm and cmd/compile depend on cmd/internal/obj. Changing the assembler backends no longer requires reinstalling cmd/link or cmd/addr2line. There's also now one canonical definition of the object file format in cmd/internal/objabi/doc.go, with a warning to update all three implementations. objabi is still something of a grab bag of unrelated code (e.g., flag and environment variable handling probably belong in a separate "tool" package), but this is still progress. Fixes #15165. Fixes #20026. Change-Id: Ic4b92fac7d0d35438e0d20c9579aad4085c5534c Reviewed-on: https://go-review.googlesource.com/40972 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2017-04-18 12:53:25 -07:00
rel.Type = objabi.R_ADDRMIPSU
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o2 = OP_IRR(c.opirr(-p.As), uint32(0), uint32(REGTMP), uint32(p.To.Reg))
rel2 := obj.Addrel(c.cursym)
rel2.Off = int32(c.pc + 4)
cmd/internal/obj/mips et al.: introduce SB register on mips64x SB register (R28) is introduced for access external addresses with shorter instruction sequences. It is loaded at entry points. External data within 2G of SB can be accessed this way. cmd/internal/obj: relocaltion R_ADDRMIPS is split into two relocations R_ADDRMIPS and R_ADDRMIPSU, handling the low 16 bits and the "upper" 16 bits of external addresses, respectively, since the instructios may not be adjacent. It might be better if relocation Variant could be used. cmd/link/internal/mips64: support new relocations. cmd/compile/internal/mips64: reserve SB register. runtime: initialize SB register at entry points. Change-Id: I5f34868f88c5a9698c042a8a1f12f76806c187b9 Reviewed-on: https://go-review.googlesource.com/19802 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:02 -04:00
rel2.Siz = 4
rel2.Sym = p.From.Sym
rel2.Add = p.From.Offset
cmd/internal/objabi: extract shared functionality from obj Now only cmd/asm and cmd/compile depend on cmd/internal/obj. Changing the assembler backends no longer requires reinstalling cmd/link or cmd/addr2line. There's also now one canonical definition of the object file format in cmd/internal/objabi/doc.go, with a warning to update all three implementations. objabi is still something of a grab bag of unrelated code (e.g., flag and environment variable handling probably belong in a separate "tool" package), but this is still progress. Fixes #15165. Fixes #20026. Change-Id: Ic4b92fac7d0d35438e0d20c9579aad4085c5534c Reviewed-on: https://go-review.googlesource.com/40972 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2017-04-18 12:53:25 -07:00
rel2.Type = objabi.R_ADDRMIPS
cmd/internal/obj/mips et al.: introduce SB register on mips64x SB register (R28) is introduced for access external addresses with shorter instruction sequences. It is loaded at entry points. External data within 2G of SB can be accessed this way. cmd/internal/obj: relocaltion R_ADDRMIPS is split into two relocations R_ADDRMIPS and R_ADDRMIPSU, handling the low 16 bits and the "upper" 16 bits of external addresses, respectively, since the instructios may not be adjacent. It might be better if relocation Variant could be used. cmd/link/internal/mips64: support new relocations. cmd/compile/internal/mips64: reserve SB register. runtime: initialize SB register at entry points. Change-Id: I5f34868f88c5a9698c042a8a1f12f76806c187b9 Reviewed-on: https://go-review.googlesource.com/19802 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:02 -04:00
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
if o.size == 12 {
o3 = o2
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o2 = OP_RRR(c.oprrr(AADDVU), uint32(REGSB), uint32(REGTMP), uint32(REGTMP))
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
rel2.Off += 4
}
cmd/internal/obj/mips et al.: introduce SB register on mips64x SB register (R28) is introduced for access external addresses with shorter instruction sequences. It is loaded at entry points. External data within 2G of SB can be accessed this way. cmd/internal/obj: relocaltion R_ADDRMIPS is split into two relocations R_ADDRMIPS and R_ADDRMIPSU, handling the low 16 bits and the "upper" 16 bits of external addresses, respectively, since the instructios may not be adjacent. It might be better if relocation Variant could be used. cmd/link/internal/mips64: support new relocations. cmd/compile/internal/mips64: reserve SB register. runtime: initialize SB register at entry points. Change-Id: I5f34868f88c5a9698c042a8a1f12f76806c187b9 Reviewed-on: https://go-review.googlesource.com/19802 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:02 -04:00
case 52: /* mov $lext, r ==> lu + add REGSB, r + add */
cmd/internal/obj/mips: mark unsafe points For async preemption, we will be using REGTMP as a temporary register in injected call on MIPS, which will clobber it. So any code that uses REGTMP is not safe for async preemption. In the assembler backend, we expand a Prog to multiple machine instructions and use REGTMP as a temporary register if necessary. These need to be marked unsafe. In fact, most of the multi-instruction Progs use REGTMP, so we mark all of them, except ones that are whitelisted. Change-Id: Ic00ae5589683c2c9525abdaee076d884df6b0d1e Reviewed-on: https://go-review.googlesource.com/c/go/+/203718 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Keith Randall <khr@golang.org>
2019-10-26 22:49:13 -04:00
// NOTE: this case does not use REGTMP. If it ever does,
// remove the NOTUSETMP flag in optab.
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o1 = OP_IRR(c.opirr(ALUI), uint32(0), uint32(REGZERO), uint32(p.To.Reg))
rel := obj.Addrel(c.cursym)
rel.Off = int32(c.pc)
cmd/internal/obj/mips et al.: introduce SB register on mips64x SB register (R28) is introduced for access external addresses with shorter instruction sequences. It is loaded at entry points. External data within 2G of SB can be accessed this way. cmd/internal/obj: relocaltion R_ADDRMIPS is split into two relocations R_ADDRMIPS and R_ADDRMIPSU, handling the low 16 bits and the "upper" 16 bits of external addresses, respectively, since the instructios may not be adjacent. It might be better if relocation Variant could be used. cmd/link/internal/mips64: support new relocations. cmd/compile/internal/mips64: reserve SB register. runtime: initialize SB register at entry points. Change-Id: I5f34868f88c5a9698c042a8a1f12f76806c187b9 Reviewed-on: https://go-review.googlesource.com/19802 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:02 -04:00
rel.Siz = 4
rel.Sym = p.From.Sym
rel.Add = p.From.Offset
cmd/internal/objabi: extract shared functionality from obj Now only cmd/asm and cmd/compile depend on cmd/internal/obj. Changing the assembler backends no longer requires reinstalling cmd/link or cmd/addr2line. There's also now one canonical definition of the object file format in cmd/internal/objabi/doc.go, with a warning to update all three implementations. objabi is still something of a grab bag of unrelated code (e.g., flag and environment variable handling probably belong in a separate "tool" package), but this is still progress. Fixes #15165. Fixes #20026. Change-Id: Ic4b92fac7d0d35438e0d20c9579aad4085c5534c Reviewed-on: https://go-review.googlesource.com/40972 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2017-04-18 12:53:25 -07:00
rel.Type = objabi.R_ADDRMIPSU
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o2 = OP_IRR(c.opirr(add), uint32(0), uint32(p.To.Reg), uint32(p.To.Reg))
rel2 := obj.Addrel(c.cursym)
rel2.Off = int32(c.pc + 4)
cmd/internal/obj/mips et al.: introduce SB register on mips64x SB register (R28) is introduced for access external addresses with shorter instruction sequences. It is loaded at entry points. External data within 2G of SB can be accessed this way. cmd/internal/obj: relocaltion R_ADDRMIPS is split into two relocations R_ADDRMIPS and R_ADDRMIPSU, handling the low 16 bits and the "upper" 16 bits of external addresses, respectively, since the instructios may not be adjacent. It might be better if relocation Variant could be used. cmd/link/internal/mips64: support new relocations. cmd/compile/internal/mips64: reserve SB register. runtime: initialize SB register at entry points. Change-Id: I5f34868f88c5a9698c042a8a1f12f76806c187b9 Reviewed-on: https://go-review.googlesource.com/19802 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:02 -04:00
rel2.Siz = 4
rel2.Sym = p.From.Sym
rel2.Add = p.From.Offset
cmd/internal/objabi: extract shared functionality from obj Now only cmd/asm and cmd/compile depend on cmd/internal/obj. Changing the assembler backends no longer requires reinstalling cmd/link or cmd/addr2line. There's also now one canonical definition of the object file format in cmd/internal/objabi/doc.go, with a warning to update all three implementations. objabi is still something of a grab bag of unrelated code (e.g., flag and environment variable handling probably belong in a separate "tool" package), but this is still progress. Fixes #15165. Fixes #20026. Change-Id: Ic4b92fac7d0d35438e0d20c9579aad4085c5534c Reviewed-on: https://go-review.googlesource.com/40972 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2017-04-18 12:53:25 -07:00
rel2.Type = objabi.R_ADDRMIPS
cmd/internal/obj/mips, cmd/link: add support TLS relocation for mips64x a new relocation R_ADDRMIPSTLS is added, which resolves to 16-bit offset of a TLS address on mips64x. Change-Id: Ic60d0e1ba49ff1c433cead242f5884677ab227a5 Reviewed-on: https://go-review.googlesource.com/19804 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:14 -04:00
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
if o.size == 12 {
o3 = o2
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o2 = OP_RRR(c.oprrr(AADDVU), uint32(REGSB), uint32(p.To.Reg), uint32(p.To.Reg))
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
rel2.Off += 4
}
cmd/internal/obj/mips, cmd/link: add support TLS relocation for mips64x a new relocation R_ADDRMIPSTLS is added, which resolves to 16-bit offset of a TLS address on mips64x. Change-Id: Ic60d0e1ba49ff1c433cead242f5884677ab227a5 Reviewed-on: https://go-review.googlesource.com/19804 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:14 -04:00
case 53: /* mov r, tlsvar ==> rdhwr + sw o(r3) */
// clobbers R3 !
// load thread pointer with RDHWR, R3 is used for fast kernel emulation on Linux
cmd/internal/obj/mips: mark unsafe points For async preemption, we will be using REGTMP as a temporary register in injected call on MIPS, which will clobber it. So any code that uses REGTMP is not safe for async preemption. In the assembler backend, we expand a Prog to multiple machine instructions and use REGTMP as a temporary register if necessary. These need to be marked unsafe. In fact, most of the multi-instruction Progs use REGTMP, so we mark all of them, except ones that are whitelisted. Change-Id: Ic00ae5589683c2c9525abdaee076d884df6b0d1e Reviewed-on: https://go-review.googlesource.com/c/go/+/203718 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Keith Randall <khr@golang.org>
2019-10-26 22:49:13 -04:00
// NOTE: this case does not use REGTMP. If it ever does,
// remove the NOTUSETMP flag in optab.
cmd/internal/obj/mips, cmd/link: add support TLS relocation for mips64x a new relocation R_ADDRMIPSTLS is added, which resolves to 16-bit offset of a TLS address on mips64x. Change-Id: Ic60d0e1ba49ff1c433cead242f5884677ab227a5 Reviewed-on: https://go-review.googlesource.com/19804 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:14 -04:00
o1 = (037<<26 + 073) | (29 << 11) | (3 << 16) // rdhwr $29, r3
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o2 = OP_IRR(c.opirr(p.As), uint32(0), uint32(REG_R3), uint32(p.From.Reg))
rel := obj.Addrel(c.cursym)
rel.Off = int32(c.pc + 4)
cmd/internal/obj/mips, cmd/link: add support TLS relocation for mips64x a new relocation R_ADDRMIPSTLS is added, which resolves to 16-bit offset of a TLS address on mips64x. Change-Id: Ic60d0e1ba49ff1c433cead242f5884677ab227a5 Reviewed-on: https://go-review.googlesource.com/19804 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:14 -04:00
rel.Siz = 4
rel.Sym = p.To.Sym
rel.Add = p.To.Offset
cmd/internal/objabi: extract shared functionality from obj Now only cmd/asm and cmd/compile depend on cmd/internal/obj. Changing the assembler backends no longer requires reinstalling cmd/link or cmd/addr2line. There's also now one canonical definition of the object file format in cmd/internal/objabi/doc.go, with a warning to update all three implementations. objabi is still something of a grab bag of unrelated code (e.g., flag and environment variable handling probably belong in a separate "tool" package), but this is still progress. Fixes #15165. Fixes #20026. Change-Id: Ic4b92fac7d0d35438e0d20c9579aad4085c5534c Reviewed-on: https://go-review.googlesource.com/40972 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2017-04-18 12:53:25 -07:00
rel.Type = objabi.R_ADDRMIPSTLS
cmd/internal/obj/mips, cmd/link: add support TLS relocation for mips64x a new relocation R_ADDRMIPSTLS is added, which resolves to 16-bit offset of a TLS address on mips64x. Change-Id: Ic60d0e1ba49ff1c433cead242f5884677ab227a5 Reviewed-on: https://go-review.googlesource.com/19804 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:14 -04:00
case 54: /* mov tlsvar, r ==> rdhwr + lw o(r3) */
// clobbers R3 !
cmd/internal/obj/mips: mark unsafe points For async preemption, we will be using REGTMP as a temporary register in injected call on MIPS, which will clobber it. So any code that uses REGTMP is not safe for async preemption. In the assembler backend, we expand a Prog to multiple machine instructions and use REGTMP as a temporary register if necessary. These need to be marked unsafe. In fact, most of the multi-instruction Progs use REGTMP, so we mark all of them, except ones that are whitelisted. Change-Id: Ic00ae5589683c2c9525abdaee076d884df6b0d1e Reviewed-on: https://go-review.googlesource.com/c/go/+/203718 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Keith Randall <khr@golang.org>
2019-10-26 22:49:13 -04:00
// NOTE: this case does not use REGTMP. If it ever does,
// remove the NOTUSETMP flag in optab.
cmd/internal/obj/mips, cmd/link: add support TLS relocation for mips64x a new relocation R_ADDRMIPSTLS is added, which resolves to 16-bit offset of a TLS address on mips64x. Change-Id: Ic60d0e1ba49ff1c433cead242f5884677ab227a5 Reviewed-on: https://go-review.googlesource.com/19804 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:14 -04:00
o1 = (037<<26 + 073) | (29 << 11) | (3 << 16) // rdhwr $29, r3
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o2 = OP_IRR(c.opirr(-p.As), uint32(0), uint32(REG_R3), uint32(p.To.Reg))
rel := obj.Addrel(c.cursym)
rel.Off = int32(c.pc + 4)
cmd/internal/obj/mips, cmd/link: add support TLS relocation for mips64x a new relocation R_ADDRMIPSTLS is added, which resolves to 16-bit offset of a TLS address on mips64x. Change-Id: Ic60d0e1ba49ff1c433cead242f5884677ab227a5 Reviewed-on: https://go-review.googlesource.com/19804 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:14 -04:00
rel.Siz = 4
rel.Sym = p.From.Sym
rel.Add = p.From.Offset
cmd/internal/objabi: extract shared functionality from obj Now only cmd/asm and cmd/compile depend on cmd/internal/obj. Changing the assembler backends no longer requires reinstalling cmd/link or cmd/addr2line. There's also now one canonical definition of the object file format in cmd/internal/objabi/doc.go, with a warning to update all three implementations. objabi is still something of a grab bag of unrelated code (e.g., flag and environment variable handling probably belong in a separate "tool" package), but this is still progress. Fixes #15165. Fixes #20026. Change-Id: Ic4b92fac7d0d35438e0d20c9579aad4085c5534c Reviewed-on: https://go-review.googlesource.com/40972 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2017-04-18 12:53:25 -07:00
rel.Type = objabi.R_ADDRMIPSTLS
cmd/internal/obj/mips, cmd/link: add support TLS relocation for mips64x a new relocation R_ADDRMIPSTLS is added, which resolves to 16-bit offset of a TLS address on mips64x. Change-Id: Ic60d0e1ba49ff1c433cead242f5884677ab227a5 Reviewed-on: https://go-review.googlesource.com/19804 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:14 -04:00
case 55: /* mov $tlsvar, r ==> rdhwr + add */
// clobbers R3 !
cmd/internal/obj/mips: mark unsafe points For async preemption, we will be using REGTMP as a temporary register in injected call on MIPS, which will clobber it. So any code that uses REGTMP is not safe for async preemption. In the assembler backend, we expand a Prog to multiple machine instructions and use REGTMP as a temporary register if necessary. These need to be marked unsafe. In fact, most of the multi-instruction Progs use REGTMP, so we mark all of them, except ones that are whitelisted. Change-Id: Ic00ae5589683c2c9525abdaee076d884df6b0d1e Reviewed-on: https://go-review.googlesource.com/c/go/+/203718 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Keith Randall <khr@golang.org>
2019-10-26 22:49:13 -04:00
// NOTE: this case does not use REGTMP. If it ever does,
// remove the NOTUSETMP flag in optab.
cmd/internal/obj/mips, cmd/link: add support TLS relocation for mips64x a new relocation R_ADDRMIPSTLS is added, which resolves to 16-bit offset of a TLS address on mips64x. Change-Id: Ic60d0e1ba49ff1c433cead242f5884677ab227a5 Reviewed-on: https://go-review.googlesource.com/19804 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:14 -04:00
o1 = (037<<26 + 073) | (29 << 11) | (3 << 16) // rdhwr $29, r3
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
o2 = OP_IRR(c.opirr(add), uint32(0), uint32(REG_R3), uint32(p.To.Reg))
rel := obj.Addrel(c.cursym)
rel.Off = int32(c.pc + 4)
cmd/internal/obj/mips, cmd/link: add support TLS relocation for mips64x a new relocation R_ADDRMIPSTLS is added, which resolves to 16-bit offset of a TLS address on mips64x. Change-Id: Ic60d0e1ba49ff1c433cead242f5884677ab227a5 Reviewed-on: https://go-review.googlesource.com/19804 Reviewed-by: Minux Ma <minux@golang.org>
2016-04-27 22:18:14 -04:00
rel.Siz = 4
rel.Sym = p.From.Sym
rel.Add = p.From.Offset
cmd/internal/objabi: extract shared functionality from obj Now only cmd/asm and cmd/compile depend on cmd/internal/obj. Changing the assembler backends no longer requires reinstalling cmd/link or cmd/addr2line. There's also now one canonical definition of the object file format in cmd/internal/objabi/doc.go, with a warning to update all three implementations. objabi is still something of a grab bag of unrelated code (e.g., flag and environment variable handling probably belong in a separate "tool" package), but this is still progress. Fixes #15165. Fixes #20026. Change-Id: Ic4b92fac7d0d35438e0d20c9579aad4085c5534c Reviewed-on: https://go-review.googlesource.com/40972 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2017-04-18 12:53:25 -07:00
rel.Type = objabi.R_ADDRMIPSTLS
cmd/asm: add MIPS MSA LD/ST/LDI support for mips64x This CL adding primitive asm support of MIPS MSA by introducing new sets of register W0-W31 (C_WREG) and 12 new instructions: * VMOV{B,H,W,D} ADDCONST, WREG (Vector load immediate) * VMOV{B,H,W,D} SOREG, WREG (Vector load) * VMOV{B,H,W,D} WREG, SOREG (Vector store) Ref: MIPS Architecture for Programmers Volume IV-j: The MIPS64 SIMD Architecture Module Change-Id: I3362c59a73c82c94769c18a19a0bee7e5029217d Reviewed-on: https://go-review.googlesource.com/c/go/+/215723 Run-TryBot: Meng Zhuo <mengzhuo1203@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2020-03-03 23:05:32 +08:00
case 56: /* vmov{b,h,w,d} $scon, wr */
v := c.regoff(&p.From)
o1 = OP_VI10(110, c.twobitdf(p.As), v, uint32(p.To.Reg), 7)
case 57: /* vld $soreg, wr */
v := c.lsoffset(p.As, c.regoff(&p.From))
o1 = OP_VMI10(v, uint32(p.From.Reg), uint32(p.To.Reg), 8, c.twobitdf(p.As))
case 58: /* vst wr, $soreg */
v := c.lsoffset(p.As, c.regoff(&p.To))
o1 = OP_VMI10(v, uint32(p.To.Reg), uint32(p.From.Reg), 9, c.twobitdf(p.As))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
out[0] = o1
out[1] = o2
out[2] = o3
out[3] = o4
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
func (c *ctxt0) vregoff(a *obj.Addr) int64 {
c.instoffset = 0
c.aclass(a)
return c.instoffset
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
func (c *ctxt0) regoff(a *obj.Addr) int32 {
return int32(c.vregoff(a))
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
func (c *ctxt0) oprrr(a obj.As) uint32 {
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
switch a {
case AADD:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return OP(4, 0)
case AADDU:
return OP(4, 1)
case ASGT:
return OP(5, 2)
case ASGTU:
return OP(5, 3)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
case AAND:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return OP(4, 4)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
case AOR:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return OP(4, 5)
case AXOR:
return OP(4, 6)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
case ASUB:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return OP(4, 2)
cmd/internal/obj/mips: support NEG, avoid crash with illegal instruction Add support of NEG{V,W} pseudo-instructions, which are translated to a SUB instruction from R0 with proper width. Also turn illegal instruction to UNDEF, to avoid crashing in asmout when it tries to read the operands. Fixes #23548. Change-Id: I047b27559ccd9594c3dcf62ab039b636098f30a3 Reviewed-on: https://go-review.googlesource.com/89896 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: David Chase <drchase@google.com>
2018-01-25 11:46:06 -05:00
case ASUBU, ANEGW:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return OP(4, 3)
case ANOR:
return OP(4, 7)
case ASLL:
return OP(0, 4)
case ASRL:
return OP(0, 6)
case ASRA:
return OP(0, 7)
case ASLLV:
return OP(2, 4)
case ASRLV:
return OP(2, 6)
case ASRAV:
return OP(2, 7)
case AADDV:
return OP(5, 4)
case AADDVU:
return OP(5, 5)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
case ASUBV:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return OP(5, 6)
cmd/internal/obj/mips: support NEG, avoid crash with illegal instruction Add support of NEG{V,W} pseudo-instructions, which are translated to a SUB instruction from R0 with proper width. Also turn illegal instruction to UNDEF, to avoid crashing in asmout when it tries to read the operands. Fixes #23548. Change-Id: I047b27559ccd9594c3dcf62ab039b636098f30a3 Reviewed-on: https://go-review.googlesource.com/89896 Run-TryBot: Cherry Zhang <cherryyz@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: David Chase <drchase@google.com>
2018-01-25 11:46:06 -05:00
case ASUBVU, ANEGV:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return OP(5, 7)
case AREM,
ADIV:
return OP(3, 2)
case AREMU,
ADIVU:
return OP(3, 3)
case AMUL:
return OP(3, 0)
case AMULU:
return OP(3, 1)
case AREMV,
ADIVV:
return OP(3, 6)
case AREMVU,
ADIVVU:
return OP(3, 7)
case AMULV:
return OP(3, 4)
case AMULVU:
return OP(3, 5)
case AJMP:
return OP(1, 0)
case AJAL:
return OP(1, 1)
case ABREAK:
return OP(1, 5)
case ASYSCALL:
return OP(1, 4)
case ATLBP:
return MMU(1, 0)
case ATLBR:
return MMU(0, 1)
case ATLBWI:
return MMU(0, 2)
case ATLBWR:
return MMU(0, 6)
case ARFE:
return MMU(2, 0)
case ADIVF:
return FPF(0, 3)
case ADIVD:
return FPD(0, 3)
case AMULF:
return FPF(0, 2)
case AMULD:
return FPD(0, 2)
case ASUBF:
return FPF(0, 1)
case ASUBD:
return FPD(0, 1)
case AADDF:
return FPF(0, 0)
case AADDD:
return FPD(0, 0)
case ATRUNCFV:
return FPF(1, 1)
case ATRUNCDV:
return FPD(1, 1)
case ATRUNCFW:
return FPF(1, 5)
case ATRUNCDW:
return FPD(1, 5)
case AMOVFV:
return FPF(4, 5)
case AMOVDV:
return FPD(4, 5)
case AMOVVF:
return FPV(4, 0)
case AMOVVD:
return FPV(4, 1)
case AMOVFW:
return FPF(4, 4)
case AMOVDW:
return FPD(4, 4)
case AMOVWF:
return FPW(4, 0)
case AMOVDF:
return FPD(4, 0)
case AMOVWD:
return FPW(4, 1)
case AMOVFD:
return FPF(4, 1)
case AABSF:
return FPF(0, 5)
case AABSD:
return FPD(0, 5)
case AMOVF:
return FPF(0, 6)
case AMOVD:
return FPD(0, 6)
case ANEGF:
return FPF(0, 7)
case ANEGD:
return FPD(0, 7)
case ACMPEQF:
return FPF(6, 2)
case ACMPEQD:
return FPD(6, 2)
case ACMPGTF:
return FPF(7, 4)
case ACMPGTD:
return FPD(7, 4)
case ACMPGEF:
return FPF(7, 6)
case ACMPGED:
return FPD(7, 6)
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
case ASQRTF:
return FPF(0, 4)
case ASQRTD:
return FPD(0, 4)
case ASYNC:
return OP(1, 7)
cmd/internal/obj/mips: add support of LLV, SCV, NOOP instructions LLV and SCV are 64-bit load-linked and store-conditional. They were used in runtime as #define WORD. Change them to normal instruction form. NOOP is hardware no-op. It was written as WORD $0. Make a name for it for better disassembly output. Fixes #12561. Fixes #18238. Change-Id: I82c667ce756fa83ef37b034b641e8c4366335e83 Reviewed-on: https://go-review.googlesource.com/40297 Reviewed-by: Minux Ma <minux@golang.org> Run-TryBot: Minux Ma <minux@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2017-04-11 10:39:55 -04:00
case ANOOP:
return 0
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
case ACMOVN:
return OP(1, 3)
case ACMOVZ:
return OP(1, 2)
case ACMOVT:
return OP(0, 1) | (1 << 16)
case ACMOVF:
return OP(0, 1) | (0 << 16)
case ACLO:
return SP(3, 4) | OP(4, 1)
case ACLZ:
return SP(3, 4) | OP(4, 0)
cmd/internal/obj/mips: add MADD/MSUB This CL implements MADD&MSUB, which are mips32r2 instructions. Change-Id: I06fe51573569baf3b71536336b34b95ccd24750b Reviewed-on: https://go-review.googlesource.com/c/go/+/167680 Run-TryBot: Ben Shi <powerman1st@163.com> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2019-03-15 08:26:53 +00:00
case AMADD:
return SP(3, 4) | OP(0, 0)
case AMSUB:
return SP(3, 4) | OP(0, 4)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
if a < 0 {
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
c.ctxt.Diag("bad rrr opcode -%v", -a)
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
} else {
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
c.ctxt.Diag("bad rrr opcode %v", a)
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
}
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
return 0
}
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
func (c *ctxt0) opirr(a obj.As) uint32 {
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
switch a {
case AADD:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return SP(1, 0)
case AADDU:
return SP(1, 1)
case ASGT:
return SP(1, 2)
case ASGTU:
return SP(1, 3)
case AAND:
return SP(1, 4)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
case AOR:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return SP(1, 5)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
case AXOR:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return SP(1, 6)
cmd/internal/obj/mips: add ALUI const Instead of abusing ALAST. Passes GOARCH=mips64 toolstash -cmp. Updates #14692. Change-Id: Ie85e99cf76508c1d0f5847a4157056b614fd5cc6 Reviewed-on: https://go-review.googlesource.com/20341 Run-TryBot: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
2016-03-07 13:45:52 -08:00
case ALUI:
return SP(1, 7)
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case ASLL:
return OP(0, 0)
case ASRL:
return OP(0, 2)
case ASRA:
return OP(0, 3)
case AADDV:
return SP(3, 0)
case AADDVU:
return SP(3, 1)
case AJMP:
return SP(0, 2)
case AJAL,
obj.ADUFFZERO,
obj.ADUFFCOPY:
return SP(0, 3)
case ABEQ:
return SP(0, 4)
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
case -ABEQ:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return SP(2, 4) /* likely */
case ABNE:
return SP(0, 5)
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
case -ABNE:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return SP(2, 5) /* likely */
case ABGEZ:
return SP(0, 1) | BCOND(0, 1)
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
case -ABGEZ:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return SP(0, 1) | BCOND(0, 3) /* likely */
case ABGEZAL:
return SP(0, 1) | BCOND(2, 1)
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
case -ABGEZAL:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return SP(0, 1) | BCOND(2, 3) /* likely */
case ABGTZ:
return SP(0, 7)
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
case -ABGTZ:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return SP(2, 7) /* likely */
case ABLEZ:
return SP(0, 6)
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
case -ABLEZ:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return SP(2, 6) /* likely */
case ABLTZ:
return SP(0, 1) | BCOND(0, 0)
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
case -ABLTZ:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return SP(0, 1) | BCOND(0, 2) /* likely */
case ABLTZAL:
return SP(0, 1) | BCOND(2, 0)
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
case -ABLTZAL:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return SP(0, 1) | BCOND(2, 2) /* likely */
case ABFPT:
return SP(2, 1) | (257 << 16)
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
case -ABFPT:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return SP(2, 1) | (259 << 16) /* likely */
case ABFPF:
return SP(2, 1) | (256 << 16)
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
case -ABFPF:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return SP(2, 1) | (258 << 16) /* likely */
case AMOVB,
AMOVBU:
return SP(5, 0)
case AMOVH,
AMOVHU:
return SP(5, 1)
case AMOVW,
AMOVWU:
return SP(5, 3)
case AMOVV:
return SP(7, 7)
case AMOVF:
return SP(7, 1)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
case AMOVD:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return SP(7, 5)
case AMOVWL:
return SP(5, 2)
case AMOVWR:
return SP(5, 6)
case AMOVVL:
return SP(5, 4)
case AMOVVR:
return SP(5, 5)
case ABREAK:
return SP(5, 7)
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
case -AMOVWL:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return SP(4, 2)
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
case -AMOVWR:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return SP(4, 6)
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
case -AMOVVL:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return SP(3, 2)
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
case -AMOVVR:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return SP(3, 3)
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
case -AMOVB:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return SP(4, 0)
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
case -AMOVBU:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return SP(4, 4)
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
case -AMOVH:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return SP(4, 1)
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
case -AMOVHU:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return SP(4, 5)
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
case -AMOVW:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return SP(4, 3)
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
case -AMOVWU:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return SP(4, 7)
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
case -AMOVV:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return SP(6, 7)
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
case -AMOVF:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return SP(6, 1)
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
case -AMOVD:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return SP(6, 5)
case ASLLV:
return OP(7, 0)
case ASRLV:
return OP(7, 2)
case ASRAV:
return OP(7, 3)
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
case -ASLLV:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return OP(7, 4)
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
case -ASRLV:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return OP(7, 6)
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
case -ASRAV:
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return OP(7, 7)
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
case ATEQ:
return OP(6, 4)
case ATNE:
return OP(6, 6)
case -ALL:
return SP(6, 0)
cmd/internal/obj/mips: add support of LLV, SCV, NOOP instructions LLV and SCV are 64-bit load-linked and store-conditional. They were used in runtime as #define WORD. Change them to normal instruction form. NOOP is hardware no-op. It was written as WORD $0. Make a name for it for better disassembly output. Fixes #12561. Fixes #18238. Change-Id: I82c667ce756fa83ef37b034b641e8c4366335e83 Reviewed-on: https://go-review.googlesource.com/40297 Reviewed-by: Minux Ma <minux@golang.org> Run-TryBot: Minux Ma <minux@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2017-04-11 10:39:55 -04:00
case -ALLV:
return SP(6, 4)
cmd/internal/obj/mips: add support for GOARCH=mips{,le} Implements subset of MIPS32(r1) instruction set. Change-Id: Iba017350f6c2763de05d4d1bc2f123e8eb76d0ff Reviewed-on: https://go-review.googlesource.com/31475 Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2016-10-18 23:50:37 +02:00
case ASC:
return SP(7, 0)
cmd/internal/obj/mips: add support of LLV, SCV, NOOP instructions LLV and SCV are 64-bit load-linked and store-conditional. They were used in runtime as #define WORD. Change them to normal instruction form. NOOP is hardware no-op. It was written as WORD $0. Make a name for it for better disassembly output. Fixes #12561. Fixes #18238. Change-Id: I82c667ce756fa83ef37b034b641e8c4366335e83 Reviewed-on: https://go-review.googlesource.com/40297 Reviewed-by: Minux Ma <minux@golang.org> Run-TryBot: Minux Ma <minux@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2017-04-11 10:39:55 -04:00
case ASCV:
return SP(7, 4)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj: stop using as+ALAST as an opcode Currently, package obj reserves a range of 1<<12 opcodes for each target architecture. E.g., mips64 has [6<<12, 7<<12). However, because mips.ABEQ and mips.ALAST are both within that range, the expression mips.ABEQ+mips.ALAST in turn falls (far) outside that range around 12<<12, meaning it could theoretically collide with another arch's opcodes. More practically, it's a problem because 12<<12 overflows an int16, which hampers fixing #14692. (We could also just switch to uint16 to avoid the overflow, but that still leaves the first problem.) As a workaround, use Michael Hudson-Doyle's solution from https://golang.org/cl/20182 and use negative values for these variant instructions. Passes toolstash -cmp for GOARCH=arm and GOARCH=mips64. Updates #14692. Change-Id: Iad797d10652360109fa4db19d4d1edb6529fc2c0 Reviewed-on: https://go-review.googlesource.com/20345 Run-TryBot: Matthew Dempsky <mdempsky@google.com> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
2016-03-07 15:15:57 -08:00
if a < 0 {
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
c.ctxt.Diag("bad irr opcode -%v", -a)
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
} else {
cmd/internal/obj/mips: make assembler almost concurrency-safe CL 39922 made the arm assembler concurrency-safe. This CL does the same, but for mips. The approach is similar: introduce ctxt0 to hold function-local state and thread it through the assembler as necessary. One race remains after this CL, similar to CL 40252. That race is conceptually unrelated to this refactoring, and will be addressed in a separate CL. Passes toolstash-check -all. Updates #15756 Change-Id: I2c54a889aa448a4476c9a75da4dd94ef69657b16 Reviewed-on: https://go-review.googlesource.com/40370 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-10 14:15:57 -07:00
c.ctxt.Diag("bad irr opcode %v", a)
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
return 0
}
cmd/internal/obj: add As type for assembly opcodes Passes toolstash/buildall. Fixes #14692. Change-Id: I4352678d8251309f2b8b7793674c550fac948006 Reviewed-on: https://go-review.googlesource.com/20350 Reviewed-by: Dave Cheney <dave@cheney.net> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
2016-03-07 18:00:08 -08:00
func vshift(a obj.As) bool {
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
switch a {
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
case ASLLV,
ASRLV,
ASRAV:
return true
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/internal/obj/mips: added support for GOARCH=mips64{,le} MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32 64-bit floating point registers (F0-F31). Instructions are fixed-width, and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand forms. MIPS64-specific relocations are added. For this reason, test data of cmd/newlink are regenerated. No other changes are made to portable structures. Branch delay slots are current filled with NOP instructions. The function for instruction scheduling (try to fill the delay slot with a useful instruction) is implemented but disabled for now. Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3 Reviewed-on: https://go-review.googlesource.com/14442 Reviewed-by: Minux Ma <minux@golang.org>
2015-09-10 11:13:00 -04:00
return false
cmd/internal/obj/mips: copy cmd/internal/obj/ppc64 Just a mechanical copy with filename renames, no code changes. This is to reduce code difference when adding the mips64 port. Change-Id: Id06e975f414a7b09f4827167b30813b228a3bfae Reviewed-on: https://go-review.googlesource.com/14323 Reviewed-by: Ian Lance Taylor <iant@golang.org>
2015-09-05 20:27:00 -04:00
}
cmd/asm: add MIPS MSA LD/ST/LDI support for mips64x This CL adding primitive asm support of MIPS MSA by introducing new sets of register W0-W31 (C_WREG) and 12 new instructions: * VMOV{B,H,W,D} ADDCONST, WREG (Vector load immediate) * VMOV{B,H,W,D} SOREG, WREG (Vector load) * VMOV{B,H,W,D} WREG, SOREG (Vector store) Ref: MIPS Architecture for Programmers Volume IV-j: The MIPS64 SIMD Architecture Module Change-Id: I3362c59a73c82c94769c18a19a0bee7e5029217d Reviewed-on: https://go-review.googlesource.com/c/go/+/215723 Run-TryBot: Meng Zhuo <mengzhuo1203@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
2020-03-03 23:05:32 +08:00
// MSA Two-bit Data Format Field Encoding
func (c *ctxt0) twobitdf(a obj.As) uint32 {
switch a {
case AVMOVB:
return 0
case AVMOVH:
return 1
case AVMOVW:
return 2
case AVMOVD:
return 3
default:
c.ctxt.Diag("unsupported data format %v", a)
}
return 0
}
// MSA Load/Store offset have to be multiple of size of data format
func (c *ctxt0) lsoffset(a obj.As, o int32) int32 {
var mod int32
switch a {
case AVMOVB:
mod = 1
case AVMOVH:
mod = 2
case AVMOVW:
mod = 4
case AVMOVD:
mod = 8
default:
c.ctxt.Diag("unsupported instruction:%v", a)
}
if o%mod != 0 {
c.ctxt.Diag("invalid offset for %v: %d is not a multiple of %d", a, o, mod)
}
return o / mod
}
Reference in a new issue Copy permalink