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go/src/cmd/compile/internal/ssa/gen/AMD64Ops.go

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[dev.ssa] cmd/compile/internal/ssa: autogenerate opcodes Revamp autogeneration. Get rid of gogenerate commands, they are more trouble than they are worth. (If the code won't compile, gogenerate doesn't work.) Generate opcode enums & tables. This means we only have to specify opcodes in one place instead of two. Add arch prefixes to opcodes so they will be globally unique. Change-Id: I175d0a89b701b2377bbe699f3756731b7c9f5a9f Reviewed-on: https://go-review.googlesource.com/10812 Reviewed-by: Alan Donovan <adonovan@google.com>
2015-06-06 16:03:33 -07:00
// Copyright 2015 The Go Authors. All rights reserved.
// Use of this source code is governed by a BSD-style
// license that can be found in the LICENSE file.
package main
[dev.ssa] cmd/compile/internal/ssa: adds for 8,16,32 bit ints Change-Id: I33025a4a41fd91f6ee317d33a6eebf27fa00ab51 Reviewed-on: https://go-review.googlesource.com/11115 Reviewed-by: Keith Randall <khr@golang.org>
2015-06-14 11:38:46 -07:00
import "strings"
[dev.ssa] cmd/compile/internal/ssa: autogenerate opcodes Revamp autogeneration. Get rid of gogenerate commands, they are more trouble than they are worth. (If the code won't compile, gogenerate doesn't work.) Generate opcode enums & tables. This means we only have to specify opcodes in one place instead of two. Add arch prefixes to opcodes so they will be globally unique. Change-Id: I175d0a89b701b2377bbe699f3756731b7c9f5a9f Reviewed-on: https://go-review.googlesource.com/10812 Reviewed-by: Alan Donovan <adonovan@google.com>
2015-06-06 16:03:33 -07:00
// copied from ../../amd64/reg.go
var regNamesAMD64 = []string{
".AX",
".CX",
".DX",
".BX",
".SP",
".BP",
".SI",
".DI",
".R8",
".R9",
".R10",
".R11",
".R12",
".R13",
".R14",
".R15",
".X0",
".X1",
".X2",
".X3",
".X4",
".X5",
".X6",
".X7",
".X8",
".X9",
".X10",
".X11",
".X12",
".X13",
".X14",
".X15",
// pseudo-registers
[dev.ssa] cmd/compile/internal/ssa: Handle variables correctly Use *Node of type ONAME instead of string as the key for variable maps. This will prevent aliasing between two identically named but differently scoped variables. Introduce an Aux value that encodes the offset of a variable from a base pointer (either global base pointer or stack pointer). Allow LEAQ and derivatives (MOVQ, etc.) to also have such an Aux field. Allocate space for AUTO variables in stackalloc. Change-Id: Ibdccdaea4bbc63a1f4882959ac374f2b467e3acd Reviewed-on: https://go-review.googlesource.com/11238 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2015-06-19 21:02:28 -07:00
".SB",
[dev.ssa] cmd/compile/internal/ssa: autogenerate opcodes Revamp autogeneration. Get rid of gogenerate commands, they are more trouble than they are worth. (If the code won't compile, gogenerate doesn't work.) Generate opcode enums & tables. This means we only have to specify opcodes in one place instead of two. Add arch prefixes to opcodes so they will be globally unique. Change-Id: I175d0a89b701b2377bbe699f3756731b7c9f5a9f Reviewed-on: https://go-review.googlesource.com/10812 Reviewed-by: Alan Donovan <adonovan@google.com>
2015-06-06 16:03:33 -07:00
".FLAGS",
}
func init() {
// Make map from reg names to reg integers.
if len(regNamesAMD64) > 64 {
panic("too many registers")
}
num := map[string]int{}
for i, name := range regNamesAMD64 {
if name[0] != '.' {
panic("register name " + name + " does not start with '.'")
}
num[name[1:]] = i
}
buildReg := func(s string) regMask {
m := regMask(0)
for _, r := range strings.Split(s, " ") {
if n, ok := num[r]; ok {
m |= regMask(1) << uint(n)
continue
}
panic("register " + r + " not found")
}
return m
}
[dev.ssa] cmd/compile: tidy up register setup No functional changes. The intent is just to make this easier to read and maintain. Change-Id: Iec207546482cd62bcb22eaae8efe5be6c4f15378 Reviewed-on: https://go-review.googlesource.com/13284 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-06 09:34:54 -07:00
// Common individual register masks
var (
[dev.ssa] cmd/compile/internal/ssa: implement ODIV Implement integer division for non-consts. Change-Id: If40cbde20e5f0ebb9993064def7be468e4eca076 Reviewed-on: https://go-review.googlesource.com/13644 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-17 17:46:06 -05:00
ax = buildReg("AX")
[dev.ssa] cmd/compile/internal/ssa: New register allocator Implement a global (whole function) register allocator. This replaces the local (per basic block) register allocator. Clobbering of registers by instructions is handled properly. A separate change will add the correct clobbers to all the instructions. Change-Id: I38ce4dc7dccb8303c1c0e0295fe70247b0a3f2ea Reviewed-on: https://go-review.googlesource.com/13622 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com> Reviewed-by: Todd Neal <todd@tneal.org>
2015-08-11 12:51:33 -07:00
cx = buildReg("CX")
[dev.ssa] cmd/compile/internal/ssa: implement ODIV Implement integer division for non-consts. Change-Id: If40cbde20e5f0ebb9993064def7be468e4eca076 Reviewed-on: https://go-review.googlesource.com/13644 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-17 17:46:06 -05:00
dx = buildReg("DX")
[dev.ssa] cmd/compile/internal/ssa: New register allocator Implement a global (whole function) register allocator. This replaces the local (per basic block) register allocator. Clobbering of registers by instructions is handled properly. A separate change will add the correct clobbers to all the instructions. Change-Id: I38ce4dc7dccb8303c1c0e0295fe70247b0a3f2ea Reviewed-on: https://go-review.googlesource.com/13622 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com> Reviewed-by: Todd Neal <todd@tneal.org>
2015-08-11 12:51:33 -07:00
x15 = buildReg("X15")
gp = buildReg("AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15")
fp = buildReg("X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15")
gpsp = gp | buildReg("SP")
gpspsb = gpsp | buildReg("SB")
flags = buildReg("FLAGS")
callerSave = gp | fp | flags
[dev.ssa] cmd/compile: tidy up register setup No functional changes. The intent is just to make this easier to read and maintain. Change-Id: Iec207546482cd62bcb22eaae8efe5be6c4f15378 Reviewed-on: https://go-review.googlesource.com/13284 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-06 09:34:54 -07:00
)
// Common slices of register masks
var (
gponly = []regMask{gp}
[dev.ssa] cmd/compile: first unoptimized cut at adding FP support Added F32 and F64 load, store, and addition. Added F32 and F64 multiply. Added F32 and F64 subtraction and division. Added X15 to "clobber" for FP sub/div Added FP constants Added separate FP test in gc/testdata Change-Id: Ifa60dbad948a40011b478d9605862c4b0cc9134c Reviewed-on: https://go-review.googlesource.com/13612 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-12 16:38:11 -04:00
fponly = []regMask{fp}
[dev.ssa] cmd/compile: tidy up register setup No functional changes. The intent is just to make this easier to read and maintain. Change-Id: Iec207546482cd62bcb22eaae8efe5be6c4f15378 Reviewed-on: https://go-review.googlesource.com/13284 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-06 09:34:54 -07:00
flagsonly = []regMask{flags}
)
// Common regInfo
var (
[dev.ssa] cmd/compile: mark LEA and MOV instructions as not clobbering flags This further reduces the number of flags spills during make.bash by about 50%. Note that GetG is implemented by one or two MOVs, which is why it does not clobber flags. Change-Id: I6fede8c027b7dc340e00d1e15df1b87bf2b2d9ec Reviewed-on: https://go-review.googlesource.com/13843 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-22 09:52:36 -07:00
gp01 = regInfo{inputs: []regMask{}, outputs: gponly}
[dev.ssa] cmd/compile/internal/ssa: New register allocator Implement a global (whole function) register allocator. This replaces the local (per basic block) register allocator. Clobbering of registers by instructions is handled properly. A separate change will add the correct clobbers to all the instructions. Change-Id: I38ce4dc7dccb8303c1c0e0295fe70247b0a3f2ea Reviewed-on: https://go-review.googlesource.com/13622 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com> Reviewed-by: Todd Neal <todd@tneal.org>
2015-08-11 12:51:33 -07:00
gp11 = regInfo{inputs: []regMask{gpsp}, outputs: gponly, clobbers: flags}
[dev.ssa] cmd/compile: mark LEA and MOV instructions as not clobbering flags This further reduces the number of flags spills during make.bash by about 50%. Note that GetG is implemented by one or two MOVs, which is why it does not clobber flags. Change-Id: I6fede8c027b7dc340e00d1e15df1b87bf2b2d9ec Reviewed-on: https://go-review.googlesource.com/13843 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-22 09:52:36 -07:00
gp11nf = regInfo{inputs: []regMask{gpsp}, outputs: gponly} // nf: no flags clobbered
gp11sb = regInfo{inputs: []regMask{gpspsb}, outputs: gponly}
[dev.ssa] cmd/compile/internal/ssa: New register allocator Implement a global (whole function) register allocator. This replaces the local (per basic block) register allocator. Clobbering of registers by instructions is handled properly. A separate change will add the correct clobbers to all the instructions. Change-Id: I38ce4dc7dccb8303c1c0e0295fe70247b0a3f2ea Reviewed-on: https://go-review.googlesource.com/13622 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com> Reviewed-by: Todd Neal <todd@tneal.org>
2015-08-11 12:51:33 -07:00
gp21 = regInfo{inputs: []regMask{gpsp, gpsp}, outputs: gponly, clobbers: flags}
[dev.ssa] cmd/compile: mark LEA and MOV instructions as not clobbering flags This further reduces the number of flags spills during make.bash by about 50%. Note that GetG is implemented by one or two MOVs, which is why it does not clobber flags. Change-Id: I6fede8c027b7dc340e00d1e15df1b87bf2b2d9ec Reviewed-on: https://go-review.googlesource.com/13843 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-22 09:52:36 -07:00
gp21sb = regInfo{inputs: []regMask{gpspsb, gpsp}, outputs: gponly}
[dev.ssa] cmd/compile/internal/ssa: New register allocator Implement a global (whole function) register allocator. This replaces the local (per basic block) register allocator. Clobbering of registers by instructions is handled properly. A separate change will add the correct clobbers to all the instructions. Change-Id: I38ce4dc7dccb8303c1c0e0295fe70247b0a3f2ea Reviewed-on: https://go-review.googlesource.com/13622 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com> Reviewed-by: Todd Neal <todd@tneal.org>
2015-08-11 12:51:33 -07:00
gp21shift = regInfo{inputs: []regMask{gpsp, cx}, outputs: []regMask{gp &^ cx}, clobbers: flags}
[dev.ssa] cmd/compile/internal/ssa: implement ODIV Implement integer division for non-consts. Change-Id: If40cbde20e5f0ebb9993064def7be468e4eca076 Reviewed-on: https://go-review.googlesource.com/13644 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-17 17:46:06 -05:00
gp11div = regInfo{inputs: []regMask{ax, gpsp &^ dx}, outputs: []regMask{ax},
clobbers: dx | flags}
[dev.ssa] cmd/compile/internal/ssa: implement OHMUL Adds support for high multiply which is used by the frontend when rewriting const division. The frontend currently only does this for 8, 16, and 32 bit integer arithmetic. Change-Id: I9b6c6018f3be827a50ee6c185454ebc79b3094c8 Reviewed-on: https://go-review.googlesource.com/13696 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-18 19:14:47 -05:00
gp11hmul = regInfo{inputs: []regMask{ax, gpsp}, outputs: []regMask{dx},
clobbers: ax | flags}
[dev.ssa] cmd/compile/internal/ssa: implement OMOD Change-Id: Iec954c4daefef4ab3fa2c98bfb2c70b2dea8dffb Reviewed-on: https://go-review.googlesource.com/13743 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-18 19:51:44 -05:00
gp11mod = regInfo{inputs: []regMask{ax, gpsp &^ dx}, outputs: []regMask{dx},
clobbers: ax | flags}
[dev.ssa] cmd/compile: tidy up register setup No functional changes. The intent is just to make this easier to read and maintain. Change-Id: Iec207546482cd62bcb22eaae8efe5be6c4f15378 Reviewed-on: https://go-review.googlesource.com/13284 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-06 09:34:54 -07:00
[dev.ssa] cmd/compile: SETcc instructions do not clobber flags This reduces the number of flags spilled during make.bash by > 90%. I am working (slowly) on the rest. Change-Id: I3c08ae228c33e2f726f615962996f0350c8d592b Reviewed-on: https://go-review.googlesource.com/13813 Reviewed-by: David Chase <drchase@google.com>
2015-08-21 10:16:35 -07:00
gp2flags = regInfo{inputs: []regMask{gpsp, gpsp}, outputs: flagsonly}
gp1flags = regInfo{inputs: []regMask{gpsp}, outputs: flagsonly}
[dev.ssa] cmd/compile: add FP comparison ops Basic ops, no particular optimization in the pattern matching yet (e.g. x!=x for Nan detection, x cmp constant, etc.) Change-Id: I0043564081d6dc0eede876c4a9eb3c33cbd1521c Reviewed-on: https://go-review.googlesource.com/13704 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-18 14:39:26 -04:00
flagsgp = regInfo{inputs: flagsonly, outputs: gponly}
[dev.ssa] cmd/compile: SETcc instructions do not clobber flags This reduces the number of flags spilled during make.bash by > 90%. I am working (slowly) on the rest. Change-Id: I3c08ae228c33e2f726f615962996f0350c8d592b Reviewed-on: https://go-review.googlesource.com/13813 Reviewed-by: David Chase <drchase@google.com>
2015-08-21 10:16:35 -07:00
readflags = regInfo{inputs: flagsonly, outputs: gponly}
[dev.ssa] cmd/compile/internal/ssa: make SETEQF and SETNEF clobber flags They do an AND or an OR internally, so they clobber flags. Fixes #12441 Change-Id: I6c843bd268496bc13fc7e3c561d76619e961e8ad Reviewed-on: https://go-review.googlesource.com/14180 Reviewed-by: Todd Neal <todd@tneal.org>
2015-09-01 15:18:01 -07:00
flagsgpax = regInfo{inputs: flagsonly, clobbers: ax | flags, outputs: []regMask{gp &^ ax}}
[dev.ssa] cmd/compile: tidy up register setup No functional changes. The intent is just to make this easier to read and maintain. Change-Id: Iec207546482cd62bcb22eaae8efe5be6c4f15378 Reviewed-on: https://go-review.googlesource.com/13284 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-06 09:34:54 -07:00
gpload = regInfo{inputs: []regMask{gpspsb, 0}, outputs: gponly}
gploadidx = regInfo{inputs: []regMask{gpspsb, gpsp, 0}, outputs: gponly}
[dev.ssa] cmd/compile: introduce storeconst ops Introduce opcodes that store a constant value. AuxInt now needs to hold both the value to be stored and the constant offset at which to store it. Introduce a StoreConst type to help encode/decode these parts to/from an AuxInt. Change-Id: I1631883abe035cff4b16368683e1eb3d2ccb674d Reviewed-on: https://go-review.googlesource.com/16170 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2015-10-21 13:13:56 -07:00
gpstore = regInfo{inputs: []regMask{gpspsb, gpsp, 0}}
gpstoreconst = regInfo{inputs: []regMask{gpspsb, 0}}
gpstoreidx = regInfo{inputs: []regMask{gpspsb, gpsp, gpsp, 0}}
[dev.ssa] cmd/compile: first unoptimized cut at adding FP support Added F32 and F64 load, store, and addition. Added F32 and F64 multiply. Added F32 and F64 subtraction and division. Added X15 to "clobber" for FP sub/div Added FP constants Added separate FP test in gc/testdata Change-Id: Ifa60dbad948a40011b478d9605862c4b0cc9134c Reviewed-on: https://go-review.googlesource.com/13612 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-12 16:38:11 -04:00
fp01 = regInfo{inputs: []regMask{}, outputs: fponly}
fp21 = regInfo{inputs: []regMask{fp, fp}, outputs: fponly}
fp21x15 = regInfo{inputs: []regMask{fp &^ x15, fp &^ x15},
clobbers: x15, outputs: []regMask{fp &^ x15}}
[dev.ssa] cmd/compile: add FP comparison ops Basic ops, no particular optimization in the pattern matching yet (e.g. x!=x for Nan detection, x cmp constant, etc.) Change-Id: I0043564081d6dc0eede876c4a9eb3c33cbd1521c Reviewed-on: https://go-review.googlesource.com/13704 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-18 14:39:26 -04:00
fpgp = regInfo{inputs: fponly, outputs: gponly}
gpfp = regInfo{inputs: gponly, outputs: fponly}
fp11 = regInfo{inputs: fponly, outputs: fponly}
fp2flags = regInfo{inputs: []regMask{fp, fp}, outputs: flagsonly}
// fp1flags = regInfo{inputs: fponly, outputs: flagsonly}
[dev.ssa] cmd/compile: first unoptimized cut at adding FP support Added F32 and F64 load, store, and addition. Added F32 and F64 multiply. Added F32 and F64 subtraction and division. Added X15 to "clobber" for FP sub/div Added FP constants Added separate FP test in gc/testdata Change-Id: Ifa60dbad948a40011b478d9605862c4b0cc9134c Reviewed-on: https://go-review.googlesource.com/13612 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-12 16:38:11 -04:00
fpload = regInfo{inputs: []regMask{gpspsb, 0}, outputs: fponly}
fploadidx = regInfo{inputs: []regMask{gpspsb, gpsp, 0}, outputs: fponly}
fpstore = regInfo{inputs: []regMask{gpspsb, fp, 0}}
fpstoreidx = regInfo{inputs: []regMask{gpspsb, gpsp, fp, 0}}
[dev.ssa] cmd/compile: tidy up register setup No functional changes. The intent is just to make this easier to read and maintain. Change-Id: Iec207546482cd62bcb22eaae8efe5be6c4f15378 Reviewed-on: https://go-review.googlesource.com/13284 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-06 09:34:54 -07:00
)
[dev.ssa] cmd/compile/internal/ssa: New register allocator Implement a global (whole function) register allocator. This replaces the local (per basic block) register allocator. Clobbering of registers by instructions is handled properly. A separate change will add the correct clobbers to all the instructions. Change-Id: I38ce4dc7dccb8303c1c0e0295fe70247b0a3f2ea Reviewed-on: https://go-review.googlesource.com/13622 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com> Reviewed-by: Todd Neal <todd@tneal.org>
2015-08-11 12:51:33 -07:00
// TODO: most ops clobber flags
[dev.ssa] cmd/compile/internal/ssa: autogenerate opcodes Revamp autogeneration. Get rid of gogenerate commands, they are more trouble than they are worth. (If the code won't compile, gogenerate doesn't work.) Generate opcode enums & tables. This means we only have to specify opcodes in one place instead of two. Add arch prefixes to opcodes so they will be globally unique. Change-Id: I175d0a89b701b2377bbe699f3756731b7c9f5a9f Reviewed-on: https://go-review.googlesource.com/10812 Reviewed-by: Alan Donovan <adonovan@google.com>
2015-06-06 16:03:33 -07:00
// Suffixes encode the bit width of various instructions.
// Q = 64 bit, L = 32 bit, W = 16 bit, B = 8 bit
// TODO: 2-address instructions. Mark ops as needing matching input/output regs.
var AMD64ops = []opData{
[dev.ssa] cmd/compile: first unoptimized cut at adding FP support Added F32 and F64 load, store, and addition. Added F32 and F64 multiply. Added F32 and F64 subtraction and division. Added X15 to "clobber" for FP sub/div Added FP constants Added separate FP test in gc/testdata Change-Id: Ifa60dbad948a40011b478d9605862c4b0cc9134c Reviewed-on: https://go-review.googlesource.com/13612 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-12 16:38:11 -04:00
// fp ops
{name: "ADDSS", reg: fp21, asm: "ADDSS"}, // fp32 add
{name: "ADDSD", reg: fp21, asm: "ADDSD"}, // fp64 add
{name: "SUBSS", reg: fp21x15, asm: "SUBSS"}, // fp32 sub
{name: "SUBSD", reg: fp21x15, asm: "SUBSD"}, // fp64 sub
{name: "MULSS", reg: fp21, asm: "MULSS"}, // fp32 mul
{name: "MULSD", reg: fp21, asm: "MULSD"}, // fp64 mul
{name: "DIVSS", reg: fp21x15, asm: "DIVSS"}, // fp32 div
{name: "DIVSD", reg: fp21x15, asm: "DIVSD"}, // fp64 div
{name: "MOVSSload", reg: fpload, asm: "MOVSS"}, // fp32 load
{name: "MOVSDload", reg: fpload, asm: "MOVSD"}, // fp64 load
{name: "MOVSSconst", reg: fp01, asm: "MOVSS"}, // fp32 constant
{name: "MOVSDconst", reg: fp01, asm: "MOVSD"}, // fp64 constant
{name: "MOVSSloadidx4", reg: fploadidx, asm: "MOVSS"}, // fp32 load
{name: "MOVSDloadidx8", reg: fploadidx, asm: "MOVSD"}, // fp64 load
{name: "MOVSSstore", reg: fpstore, asm: "MOVSS"}, // fp32 store
{name: "MOVSDstore", reg: fpstore, asm: "MOVSD"}, // fp64 store
{name: "MOVSSstoreidx4", reg: fpstoreidx, asm: "MOVSS"}, // fp32 indexed by 4i store
{name: "MOVSDstoreidx8", reg: fpstoreidx, asm: "MOVSD"}, // fp64 indexed by 8i store
[dev.ssa] cmd/compile/internal/ssa: implement lots of small (<8byte) ops. Lots and lots of ops! Also XOR for good measure. Add a pass to the compiler generator to check that all of the architecture-specific opcodes are handled by genValue. We will catch any missing ones if we come across them during compilation, but probably better to catch them statically. Change-Id: Ic4adfbec55c8257f88117bc732fa664486262868 Reviewed-on: https://go-review.googlesource.com/12813 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2015-07-28 16:04:50 -07:00
// binary ops
[dev.ssa] cmd/compile: clean up zeroing. Use duffzero when appropriate. Change-Id: I4deb03340e87f43179d5e22bf81843c17b5581fc Reviewed-on: https://go-review.googlesource.com/14756 Reviewed-by: David Chase <drchase@google.com>
2015-09-18 18:23:34 -07:00
{name: "ADDQ", reg: gp21, asm: "ADDQ"}, // arg0 + arg1
{name: "ADDL", reg: gp21, asm: "ADDL"}, // arg0 + arg1
{name: "ADDW", reg: gp21, asm: "ADDW"}, // arg0 + arg1
{name: "ADDB", reg: gp21, asm: "ADDB"}, // arg0 + arg1
{name: "ADDQconst", reg: gp11, asm: "ADDQ", typ: "UInt64"}, // arg0 + auxint
{name: "ADDLconst", reg: gp11, asm: "ADDL"}, // arg0 + auxint
{name: "ADDWconst", reg: gp11, asm: "ADDW"}, // arg0 + auxint
{name: "ADDBconst", reg: gp11, asm: "ADDB"}, // arg0 + auxint
[dev.ssa] cmd/compile/internal/ssa: implement lots of small (<8byte) ops. Lots and lots of ops! Also XOR for good measure. Add a pass to the compiler generator to check that all of the architecture-specific opcodes are handled by genValue. We will catch any missing ones if we come across them during compilation, but probably better to catch them statically. Change-Id: Ic4adfbec55c8257f88117bc732fa664486262868 Reviewed-on: https://go-review.googlesource.com/12813 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2015-07-28 16:04:50 -07:00
{name: "SUBQ", reg: gp21, asm: "SUBQ"}, // arg0 - arg1
{name: "SUBL", reg: gp21, asm: "SUBL"}, // arg0 - arg1
{name: "SUBW", reg: gp21, asm: "SUBW"}, // arg0 - arg1
{name: "SUBB", reg: gp21, asm: "SUBB"}, // arg0 - arg1
{name: "SUBQconst", reg: gp11, asm: "SUBQ"}, // arg0 - auxint
{name: "SUBLconst", reg: gp11, asm: "SUBL"}, // arg0 - auxint
{name: "SUBWconst", reg: gp11, asm: "SUBW"}, // arg0 - auxint
{name: "SUBBconst", reg: gp11, asm: "SUBB"}, // arg0 - auxint
[dev.ssa] cmd/compile/internal/ssa: Fix bootstrap of ssa codegen The cmd/compile/internal/ssa/gen directory can't depend on cmd/internal/gc because that package doesn't exist in go1.4. Use strings instead of constants from that package. The asm fields seem somewhat redundant to the opcode names we conventionally use. Maybe we can just trim the lowercase from the end of the op name? At least by default? Change-Id: I96e8cda44833763951709e2721588fbd34580989 Reviewed-on: https://go-review.googlesource.com/11129 Reviewed-by: Michael Matloob <michaelmatloob@gmail.com>
2015-06-16 13:33:32 -07:00
{name: "MULQ", reg: gp21, asm: "IMULQ"}, // arg0 * arg1
[dev.ssa] cmd/compile/internal/ssa: implement lots of small (<8byte) ops. Lots and lots of ops! Also XOR for good measure. Add a pass to the compiler generator to check that all of the architecture-specific opcodes are handled by genValue. We will catch any missing ones if we come across them during compilation, but probably better to catch them statically. Change-Id: Ic4adfbec55c8257f88117bc732fa664486262868 Reviewed-on: https://go-review.googlesource.com/12813 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2015-07-28 16:04:50 -07:00
{name: "MULL", reg: gp21, asm: "IMULL"}, // arg0 * arg1
{name: "MULW", reg: gp21, asm: "IMULW"}, // arg0 * arg1
[dev.ssa] cmd/compile/internal/ssa/gen: fold Mul8 properly. Mul8 is lowered to MULW, but the rules for constant folding do not handle the fact that the operands are int8. Change-Id: I2c336686d86249393a8079a471c6ff74e6228f3d Reviewed-on: https://go-review.googlesource.com/13642 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-14 13:23:11 +02:00
{name: "MULB", reg: gp21, asm: "IMULW"}, // arg0 * arg1
[dev.ssa] cmd/compile/internal/ssa: Fix bootstrap of ssa codegen The cmd/compile/internal/ssa/gen directory can't depend on cmd/internal/gc because that package doesn't exist in go1.4. Use strings instead of constants from that package. The asm fields seem somewhat redundant to the opcode names we conventionally use. Maybe we can just trim the lowercase from the end of the op name? At least by default? Change-Id: I96e8cda44833763951709e2721588fbd34580989 Reviewed-on: https://go-review.googlesource.com/11129 Reviewed-by: Michael Matloob <michaelmatloob@gmail.com>
2015-06-16 13:33:32 -07:00
{name: "MULQconst", reg: gp11, asm: "IMULQ"}, // arg0 * auxint
[dev.ssa] cmd/compile/internal/ssa: implement lots of small (<8byte) ops. Lots and lots of ops! Also XOR for good measure. Add a pass to the compiler generator to check that all of the architecture-specific opcodes are handled by genValue. We will catch any missing ones if we come across them during compilation, but probably better to catch them statically. Change-Id: Ic4adfbec55c8257f88117bc732fa664486262868 Reviewed-on: https://go-review.googlesource.com/12813 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2015-07-28 16:04:50 -07:00
{name: "MULLconst", reg: gp11, asm: "IMULL"}, // arg0 * auxint
{name: "MULWconst", reg: gp11, asm: "IMULW"}, // arg0 * auxint
[dev.ssa] cmd/compile/internal/ssa/gen: fold Mul8 properly. Mul8 is lowered to MULW, but the rules for constant folding do not handle the fact that the operands are int8. Change-Id: I2c336686d86249393a8079a471c6ff74e6228f3d Reviewed-on: https://go-review.googlesource.com/13642 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-14 13:23:11 +02:00
{name: "MULBconst", reg: gp11, asm: "IMULW"}, // arg0 * auxint
[dev.ssa] cmd/compile/internal/ssa: implement lots of small (<8byte) ops. Lots and lots of ops! Also XOR for good measure. Add a pass to the compiler generator to check that all of the architecture-specific opcodes are handled by genValue. We will catch any missing ones if we come across them during compilation, but probably better to catch them statically. Change-Id: Ic4adfbec55c8257f88117bc732fa664486262868 Reviewed-on: https://go-review.googlesource.com/12813 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2015-07-28 16:04:50 -07:00
[dev.ssa] cmd/compile/internal/ssa: implement OHMUL Adds support for high multiply which is used by the frontend when rewriting const division. The frontend currently only does this for 8, 16, and 32 bit integer arithmetic. Change-Id: I9b6c6018f3be827a50ee6c185454ebc79b3094c8 Reviewed-on: https://go-review.googlesource.com/13696 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-18 19:14:47 -05:00
{name: "HMULL", reg: gp11hmul, asm: "IMULL"}, // (arg0 * arg1) >> width
{name: "HMULW", reg: gp11hmul, asm: "IMULW"}, // (arg0 * arg1) >> width
{name: "HMULB", reg: gp11hmul, asm: "IMULB"}, // (arg0 * arg1) >> width
{name: "HMULLU", reg: gp11hmul, asm: "MULL"}, // (arg0 * arg1) >> width
{name: "HMULWU", reg: gp11hmul, asm: "MULW"}, // (arg0 * arg1) >> width
{name: "HMULBU", reg: gp11hmul, asm: "MULB"}, // (arg0 * arg1) >> width
[dev.ssa] cmd/compile/internal/ssa: implement ODIV Implement integer division for non-consts. Change-Id: If40cbde20e5f0ebb9993064def7be468e4eca076 Reviewed-on: https://go-review.googlesource.com/13644 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-17 17:46:06 -05:00
{name: "DIVQ", reg: gp11div, asm: "IDIVQ"}, // arg0 / arg1
{name: "DIVL", reg: gp11div, asm: "IDIVL"}, // arg0 / arg1
{name: "DIVW", reg: gp11div, asm: "IDIVW"}, // arg0 / arg1
{name: "DIVQU", reg: gp11div, asm: "DIVQ"}, // arg0 / arg1
{name: "DIVLU", reg: gp11div, asm: "DIVL"}, // arg0 / arg1
{name: "DIVWU", reg: gp11div, asm: "DIVW"}, // arg0 / arg1
[dev.ssa] cmd/compile/internal/ssa: implement OMOD Change-Id: Iec954c4daefef4ab3fa2c98bfb2c70b2dea8dffb Reviewed-on: https://go-review.googlesource.com/13743 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-18 19:51:44 -05:00
{name: "MODQ", reg: gp11mod, asm: "IDIVQ"}, // arg0 % arg1
{name: "MODL", reg: gp11mod, asm: "IDIVL"}, // arg0 % arg1
{name: "MODW", reg: gp11mod, asm: "IDIVW"}, // arg0 % arg1
{name: "MODQU", reg: gp11mod, asm: "DIVQ"}, // arg0 % arg1
{name: "MODLU", reg: gp11mod, asm: "DIVL"}, // arg0 % arg1
{name: "MODWU", reg: gp11mod, asm: "DIVW"}, // arg0 % arg1
[dev.ssa] cmd/compile/internal/ssa: implement lots of small (<8byte) ops. Lots and lots of ops! Also XOR for good measure. Add a pass to the compiler generator to check that all of the architecture-specific opcodes are handled by genValue. We will catch any missing ones if we come across them during compilation, but probably better to catch them statically. Change-Id: Ic4adfbec55c8257f88117bc732fa664486262868 Reviewed-on: https://go-review.googlesource.com/12813 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2015-07-28 16:04:50 -07:00
{name: "ANDQ", reg: gp21, asm: "ANDQ"}, // arg0 & arg1
{name: "ANDL", reg: gp21, asm: "ANDL"}, // arg0 & arg1
{name: "ANDW", reg: gp21, asm: "ANDW"}, // arg0 & arg1
{name: "ANDB", reg: gp21, asm: "ANDB"}, // arg0 & arg1
{name: "ANDQconst", reg: gp11, asm: "ANDQ"}, // arg0 & auxint
{name: "ANDLconst", reg: gp11, asm: "ANDL"}, // arg0 & auxint
{name: "ANDWconst", reg: gp11, asm: "ANDW"}, // arg0 & auxint
{name: "ANDBconst", reg: gp11, asm: "ANDB"}, // arg0 & auxint
{name: "ORQ", reg: gp21, asm: "ORQ"}, // arg0 | arg1
{name: "ORL", reg: gp21, asm: "ORL"}, // arg0 | arg1
{name: "ORW", reg: gp21, asm: "ORW"}, // arg0 | arg1
{name: "ORB", reg: gp21, asm: "ORB"}, // arg0 | arg1
{name: "ORQconst", reg: gp11, asm: "ORQ"}, // arg0 | auxint
{name: "ORLconst", reg: gp11, asm: "ORL"}, // arg0 | auxint
{name: "ORWconst", reg: gp11, asm: "ORW"}, // arg0 | auxint
{name: "ORBconst", reg: gp11, asm: "ORB"}, // arg0 | auxint
[dev.ssa] cmd/compile/internal/ssa: Complete 64-bit shifts Implement correct Go shifts. Allow multi-line rewrite rules. Fix offset & alignment in stack alloc. Change-Id: I0ae9e522c83df9205bbe4ab94bc0e43d16dace58 Reviewed-on: https://go-review.googlesource.com/10891 Reviewed-by: Keith Randall <khr@golang.org>
2015-06-10 10:39:57 -07:00
[dev.ssa] cmd/compile/internal/ssa: implement lots of small (<8byte) ops. Lots and lots of ops! Also XOR for good measure. Add a pass to the compiler generator to check that all of the architecture-specific opcodes are handled by genValue. We will catch any missing ones if we come across them during compilation, but probably better to catch them statically. Change-Id: Ic4adfbec55c8257f88117bc732fa664486262868 Reviewed-on: https://go-review.googlesource.com/12813 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2015-07-28 16:04:50 -07:00
{name: "XORQ", reg: gp21, asm: "XORQ"}, // arg0 ^ arg1
{name: "XORL", reg: gp21, asm: "XORL"}, // arg0 ^ arg1
{name: "XORW", reg: gp21, asm: "XORW"}, // arg0 ^ arg1
{name: "XORB", reg: gp21, asm: "XORB"}, // arg0 ^ arg1
{name: "XORQconst", reg: gp11, asm: "XORQ"}, // arg0 ^ auxint
{name: "XORLconst", reg: gp11, asm: "XORL"}, // arg0 ^ auxint
{name: "XORWconst", reg: gp11, asm: "XORW"}, // arg0 ^ auxint
{name: "XORBconst", reg: gp11, asm: "XORB"}, // arg0 ^ auxint
[dev.ssa] cmd/compile/internal/ssa: autogenerate opcodes Revamp autogeneration. Get rid of gogenerate commands, they are more trouble than they are worth. (If the code won't compile, gogenerate doesn't work.) Generate opcode enums & tables. This means we only have to specify opcodes in one place instead of two. Add arch prefixes to opcodes so they will be globally unique. Change-Id: I175d0a89b701b2377bbe699f3756731b7c9f5a9f Reviewed-on: https://go-review.googlesource.com/10812 Reviewed-by: Alan Donovan <adonovan@google.com>
2015-06-06 16:03:33 -07:00
[dev.ssa] cmd/compile/internal/ssa: allow ops to have a default type Specifying types in rewrites for all subexpressions gets verbose quickly. Allow opcodes to specify a default type which is used when none is supplied explicitly. Provide default types for a few easy opcodes. There are probably more we can do, but this is a good start. Change-Id: Iedc2a1a423cc3e2d4472640433982f9aa76a9f18 Reviewed-on: https://go-review.googlesource.com/14128 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2015-09-01 09:16:58 -07:00
{name: "CMPQ", reg: gp2flags, asm: "CMPQ", typ: "Flags"}, // arg0 compare to arg1
{name: "CMPL", reg: gp2flags, asm: "CMPL", typ: "Flags"}, // arg0 compare to arg1
{name: "CMPW", reg: gp2flags, asm: "CMPW", typ: "Flags"}, // arg0 compare to arg1
{name: "CMPB", reg: gp2flags, asm: "CMPB", typ: "Flags"}, // arg0 compare to arg1
{name: "CMPQconst", reg: gp1flags, asm: "CMPQ", typ: "Flags"}, // arg0 compare to auxint
{name: "CMPLconst", reg: gp1flags, asm: "CMPL", typ: "Flags"}, // arg0 compare to auxint
{name: "CMPWconst", reg: gp1flags, asm: "CMPW", typ: "Flags"}, // arg0 compare to auxint
{name: "CMPBconst", reg: gp1flags, asm: "CMPB", typ: "Flags"}, // arg0 compare to auxint
[dev.ssa] cmd/compile/internal/ssa/gen: implement all bit sizes for Eq and Neq Change-Id: I2c5c75153493b5dd3f1a743e5edf04403e83b31b Reviewed-on: https://go-review.googlesource.com/12474 Reviewed-by: Keith Randall <khr@golang.org> Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2015-07-21 18:06:15 +02:00
[dev.ssa] cmd/compile/internal/ssa: allow ops to have a default type Specifying types in rewrites for all subexpressions gets verbose quickly. Allow opcodes to specify a default type which is used when none is supplied explicitly. Provide default types for a few easy opcodes. There are probably more we can do, but this is a good start. Change-Id: Iedc2a1a423cc3e2d4472640433982f9aa76a9f18 Reviewed-on: https://go-review.googlesource.com/14128 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2015-09-01 09:16:58 -07:00
{name: "UCOMISS", reg: fp2flags, asm: "UCOMISS", typ: "Flags"}, // arg0 compare to arg1, f32
{name: "UCOMISD", reg: fp2flags, asm: "UCOMISD", typ: "Flags"}, // arg0 compare to arg1, f64
[dev.ssa] cmd/compile: add FP comparison ops Basic ops, no particular optimization in the pattern matching yet (e.g. x!=x for Nan detection, x cmp constant, etc.) Change-Id: I0043564081d6dc0eede876c4a9eb3c33cbd1521c Reviewed-on: https://go-review.googlesource.com/13704 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-18 14:39:26 -04:00
[dev.ssa] cmd/compile/internal/ssa: allow ops to have a default type Specifying types in rewrites for all subexpressions gets verbose quickly. Allow opcodes to specify a default type which is used when none is supplied explicitly. Provide default types for a few easy opcodes. There are probably more we can do, but this is a good start. Change-Id: Iedc2a1a423cc3e2d4472640433982f9aa76a9f18 Reviewed-on: https://go-review.googlesource.com/14128 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2015-09-01 09:16:58 -07:00
{name: "TESTQ", reg: gp2flags, asm: "TESTQ", typ: "Flags"}, // (arg0 & arg1) compare to 0
{name: "TESTL", reg: gp2flags, asm: "TESTL", typ: "Flags"}, // (arg0 & arg1) compare to 0
{name: "TESTW", reg: gp2flags, asm: "TESTW", typ: "Flags"}, // (arg0 & arg1) compare to 0
{name: "TESTB", reg: gp2flags, asm: "TESTB", typ: "Flags"}, // (arg0 & arg1) compare to 0
{name: "TESTQconst", reg: gp1flags, asm: "TESTQ", typ: "Flags"}, // (arg0 & auxint) compare to 0
{name: "TESTLconst", reg: gp1flags, asm: "TESTL", typ: "Flags"}, // (arg0 & auxint) compare to 0
{name: "TESTWconst", reg: gp1flags, asm: "TESTW", typ: "Flags"}, // (arg0 & auxint) compare to 0
{name: "TESTBconst", reg: gp1flags, asm: "TESTB", typ: "Flags"}, // (arg0 & auxint) compare to 0
[dev.ssa] cmd/compile/internal/ssa: implement lots of small (<8byte) ops. Lots and lots of ops! Also XOR for good measure. Add a pass to the compiler generator to check that all of the architecture-specific opcodes are handled by genValue. We will catch any missing ones if we come across them during compilation, but probably better to catch them statically. Change-Id: Ic4adfbec55c8257f88117bc732fa664486262868 Reviewed-on: https://go-review.googlesource.com/12813 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2015-07-28 16:04:50 -07:00
{name: "SHLQ", reg: gp21shift, asm: "SHLQ"}, // arg0 << arg1, shift amount is mod 64
{name: "SHLL", reg: gp21shift, asm: "SHLL"}, // arg0 << arg1, shift amount is mod 32
{name: "SHLW", reg: gp21shift, asm: "SHLW"}, // arg0 << arg1, shift amount is mod 32
{name: "SHLB", reg: gp21shift, asm: "SHLB"}, // arg0 << arg1, shift amount is mod 32
{name: "SHLQconst", reg: gp11, asm: "SHLQ"}, // arg0 << auxint, shift amount 0-63
{name: "SHLLconst", reg: gp11, asm: "SHLL"}, // arg0 << auxint, shift amount 0-31
{name: "SHLWconst", reg: gp11, asm: "SHLW"}, // arg0 << auxint, shift amount 0-31
{name: "SHLBconst", reg: gp11, asm: "SHLB"}, // arg0 << auxint, shift amount 0-31
// Note: x86 is weird, the 16 and 8 byte shifts still use all 5 bits of shift amount!
{name: "SHRQ", reg: gp21shift, asm: "SHRQ"}, // unsigned arg0 >> arg1, shift amount is mod 64
{name: "SHRL", reg: gp21shift, asm: "SHRL"}, // unsigned arg0 >> arg1, shift amount is mod 32
{name: "SHRW", reg: gp21shift, asm: "SHRW"}, // unsigned arg0 >> arg1, shift amount is mod 32
{name: "SHRB", reg: gp21shift, asm: "SHRB"}, // unsigned arg0 >> arg1, shift amount is mod 32
{name: "SHRQconst", reg: gp11, asm: "SHRQ"}, // unsigned arg0 >> auxint, shift amount 0-63
{name: "SHRLconst", reg: gp11, asm: "SHRL"}, // unsigned arg0 >> auxint, shift amount 0-31
{name: "SHRWconst", reg: gp11, asm: "SHRW"}, // unsigned arg0 >> auxint, shift amount 0-31
{name: "SHRBconst", reg: gp11, asm: "SHRB"}, // unsigned arg0 >> auxint, shift amount 0-31
{name: "SARQ", reg: gp21shift, asm: "SARQ"}, // signed arg0 >> arg1, shift amount is mod 64
{name: "SARL", reg: gp21shift, asm: "SARL"}, // signed arg0 >> arg1, shift amount is mod 32
{name: "SARW", reg: gp21shift, asm: "SARW"}, // signed arg0 >> arg1, shift amount is mod 32
{name: "SARB", reg: gp21shift, asm: "SARB"}, // signed arg0 >> arg1, shift amount is mod 32
{name: "SARQconst", reg: gp11, asm: "SARQ"}, // signed arg0 >> auxint, shift amount 0-63
{name: "SARLconst", reg: gp11, asm: "SARL"}, // signed arg0 >> auxint, shift amount 0-31
{name: "SARWconst", reg: gp11, asm: "SARW"}, // signed arg0 >> auxint, shift amount 0-31
{name: "SARBconst", reg: gp11, asm: "SARB"}, // signed arg0 >> auxint, shift amount 0-31
[dev.ssa] cmd/compile: add support for LROT, and tests Hardcoded the limit on constants only allowed. Change-Id: Idb9b07b4871db7a752a79e492671e9b41207b956 Reviewed-on: https://go-review.googlesource.com/13257 Reviewed-by: Keith Randall <khr@golang.org> Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2015-08-05 22:11:14 -04:00
{name: "ROLQconst", reg: gp11, asm: "ROLQ"}, // arg0 rotate left auxint, rotate amount 0-63
{name: "ROLLconst", reg: gp11, asm: "ROLL"}, // arg0 rotate left auxint, rotate amount 0-31
{name: "ROLWconst", reg: gp11, asm: "ROLW"}, // arg0 rotate left auxint, rotate amount 0-15
{name: "ROLBconst", reg: gp11, asm: "ROLB"}, // arg0 rotate left auxint, rotate amount 0-7
[dev.ssa] cmd/compile/internal/ssa: implement lots of small (<8byte) ops. Lots and lots of ops! Also XOR for good measure. Add a pass to the compiler generator to check that all of the architecture-specific opcodes are handled by genValue. We will catch any missing ones if we come across them during compilation, but probably better to catch them statically. Change-Id: Ic4adfbec55c8257f88117bc732fa664486262868 Reviewed-on: https://go-review.googlesource.com/12813 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2015-07-28 16:04:50 -07:00
// unary ops
{name: "NEGQ", reg: gp11, asm: "NEGQ"}, // -arg0
{name: "NEGL", reg: gp11, asm: "NEGL"}, // -arg0
{name: "NEGW", reg: gp11, asm: "NEGW"}, // -arg0
{name: "NEGB", reg: gp11, asm: "NEGB"}, // -arg0
[dev.ssa] cmd/compile/internal/ssa: autogenerate opcodes Revamp autogeneration. Get rid of gogenerate commands, they are more trouble than they are worth. (If the code won't compile, gogenerate doesn't work.) Generate opcode enums & tables. This means we only have to specify opcodes in one place instead of two. Add arch prefixes to opcodes so they will be globally unique. Change-Id: I175d0a89b701b2377bbe699f3756731b7c9f5a9f Reviewed-on: https://go-review.googlesource.com/10812 Reviewed-by: Alan Donovan <adonovan@google.com>
2015-06-06 16:03:33 -07:00
[dev.ssa] cmd/compile/internal/ssa: fix shift operations Convert shift ops to also encode the size of the shift amount. Change signed right shift from using CMOV to using bit twiddles. It is a little bit better (5 instructions instead of 4, but fewer bytes and slightly faster code). It's also a bit faster than the 4-instruction branch version, even with a very predictable branch. As tested on my machine, YMMV. Implement OCOM while we are here. Change-Id: I8ca12dd62fae5d626dc0e6da5d4bbd34fd9640d2 Reviewed-on: https://go-review.googlesource.com/12867 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2015-07-29 17:07:09 -07:00
{name: "NOTQ", reg: gp11, asm: "NOTQ"}, // ^arg0
{name: "NOTL", reg: gp11, asm: "NOTL"}, // ^arg0
{name: "NOTW", reg: gp11, asm: "NOTW"}, // ^arg0
{name: "NOTB", reg: gp11, asm: "NOTB"}, // ^arg0
[dev.ssa] cmd/compile/internal/ssa: implement OSQRT Change-Id: Iec61ca1bdc064c29ceca6d47f600d5643d0a64dd Reviewed-on: https://go-review.googlesource.com/14533 Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
2015-09-12 13:26:57 -07:00
{name: "SQRTSD", reg: fp11, asm: "SQRTSD"}, // sqrt(arg0)
[dev.ssa] cmd/compile: tidy up register setup No functional changes. The intent is just to make this easier to read and maintain. Change-Id: Iec207546482cd62bcb22eaae8efe5be6c4f15378 Reviewed-on: https://go-review.googlesource.com/13284 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-06 09:34:54 -07:00
{name: "SBBQcarrymask", reg: flagsgp, asm: "SBBQ"}, // (int64)(-1) if carry is set, 0 if carry is clear.
{name: "SBBLcarrymask", reg: flagsgp, asm: "SBBL"}, // (int32)(-1) if carry is set, 0 if carry is clear.
[dev.ssa] cmd/compile/internal/ssa: fix shift operations Convert shift ops to also encode the size of the shift amount. Change signed right shift from using CMOV to using bit twiddles. It is a little bit better (5 instructions instead of 4, but fewer bytes and slightly faster code). It's also a bit faster than the 4-instruction branch version, even with a very predictable branch. As tested on my machine, YMMV. Implement OCOM while we are here. Change-Id: I8ca12dd62fae5d626dc0e6da5d4bbd34fd9640d2 Reviewed-on: https://go-review.googlesource.com/12867 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2015-07-29 17:07:09 -07:00
// Note: SBBW and SBBB are subsumed by SBBL
[dev.ssa] cmd/compile/internal/ssa: Complete 64-bit shifts Implement correct Go shifts. Allow multi-line rewrite rules. Fix offset & alignment in stack alloc. Change-Id: I0ae9e522c83df9205bbe4ab94bc0e43d16dace58 Reviewed-on: https://go-review.googlesource.com/10891 Reviewed-by: Keith Randall <khr@golang.org>
2015-06-10 10:39:57 -07:00
[dev.ssa] cmd/compile: SETcc instructions do not clobber flags This reduces the number of flags spilled during make.bash by > 90%. I am working (slowly) on the rest. Change-Id: I3c08ae228c33e2f726f615962996f0350c8d592b Reviewed-on: https://go-review.googlesource.com/13813 Reviewed-by: David Chase <drchase@google.com>
2015-08-21 10:16:35 -07:00
{name: "SETEQ", reg: readflags, asm: "SETEQ"}, // extract == condition from arg0
{name: "SETNE", reg: readflags, asm: "SETNE"}, // extract != condition from arg0
{name: "SETL", reg: readflags, asm: "SETLT"}, // extract signed < condition from arg0
{name: "SETLE", reg: readflags, asm: "SETLE"}, // extract signed <= condition from arg0
{name: "SETG", reg: readflags, asm: "SETGT"}, // extract signed > condition from arg0
{name: "SETGE", reg: readflags, asm: "SETGE"}, // extract signed >= condition from arg0
{name: "SETB", reg: readflags, asm: "SETCS"}, // extract unsigned < condition from arg0
{name: "SETBE", reg: readflags, asm: "SETLS"}, // extract unsigned <= condition from arg0
{name: "SETA", reg: readflags, asm: "SETHI"}, // extract unsigned > condition from arg0
{name: "SETAE", reg: readflags, asm: "SETCC"}, // extract unsigned >= condition from arg0
[dev.ssa] cmd/compile: add FP comparison ops Basic ops, no particular optimization in the pattern matching yet (e.g. x!=x for Nan detection, x cmp constant, etc.) Change-Id: I0043564081d6dc0eede876c4a9eb3c33cbd1521c Reviewed-on: https://go-review.googlesource.com/13704 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-18 14:39:26 -04:00
// Need different opcodes for floating point conditions because
// any comparison involving a NaN is always FALSE and thus
// the patterns for inverting conditions cannot be used.
{name: "SETEQF", reg: flagsgpax, asm: "SETEQ"}, // extract == condition from arg0
{name: "SETNEF", reg: flagsgpax, asm: "SETNE"}, // extract != condition from arg0
{name: "SETORD", reg: flagsgp, asm: "SETPC"}, // extract "ordered" (No Nan present) condition from arg0
{name: "SETNAN", reg: flagsgp, asm: "SETPS"}, // extract "unordered" (Nan present) condition from arg0
{name: "SETGF", reg: flagsgp, asm: "SETHI"}, // extract floating > condition from arg0
{name: "SETGEF", reg: flagsgp, asm: "SETCC"}, // extract floating >= condition from arg0
[dev.ssa] cmd/compile/internal/ssa: autogenerate opcodes Revamp autogeneration. Get rid of gogenerate commands, they are more trouble than they are worth. (If the code won't compile, gogenerate doesn't work.) Generate opcode enums & tables. This means we only have to specify opcodes in one place instead of two. Add arch prefixes to opcodes so they will be globally unique. Change-Id: I175d0a89b701b2377bbe699f3756731b7c9f5a9f Reviewed-on: https://go-review.googlesource.com/10812 Reviewed-by: Alan Donovan <adonovan@google.com>
2015-06-06 16:03:33 -07:00
[dev.ssa] cmd/compile: mark LEA and MOV instructions as not clobbering flags This further reduces the number of flags spills during make.bash by about 50%. Note that GetG is implemented by one or two MOVs, which is why it does not clobber flags. Change-Id: I6fede8c027b7dc340e00d1e15df1b87bf2b2d9ec Reviewed-on: https://go-review.googlesource.com/13843 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-22 09:52:36 -07:00
{name: "MOVBQSX", reg: gp11nf, asm: "MOVBQSX"}, // sign extend arg0 from int8 to int64
{name: "MOVBQZX", reg: gp11nf, asm: "MOVBQZX"}, // zero extend arg0 from int8 to int64
{name: "MOVWQSX", reg: gp11nf, asm: "MOVWQSX"}, // sign extend arg0 from int16 to int64
{name: "MOVWQZX", reg: gp11nf, asm: "MOVWQZX"}, // zero extend arg0 from int16 to int64
{name: "MOVLQSX", reg: gp11nf, asm: "MOVLQSX"}, // sign extend arg0 from int32 to int64
{name: "MOVLQZX", reg: gp11nf, asm: "MOVLQZX"}, // zero extend arg0 from int32 to int64
[dev.ssa] cmd/compile/internal/ssa: adds for 8,16,32 bit ints Change-Id: I33025a4a41fd91f6ee317d33a6eebf27fa00ab51 Reviewed-on: https://go-review.googlesource.com/11115 Reviewed-by: Keith Randall <khr@golang.org>
2015-06-14 11:38:46 -07:00
[dev.ssa] cmd/compile: disable xor clearing when flags must be preserved The x86 backend automatically rewrites MOV $0, AX to XOR AX, AX. That rewrite isn't ok when the flags register is live across the MOV. Keep track of which moves care about preserving flags, then disable this rewrite for them. On x86, Prog.Mark was being used to hold the length of the instruction. We already store that in Prog.Isize, so no need to store it in Prog.Mark also. This frees up Prog.Mark to hold a bitmask on x86 just like all the other architectures. Update #12405 Change-Id: Ibad8a8f41fc6222bec1e4904221887d3cc3ca029 Reviewed-on: https://go-review.googlesource.com/18861 Reviewed-by: David Chase <drchase@google.com> Reviewed-by: Russ Cox <rsc@golang.org>
2016-01-22 13:44:58 -08:00
{name: "MOVBconst", reg: gp01, asm: "MOVB", typ: "UInt8"}, // 8 low bits of auxint
{name: "MOVWconst", reg: gp01, asm: "MOVW", typ: "UInt16"}, // 16 low bits of auxint
{name: "MOVLconst", reg: gp01, asm: "MOVL", typ: "UInt32"}, // 32 low bits of auxint
{name: "MOVQconst", reg: gp01, asm: "MOVQ", typ: "UInt64"}, // auxint
[dev.ssa] cmd/compile/internal/ssa: Split OpConst into an OpConst8, OpConst16, ... Convert the polymorphic OpConst into monomorphic variants. Change-Id: I90bb8894fbac04ca5e5484ea260c131ef8b506fb Reviewed-on: https://go-review.googlesource.com/12798 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2015-07-28 14:19:20 -07:00
[dev.ssa] cmd/compile: truncate when converting floats to ints Modified to use the truncating conversion. Fixes reflect. Change-Id: I47bf3200abc2d2c662939a2a2351e2ff84168f4a Reviewed-on: https://go-review.googlesource.com/14167 Reviewed-by: David Chase <drchase@google.com>
2015-09-01 19:05:44 -05:00
{name: "CVTTSD2SL", reg: fpgp, asm: "CVTTSD2SL"}, // convert float64 to int32
{name: "CVTTSD2SQ", reg: fpgp, asm: "CVTTSD2SQ"}, // convert float64 to int64
{name: "CVTTSS2SL", reg: fpgp, asm: "CVTTSS2SL"}, // convert float32 to int32
{name: "CVTTSS2SQ", reg: fpgp, asm: "CVTTSS2SQ"}, // convert float32 to int64
{name: "CVTSL2SS", reg: gpfp, asm: "CVTSL2SS"}, // convert int32 to float32
{name: "CVTSL2SD", reg: gpfp, asm: "CVTSL2SD"}, // convert int32 to float64
{name: "CVTSQ2SS", reg: gpfp, asm: "CVTSQ2SS"}, // convert int64 to float32
{name: "CVTSQ2SD", reg: gpfp, asm: "CVTSQ2SD"}, // convert int64 to float64
{name: "CVTSD2SS", reg: fp11, asm: "CVTSD2SS"}, // convert float64 to float32
{name: "CVTSS2SD", reg: fp11, asm: "CVTSS2SD"}, // convert float32 to float64
[dev.ssa] cmd/compile: add [u]int and FP to FP conversions Change-Id: I8c17f706a3e0f1fa2d754bfb4ccd1f7a027cb3db Reviewed-on: https://go-review.googlesource.com/13744 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-20 15:14:20 -04:00
[dev.ssa] cmd/compile: add complex arithmetic Still to do: details, more testing corner cases. (e.g. negative zero) Includes small cleanups for previous CL. Note: complex division is currently done in the runtime, so the division code here is apparently not yet necessary and also not tested. Seems likely better to open code division and expose the widening/narrowing to optimization. Complex64 multiplication and division is done in wide format to avoid cancellation errors; for division, this also happens to be compatible with pre-SSA practice (which uses a single complex128 division function). It would-be-nice to widen for complex128 multiplication intermediates as well, but that is trickier to implement without a handy wider-precision format. Change-Id: I595a4300f68868fb7641852a54674c6b2b78855e Reviewed-on: https://go-review.googlesource.com/14028 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-28 14:24:10 -04:00
{name: "PXOR", reg: fp21, asm: "PXOR"}, // exclusive or, applied to X regs for float negation.
[dev.ssa] cmd/compile/internal/ssa: Split OpConst into an OpConst8, OpConst16, ... Convert the polymorphic OpConst into monomorphic variants. Change-Id: I90bb8894fbac04ca5e5484ea260c131ef8b506fb Reviewed-on: https://go-review.googlesource.com/12798 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2015-07-28 14:19:20 -07:00
{name: "LEAQ", reg: gp11sb}, // arg0 + auxint + offset encoded in aux
{name: "LEAQ1", reg: gp21sb}, // arg0 + arg1 + auxint
{name: "LEAQ2", reg: gp21sb}, // arg0 + 2*arg1 + auxint
{name: "LEAQ4", reg: gp21sb}, // arg0 + 4*arg1 + auxint
{name: "LEAQ8", reg: gp21sb}, // arg0 + 8*arg1 + auxint
[dev.ssa] cmd/compile/internal/ssa: autogenerate opcodes Revamp autogeneration. Get rid of gogenerate commands, they are more trouble than they are worth. (If the code won't compile, gogenerate doesn't work.) Generate opcode enums & tables. This means we only have to specify opcodes in one place instead of two. Add arch prefixes to opcodes so they will be globally unique. Change-Id: I175d0a89b701b2377bbe699f3756731b7c9f5a9f Reviewed-on: https://go-review.googlesource.com/10812 Reviewed-by: Alan Donovan <adonovan@google.com>
2015-06-06 16:03:33 -07:00
[dev.ssa] cmd/compile: make sure to keep offset and sym of MOV opcodes. MOVXload and MOVXstore opcodes have both an auxint offset and an aux offset (a symbol name, like a local or arg or global). Make sure we keep those values during rewrites. Change-Id: Ic9fd61bf295b5d1457784c281079a4fb38f7ad3b Reviewed-on: https://go-review.googlesource.com/13849 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2015-08-23 21:14:25 -07:00
// auxint+aux == add auxint and the offset of the symbol in aux (if any) to the effective address
[dev.ssa] cmd/compile: better copying Replace REP MOVSB with all the copying techniques used by the old compiler. Copy in chunks, DUFFCOPY, etc. Introduces MOVO opcodes and an Int128 type to move around 16 bytes at a time. Change-Id: I1e73e68ca1d8b3dd58bb4af2f4c9e5d9bf13a502 Reviewed-on: https://go-review.googlesource.com/16174 Reviewed-by: Todd Neal <todd@tneal.org> Run-TryBot: Keith Randall <khr@golang.org>
2015-10-21 17:18:07 -07:00
{name: "MOVBload", reg: gpload, asm: "MOVB", typ: "UInt8"}, // load byte from arg0+auxint+aux. arg1=mem
{name: "MOVBQSXload", reg: gpload, asm: "MOVBQSX"}, // ditto, extend to int64
{name: "MOVBQZXload", reg: gpload, asm: "MOVBQZX"}, // ditto, extend to uint64
{name: "MOVWload", reg: gpload, asm: "MOVW", typ: "UInt16"}, // load 2 bytes from arg0+auxint+aux. arg1=mem
{name: "MOVLload", reg: gpload, asm: "MOVL", typ: "UInt32"}, // load 4 bytes from arg0+auxint+aux. arg1=mem
{name: "MOVQload", reg: gpload, asm: "MOVQ", typ: "UInt64"}, // load 8 bytes from arg0+auxint+aux. arg1=mem
{name: "MOVQloadidx8", reg: gploadidx, asm: "MOVQ"}, // load 8 bytes from arg0+8*arg1+auxint+aux. arg2=mem
{name: "MOVBstore", reg: gpstore, asm: "MOVB", typ: "Mem"}, // store byte in arg1 to arg0+auxint+aux. arg2=mem
{name: "MOVWstore", reg: gpstore, asm: "MOVW", typ: "Mem"}, // store 2 bytes in arg1 to arg0+auxint+aux. arg2=mem
{name: "MOVLstore", reg: gpstore, asm: "MOVL", typ: "Mem"}, // store 4 bytes in arg1 to arg0+auxint+aux. arg2=mem
{name: "MOVQstore", reg: gpstore, asm: "MOVQ", typ: "Mem"}, // store 8 bytes in arg1 to arg0+auxint+aux. arg2=mem
{name: "MOVQstoreidx8", reg: gpstoreidx, asm: "MOVQ"}, // store 8 bytes in arg2 to arg0+8*arg1+auxint+aux. arg3=mem
{name: "MOVOload", reg: fpload, asm: "MOVUPS", typ: "Int128"}, // load 16 bytes from arg0+auxint+aux. arg1=mem
{name: "MOVOstore", reg: fpstore, asm: "MOVUPS", typ: "Mem"}, // store 16 bytes in arg1 to arg0+auxint+aux. arg2=mem
[dev.ssa] cmd/compile: clean up zeroing. Use duffzero when appropriate. Change-Id: I4deb03340e87f43179d5e22bf81843c17b5581fc Reviewed-on: https://go-review.googlesource.com/14756 Reviewed-by: David Chase <drchase@google.com>
2015-09-18 18:23:34 -07:00
[dev.ssa] cmd/compile: introduce storeconst ops Introduce opcodes that store a constant value. AuxInt now needs to hold both the value to be stored and the constant offset at which to store it. Introduce a StoreConst type to help encode/decode these parts to/from an AuxInt. Change-Id: I1631883abe035cff4b16368683e1eb3d2ccb674d Reviewed-on: https://go-review.googlesource.com/16170 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2015-10-21 13:13:56 -07:00
// For storeconst ops, the AuxInt field encodes both
// the value to store and an address offset of the store.
[dev.ssa] cmd/compile: prepare for some load+op combining Rename StoreConst to ValAndOff so we can use it for other ops. Make ValAndOff print nicely. Add some notes & checks related to my aborted attempt to implement combined CMP+load ops. Change-Id: I2f901d12d42bc5a82879af0334806aa184a97e27 Reviewed-on: https://go-review.googlesource.com/18947 Run-TryBot: David Chase <drchase@google.com> Reviewed-by: David Chase <drchase@google.com>
2016-01-26 15:47:08 -08:00
// Cast AuxInt to a ValAndOff to extract Val and Off fields.
{name: "MOVBstoreconst", reg: gpstoreconst, asm: "MOVB", typ: "Mem"}, // store low byte of ValAndOff(AuxInt).Val() to arg0+ValAndOff(AuxInt).Off()+aux. arg1=mem
[dev.ssa] cmd/compile: introduce storeconst ops Introduce opcodes that store a constant value. AuxInt now needs to hold both the value to be stored and the constant offset at which to store it. Introduce a StoreConst type to help encode/decode these parts to/from an AuxInt. Change-Id: I1631883abe035cff4b16368683e1eb3d2ccb674d Reviewed-on: https://go-review.googlesource.com/16170 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2015-10-21 13:13:56 -07:00
{name: "MOVWstoreconst", reg: gpstoreconst, asm: "MOVW", typ: "Mem"}, // store low 2 bytes of ...
{name: "MOVLstoreconst", reg: gpstoreconst, asm: "MOVL", typ: "Mem"}, // store low 4 bytes of ...
{name: "MOVQstoreconst", reg: gpstoreconst, asm: "MOVQ", typ: "Mem"}, // store 8 bytes of ...
[dev.ssa] cmd/compile: clean up zeroing. Use duffzero when appropriate. Change-Id: I4deb03340e87f43179d5e22bf81843c17b5581fc Reviewed-on: https://go-review.googlesource.com/14756 Reviewed-by: David Chase <drchase@google.com>
2015-09-18 18:23:34 -07:00
// arg0 = (duff-adjusted) pointer to start of memory to zero
// arg1 = value to store (will always be zero)
// arg2 = mem
// auxint = offset into duffzero code to start executing
// returns mem
{
name: "DUFFZERO",
reg: regInfo{
[dev.ssa] Merge remote-tracking branch 'origin/master' into mergebranch The only major fixup is that duffzero changed from 8-byte writes to 16-byte writes. Change-Id: I1762b74ce67a8e4b81c11568027cdb3572f7f87c
2015-10-19 13:56:55 -07:00
inputs: []regMask{buildReg("DI"), buildReg("X0")},
[dev.ssa] cmd/compile: clean up zeroing. Use duffzero when appropriate. Change-Id: I4deb03340e87f43179d5e22bf81843c17b5581fc Reviewed-on: https://go-review.googlesource.com/14756 Reviewed-by: David Chase <drchase@google.com>
2015-09-18 18:23:34 -07:00
clobbers: buildReg("DI FLAGS"),
},
},
[dev.ssa] cmd/compile: better copying Replace REP MOVSB with all the copying techniques used by the old compiler. Copy in chunks, DUFFCOPY, etc. Introduces MOVO opcodes and an Int128 type to move around 16 bytes at a time. Change-Id: I1e73e68ca1d8b3dd58bb4af2f4c9e5d9bf13a502 Reviewed-on: https://go-review.googlesource.com/16174 Reviewed-by: Todd Neal <todd@tneal.org> Run-TryBot: Keith Randall <khr@golang.org>
2015-10-21 17:18:07 -07:00
{name: "MOVOconst", reg: regInfo{nil, 0, []regMask{fp}}, typ: "Int128"},
[dev.ssa] cmd/compile: clean up zeroing. Use duffzero when appropriate. Change-Id: I4deb03340e87f43179d5e22bf81843c17b5581fc Reviewed-on: https://go-review.googlesource.com/14756 Reviewed-by: David Chase <drchase@google.com>
2015-09-18 18:23:34 -07:00
// arg0 = address of memory to zero
// arg1 = # of 8-byte words to zero
// arg2 = value to store (will always be zero)
// arg3 = mem
// returns mem
{
name: "REPSTOSQ",
reg: regInfo{
inputs: []regMask{buildReg("DI"), buildReg("CX"), buildReg("AX")},
clobbers: buildReg("DI CX FLAGS"),
},
},
[dev.ssa] cmd/compile: make sure to keep offset and sym of MOV opcodes. MOVXload and MOVXstore opcodes have both an auxint offset and an aux offset (a symbol name, like a local or arg or global). Make sure we keep those values during rewrites. Change-Id: Ic9fd61bf295b5d1457784c281079a4fb38f7ad3b Reviewed-on: https://go-review.googlesource.com/13849 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2015-08-23 21:14:25 -07:00
{name: "CALLstatic", reg: regInfo{clobbers: callerSave}}, // call static function aux.(*gc.Sym). arg0=mem, auxint=argsize, returns mem
{name: "CALLclosure", reg: regInfo{[]regMask{gpsp, buildReg("DX"), 0}, callerSave, nil}}, // call function via closure. arg0=codeptr, arg1=closure, arg2=mem, auxint=argsize, returns mem
[dev.ssa] cmd/compile/internal/gc: implement go and defer TODO: for now, just function calls. Do method and interface calls. Change-Id: Ib262dfa31cb753996cde899beaad4dc2e66705ac Reviewed-on: https://go-review.googlesource.com/14035 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2015-08-28 22:51:01 -07:00
{name: "CALLdefer", reg: regInfo{clobbers: callerSave}}, // call deferproc. arg0=mem, auxint=argsize, returns mem
{name: "CALLgo", reg: regInfo{clobbers: callerSave}}, // call newproc. arg0=mem, auxint=argsize, returns mem
[dev.ssa] cmd/compile/internal/ssa: complete call ops OCALLINTER, as well as ODEFER/OPROC with OCALLMETH/OCALLINTER. Move all the call logic to its own routine, a lot of the code is shared. Change-Id: Ieac59596165e434cc6d1d7b5e46b78957e9c5ed3 Reviewed-on: https://go-review.googlesource.com/14464 Reviewed-by: Todd Neal <todd@tneal.org> Reviewed-by: David Chase <drchase@google.com>
2015-09-09 23:56:59 -07:00
{name: "CALLinter", reg: regInfo{inputs: []regMask{gp}, clobbers: callerSave}}, // call fn by pointer. arg0=codeptr, arg1=mem, auxint=argsize, returns mem
[dev.ssa] cmd/compile/internal/ssa: add call opcodes Add calls, particularly closure calls. Reorg SSAable variable test for converting to SSA. Change-Id: Ia75c04295e6b0b040122f97e2381836a393b7f42 Reviewed-on: https://go-review.googlesource.com/10912 Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
2015-06-10 15:03:06 -07:00
[dev.ssa] cmd/compile: better copying Replace REP MOVSB with all the copying techniques used by the old compiler. Copy in chunks, DUFFCOPY, etc. Introduces MOVO opcodes and an Int128 type to move around 16 bytes at a time. Change-Id: I1e73e68ca1d8b3dd58bb4af2f4c9e5d9bf13a502 Reviewed-on: https://go-review.googlesource.com/16174 Reviewed-by: Todd Neal <todd@tneal.org> Run-TryBot: Keith Randall <khr@golang.org>
2015-10-21 17:18:07 -07:00
// arg0 = destination pointer
// arg1 = source pointer
// arg2 = mem
// auxint = offset from duffcopy symbol to call
// returns memory
{
name: "DUFFCOPY",
reg: regInfo{
inputs: []regMask{buildReg("DI"), buildReg("SI")},
[dev.ssa] cmd/compile: allow control values to be CSEd With the separate flagalloc pass, it should be fine to allow CSE of control values. The worst that can happen is that the comparison gets un-CSEd by flagalloc. Fix bug in flagalloc where flag restores were getting clobbered by rematerialization during register allocation. Change-Id: If476cf98b69973e8f1a8eb29441136dd12fab8ad Reviewed-on: https://go-review.googlesource.com/17760 Reviewed-by: David Chase <drchase@google.com> Run-TryBot: Keith Randall <khr@golang.org>
2015-12-11 14:59:01 -08:00
clobbers: buildReg("DI SI X0 FLAGS"), // uses X0 as a temporary
[dev.ssa] cmd/compile: better copying Replace REP MOVSB with all the copying techniques used by the old compiler. Copy in chunks, DUFFCOPY, etc. Introduces MOVO opcodes and an Int128 type to move around 16 bytes at a time. Change-Id: I1e73e68ca1d8b3dd58bb4af2f4c9e5d9bf13a502 Reviewed-on: https://go-review.googlesource.com/16174 Reviewed-by: Todd Neal <todd@tneal.org> Run-TryBot: Keith Randall <khr@golang.org>
2015-10-21 17:18:07 -07:00
},
},
// arg0 = destination pointer
// arg1 = source pointer
// arg2 = # of 8-byte words to copy
// arg3 = mem
// returns memory
{
name: "REPMOVSQ",
reg: regInfo{
inputs: []regMask{buildReg("DI"), buildReg("SI"), buildReg("CX")},
clobbers: buildReg("DI SI CX"),
},
},
[dev.ssa] cmd/compile/internal/ssa: autogenerate opcodes Revamp autogeneration. Get rid of gogenerate commands, they are more trouble than they are worth. (If the code won't compile, gogenerate doesn't work.) Generate opcode enums & tables. This means we only have to specify opcodes in one place instead of two. Add arch prefixes to opcodes so they will be globally unique. Change-Id: I175d0a89b701b2377bbe699f3756731b7c9f5a9f Reviewed-on: https://go-review.googlesource.com/10812 Reviewed-by: Alan Donovan <adonovan@google.com>
2015-06-06 16:03:33 -07:00
// (InvertFlags (CMPQ a b)) == (CMPQ b a)
// So if we want (SETL (CMPQ a b)) but we can't do that because a is a constant,
// then we do (SETL (InvertFlags (CMPQ b a))) instead.
// Rewrites will convert this to (SETG (CMPQ b a)).
// InvertFlags is a pseudo-op which can't appear in assembly output.
{name: "InvertFlags"}, // reverse direction of arg0
[dev.ssa] cmd/compile: make failed nil checks panic Introduce pseudo-ops PanicMem and LoweredPanicMem. PanicMem could be rewritten directly into MOVL during lowering, but then we couldn't log nil checks. With this change, runnable nil check tests pass: GOSSAPKG=main go run run.go -- nil*.go Compiler output nil check tests fail: GOSSAPKG=p go run run.go -- nil*.go This is due to several factors: * SSA has improved elimination of unnecessary nil checks. * SSA is missing elimination of implicit nil checks. * SSA is missing extra logging about why nil checks were removed. I'm not sure how best to resolve these failures, particularly in a world in which the two backends will live side by side for some time. For now, punt on the problem. Change-Id: Ib2ca6824551671f92e0e1800b036f5ca0905e2a3 Reviewed-on: https://go-review.googlesource.com/13474 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-11 09:47:45 -07:00
[dev.ssa] cmd/compile: implement OGETG Change-Id: I7ecf62cf399c710b4a617803c43e83fce09b8a7d Reviewed-on: https://go-review.googlesource.com/13585 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-12 11:22:16 -07:00
// Pseudo-ops
[dev.ssa] cmd/compile: getg needs a memory arg getg reads from memory, so it should really have a memory arg. It is critical in functions which call setg to make sure getg gets ordered correctly with setg. Change-Id: Ief4875421f741fc49c07b0e1f065ce2535232341 Reviewed-on: https://go-review.googlesource.com/16100 Run-TryBot: Keith Randall <khr@golang.org> Reviewed-by: David Chase <drchase@google.com> Run-TryBot: David Chase <drchase@google.com>
2015-10-19 18:54:40 -07:00
{name: "LoweredGetG", reg: gp01}, // arg0=mem
[dev.ssa] cmd/compile: addressed vars and closures Cleaned up first-block-in-function code. Added cases for |PHEAP for PPARAM and PAUTO. Made PPARAMOUT act more like PAUTO for purposes of address generation and vardef placement. Added cases for OCLOSUREVAR and Ops for getting closure pointer. Closure ops are scheduled at top of entry block to capture DX. Wrote test that seems to show proper behavior for addressed parameters, locals, and returns. Change-Id: Iee93ebf9e3d9f74cfb4d1c1da8038eb278d8a857 Reviewed-on: https://go-review.googlesource.com/14650 Reviewed-by: Keith Randall <khr@golang.org> Run-TryBot: David Chase <drchase@google.com>
2015-09-11 16:40:05 -04:00
// Scheduler ensures LoweredGetClosurePtr occurs only in entry block,
// and sorts it to the very beginning of the block to prevent other
// use of DX (the closure pointer)
{name: "LoweredGetClosurePtr", reg: regInfo{outputs: []regMask{buildReg("DX")}}},
[dev.ssa] cmd/compile: optimize nil checks Use faulting loads instead of test/jeq to do nil checks. Fold nil checks into a following load/store if possible. Makes binaries about 2% smaller. Change-Id: I54af0f0a93c853f37e34e0ce7e3f01dd2ac87f64 Reviewed-on: https://go-review.googlesource.com/16287 Reviewed-by: David Chase <drchase@google.com>
2015-10-23 19:12:49 -07:00
//arg0=ptr,arg1=mem, returns void. Faults if ptr is nil.
{name: "LoweredNilCheck", reg: regInfo{inputs: []regMask{gpsp}, clobbers: flags}},
[dev.ssa] cmd/compile: be safer about uintptr/unsafe.Pointer conversions Make sure that when a pointer value is live across a function call, we save it as a pointer. (And similarly a uintptr live across a function call should not be saved as a pointer.) Add a nasty test case. This is probably what is preventing the merge from master to dev.ssa. Signs point to something like this bug happening in mallocgc. Change-Id: Ib23fa1251b8d1c50d82c6a448cb4a4fc28219029 Reviewed-on: https://go-review.googlesource.com/16830 Run-TryBot: Keith Randall <khr@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: David Chase <drchase@google.com>
2015-11-10 15:35:36 -08:00
// MOVQconvert converts between pointers and integers.
// We have a special op for this so as to not confuse GC
// (particularly stack maps). It takes a memory arg so it
// gets correctly ordered with respect to GC safepoints.
// arg0=ptr/int arg1=mem, output=int/ptr
{name: "MOVQconvert", reg: gp11nf, asm: "MOVQ"},
[dev.ssa] cmd/compile: clean up comparisons Add new constant-flags opcodes. These can be generated from comparisons that we know the result of, like x&31 < 32. Constant-fold the constant-flags opcodes into all flag users. Reorder some CMPxconst args so they read in the comparison direction. Reorg deadcode removal a bit - it needs to remove the OpCopy ops it generates when strength-reducing Phi ops. So it needs to splice out all the dead blocks and do a copy elimination before it computes live values. Change-Id: Ie922602033592ad8212efe4345394973d3b94d9f Reviewed-on: https://go-review.googlesource.com/18267 Run-TryBot: Keith Randall <khr@golang.org> Reviewed-by: David Chase <drchase@google.com>
2016-01-05 14:56:26 -08:00
// Constant flag values. For any comparison, there are 5 possible
// outcomes: the three from the signed total order (<,==,>) and the
// three from the unsigned total order. The == cases overlap.
// Note: there's a sixth "unordered" outcome for floating-point
// comparisons, but we don't use such a beast yet.
// These ops are for temporary use by rewrite rules. They
// cannot appear in the generated assembly.
{name: "FlagEQ"}, // equal
{name: "FlagLT_ULT"}, // signed < and unsigned <
{name: "FlagLT_UGT"}, // signed < and unsigned >
{name: "FlagGT_UGT"}, // signed > and unsigned <
{name: "FlagGT_ULT"}, // signed > and unsigned >
[dev.ssa] cmd/compile/internal/ssa: autogenerate opcodes Revamp autogeneration. Get rid of gogenerate commands, they are more trouble than they are worth. (If the code won't compile, gogenerate doesn't work.) Generate opcode enums & tables. This means we only have to specify opcodes in one place instead of two. Add arch prefixes to opcodes so they will be globally unique. Change-Id: I175d0a89b701b2377bbe699f3756731b7c9f5a9f Reviewed-on: https://go-review.googlesource.com/10812 Reviewed-by: Alan Donovan <adonovan@google.com>
2015-06-06 16:03:33 -07:00
}
var AMD64blocks = []blockData{
{name: "EQ"},
{name: "NE"},
{name: "LT"},
{name: "LE"},
{name: "GT"},
{name: "GE"},
{name: "ULT"},
{name: "ULE"},
{name: "UGT"},
{name: "UGE"},
[dev.ssa] cmd/compile: add FP comparison ops Basic ops, no particular optimization in the pattern matching yet (e.g. x!=x for Nan detection, x cmp constant, etc.) Change-Id: I0043564081d6dc0eede876c4a9eb3c33cbd1521c Reviewed-on: https://go-review.googlesource.com/13704 Reviewed-by: Keith Randall <khr@golang.org>
2015-08-18 14:39:26 -04:00
{name: "EQF"},
{name: "NEF"},
{name: "ORD"}, // FP, ordered comparison (parity zero)
{name: "NAN"}, // FP, unordered comparison (parity one)
[dev.ssa] cmd/compile/internal/ssa: autogenerate opcodes Revamp autogeneration. Get rid of gogenerate commands, they are more trouble than they are worth. (If the code won't compile, gogenerate doesn't work.) Generate opcode enums & tables. This means we only have to specify opcodes in one place instead of two. Add arch prefixes to opcodes so they will be globally unique. Change-Id: I175d0a89b701b2377bbe699f3756731b7c9f5a9f Reviewed-on: https://go-review.googlesource.com/10812 Reviewed-by: Alan Donovan <adonovan@google.com>
2015-06-06 16:03:33 -07:00
}
[dev.ssa] cmd/compile/ssa: print reg names in generated code Change-Id: I6c6196449dd3d5e036d420fa7ae90feb0cf8d417 Reviewed-on: https://go-review.googlesource.com/10928 Reviewed-by: Keith Randall <khr@golang.org>
2015-06-11 15:52:08 -07:00
archs = append(archs, arch{"AMD64", AMD64ops, AMD64blocks, regNamesAMD64})
[dev.ssa] cmd/compile/internal/ssa: autogenerate opcodes Revamp autogeneration. Get rid of gogenerate commands, they are more trouble than they are worth. (If the code won't compile, gogenerate doesn't work.) Generate opcode enums & tables. This means we only have to specify opcodes in one place instead of two. Add arch prefixes to opcodes so they will be globally unique. Change-Id: I175d0a89b701b2377bbe699f3756731b7c9f5a9f Reviewed-on: https://go-review.googlesource.com/10812 Reviewed-by: Alan Donovan <adonovan@google.com>
2015-06-06 16:03:33 -07:00
}
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