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cmd/compile: funnel SSA Prog creation through SSAGenState
Step one in eliminating Prog-related globals. Passes toolstash-check -all. Updates #15756 Change-Id: I3b777fb5a7716f2d9da3067fbd94c28ca894a465 Reviewed-on: https://go-review.googlesource.com/38450 Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Matthew Dempsky <mdempsky@google.com>
This commit is contained in:
Josh Bleecher Snyder
parent
3b39f523e1
commit
0a94daa378
10 changed files with 721 additions and 717 deletions
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@ -86,11 +86,11 @@ func makeshift(reg int16, typ int64, s int64) shift {
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return shift(int64(reg&0xf) | typ | (s&31)<<7)
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}
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// genshift generates a Prog for r = r0 op (r1 shifted by s)
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func genshift(as obj.As, r0, r1, r int16, typ int64, s int64) *obj.Prog {
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p := gc.Prog(as)
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// genshift generates a Prog for r = r0 op (r1 shifted by n)
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func genshift(s *gc.SSAGenState, as obj.As, r0, r1, r int16, typ int64, n int64) *obj.Prog {
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p := s.Prog(as)
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p.From.Type = obj.TYPE_SHIFT
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p.From.Offset = int64(makeshift(r1, typ, s))
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p.From.Offset = int64(makeshift(r1, typ, n))
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p.Reg = r0
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if r != 0 {
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p.To.Type = obj.TYPE_REG
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@ -105,8 +105,8 @@ func makeregshift(r1 int16, typ int64, r2 int16) shift {
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}
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// genregshift generates a Prog for r = r0 op (r1 shifted by r2)
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func genregshift(as obj.As, r0, r1, r2, r int16, typ int64) *obj.Prog {
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p := gc.Prog(as)
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func genregshift(s *gc.SSAGenState, as obj.As, r0, r1, r2, r int16, typ int64) *obj.Prog {
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p := s.Prog(as)
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p.From.Type = obj.TYPE_SHIFT
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p.From.Offset = int64(makeregshift(r1, typ, r2))
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p.Reg = r0
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@ -139,7 +139,7 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
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panic("bad float size")
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}
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}
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p := gc.Prog(as)
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p := s.Prog(as)
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p.From.Type = obj.TYPE_REG
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p.From.Reg = x
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p.To.Type = obj.TYPE_REG
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@ -154,7 +154,7 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
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v.Fatalf("load flags not implemented: %v", v.LongString())
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return
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}
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p := gc.Prog(loadByType(v.Type))
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p := s.Prog(loadByType(v.Type))
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gc.AddrAuto(&p.From, v.Args[0])
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p.To.Type = obj.TYPE_REG
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p.To.Reg = v.Reg()
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@ -163,7 +163,7 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
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v.Fatalf("store flags not implemented: %v", v.LongString())
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return
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}
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p := gc.Prog(storeByType(v.Type))
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p := s.Prog(storeByType(v.Type))
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p.From.Type = obj.TYPE_REG
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p.From.Reg = v.Args[0].Reg()
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gc.AddrAuto(&p.To, v)
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@ -188,7 +188,7 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
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r := v.Reg()
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r1 := v.Args[0].Reg()
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r2 := v.Args[1].Reg()
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p := gc.Prog(v.Op.Asm())
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p := s.Prog(v.Op.Asm())
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p.From.Type = obj.TYPE_REG
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p.From.Reg = r2
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p.Reg = r1
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@ -199,7 +199,7 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
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r := v.Reg0()
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r1 := v.Args[0].Reg()
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r2 := v.Args[1].Reg()
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p := gc.Prog(v.Op.Asm())
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p := s.Prog(v.Op.Asm())
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p.Scond = arm.C_SBIT
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p.From.Type = obj.TYPE_REG
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p.From.Reg = r2
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@ -212,7 +212,7 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
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r := v.Reg()
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r1 := v.Args[0].Reg()
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r2 := v.Args[1].Reg()
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p := gc.Prog(v.Op.Asm())
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p := s.Prog(v.Op.Asm())
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p.From.Type = obj.TYPE_REG
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p.From.Reg = r2
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p.Reg = r1
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@ -227,14 +227,14 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
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r := v.Reg()
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r1 := v.Args[0].Reg()
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r2 := v.Args[1].Reg()
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p := gc.Prog(arm.ASRA)
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p := s.Prog(arm.ASRA)
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p.Scond = arm.C_SCOND_HS
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p.From.Type = obj.TYPE_CONST
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p.From.Offset = 31
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p.Reg = r1
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p.To.Type = obj.TYPE_REG
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p.To.Reg = r
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p = gc.Prog(arm.ASRA)
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p = s.Prog(arm.ASRA)
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p.Scond = arm.C_SCOND_LO
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p.From.Type = obj.TYPE_REG
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p.From.Reg = r2
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@ -254,7 +254,7 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
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ssa.OpARMSLLconst,
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ssa.OpARMSRLconst,
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ssa.OpARMSRAconst:
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p := gc.Prog(v.Op.Asm())
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p := s.Prog(v.Op.Asm())
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p.From.Type = obj.TYPE_CONST
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p.From.Offset = v.AuxInt
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p.Reg = v.Args[0].Reg()
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@ -263,7 +263,7 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
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case ssa.OpARMADDSconst,
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ssa.OpARMSUBSconst,
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ssa.OpARMRSBSconst:
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p := gc.Prog(v.Op.Asm())
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p := s.Prog(v.Op.Asm())
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p.Scond = arm.C_SBIT
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p.From.Type = obj.TYPE_CONST
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p.From.Offset = v.AuxInt
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@ -271,7 +271,7 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
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p.To.Type = obj.TYPE_REG
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p.To.Reg = v.Reg0()
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case ssa.OpARMSRRconst:
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genshift(arm.AMOVW, 0, v.Args[0].Reg(), v.Reg(), arm.SHIFT_RR, v.AuxInt)
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genshift(s, arm.AMOVW, 0, v.Args[0].Reg(), v.Reg(), arm.SHIFT_RR, v.AuxInt)
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case ssa.OpARMADDshiftLL,
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ssa.OpARMADCshiftLL,
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ssa.OpARMSUBshiftLL,
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@ -282,11 +282,11 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
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ssa.OpARMORshiftLL,
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ssa.OpARMXORshiftLL,
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ssa.OpARMBICshiftLL:
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genshift(v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm.SHIFT_LL, v.AuxInt)
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genshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm.SHIFT_LL, v.AuxInt)
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case ssa.OpARMADDSshiftLL,
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ssa.OpARMSUBSshiftLL,
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ssa.OpARMRSBSshiftLL:
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p := genshift(v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg0(), arm.SHIFT_LL, v.AuxInt)
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p := genshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg0(), arm.SHIFT_LL, v.AuxInt)
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p.Scond = arm.C_SBIT
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case ssa.OpARMADDshiftRL,
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ssa.OpARMADCshiftRL,
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@ -298,11 +298,11 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
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ssa.OpARMORshiftRL,
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ssa.OpARMXORshiftRL,
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ssa.OpARMBICshiftRL:
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genshift(v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm.SHIFT_LR, v.AuxInt)
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genshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm.SHIFT_LR, v.AuxInt)
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case ssa.OpARMADDSshiftRL,
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ssa.OpARMSUBSshiftRL,
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ssa.OpARMRSBSshiftRL:
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p := genshift(v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg0(), arm.SHIFT_LR, v.AuxInt)
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p := genshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg0(), arm.SHIFT_LR, v.AuxInt)
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p.Scond = arm.C_SBIT
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case ssa.OpARMADDshiftRA,
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ssa.OpARMADCshiftRA,
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@ -314,26 +314,26 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
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ssa.OpARMORshiftRA,
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ssa.OpARMXORshiftRA,
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ssa.OpARMBICshiftRA:
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genshift(v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm.SHIFT_AR, v.AuxInt)
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genshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm.SHIFT_AR, v.AuxInt)
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case ssa.OpARMADDSshiftRA,
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ssa.OpARMSUBSshiftRA,
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ssa.OpARMRSBSshiftRA:
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p := genshift(v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg0(), arm.SHIFT_AR, v.AuxInt)
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p := genshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg0(), arm.SHIFT_AR, v.AuxInt)
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p.Scond = arm.C_SBIT
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case ssa.OpARMXORshiftRR:
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genshift(v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm.SHIFT_RR, v.AuxInt)
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genshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm.SHIFT_RR, v.AuxInt)
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case ssa.OpARMMVNshiftLL:
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genshift(v.Op.Asm(), 0, v.Args[0].Reg(), v.Reg(), arm.SHIFT_LL, v.AuxInt)
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genshift(s, v.Op.Asm(), 0, v.Args[0].Reg(), v.Reg(), arm.SHIFT_LL, v.AuxInt)
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case ssa.OpARMMVNshiftRL:
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genshift(v.Op.Asm(), 0, v.Args[0].Reg(), v.Reg(), arm.SHIFT_LR, v.AuxInt)
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genshift(s, v.Op.Asm(), 0, v.Args[0].Reg(), v.Reg(), arm.SHIFT_LR, v.AuxInt)
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case ssa.OpARMMVNshiftRA:
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genshift(v.Op.Asm(), 0, v.Args[0].Reg(), v.Reg(), arm.SHIFT_AR, v.AuxInt)
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genshift(s, v.Op.Asm(), 0, v.Args[0].Reg(), v.Reg(), arm.SHIFT_AR, v.AuxInt)
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case ssa.OpARMMVNshiftLLreg:
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genregshift(v.Op.Asm(), 0, v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm.SHIFT_LL)
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genregshift(s, v.Op.Asm(), 0, v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm.SHIFT_LL)
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case ssa.OpARMMVNshiftRLreg:
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genregshift(v.Op.Asm(), 0, v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm.SHIFT_LR)
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genregshift(s, v.Op.Asm(), 0, v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm.SHIFT_LR)
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case ssa.OpARMMVNshiftRAreg:
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genregshift(v.Op.Asm(), 0, v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm.SHIFT_AR)
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genregshift(s, v.Op.Asm(), 0, v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm.SHIFT_AR)
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case ssa.OpARMADDshiftLLreg,
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ssa.OpARMADCshiftLLreg,
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ssa.OpARMSUBshiftLLreg,
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@ -344,11 +344,11 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
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ssa.OpARMORshiftLLreg,
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ssa.OpARMXORshiftLLreg,
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ssa.OpARMBICshiftLLreg:
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genregshift(v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Args[2].Reg(), v.Reg(), arm.SHIFT_LL)
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genregshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Args[2].Reg(), v.Reg(), arm.SHIFT_LL)
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case ssa.OpARMADDSshiftLLreg,
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ssa.OpARMSUBSshiftLLreg,
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ssa.OpARMRSBSshiftLLreg:
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p := genregshift(v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Args[2].Reg(), v.Reg0(), arm.SHIFT_LL)
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p := genregshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Args[2].Reg(), v.Reg0(), arm.SHIFT_LL)
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p.Scond = arm.C_SBIT
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case ssa.OpARMADDshiftRLreg,
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ssa.OpARMADCshiftRLreg,
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@ -360,11 +360,11 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
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ssa.OpARMORshiftRLreg,
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ssa.OpARMXORshiftRLreg,
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ssa.OpARMBICshiftRLreg:
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genregshift(v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Args[2].Reg(), v.Reg(), arm.SHIFT_LR)
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genregshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Args[2].Reg(), v.Reg(), arm.SHIFT_LR)
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case ssa.OpARMADDSshiftRLreg,
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ssa.OpARMSUBSshiftRLreg,
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ssa.OpARMRSBSshiftRLreg:
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p := genregshift(v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Args[2].Reg(), v.Reg0(), arm.SHIFT_LR)
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p := genregshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Args[2].Reg(), v.Reg0(), arm.SHIFT_LR)
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p.Scond = arm.C_SBIT
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case ssa.OpARMADDshiftRAreg,
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ssa.OpARMADCshiftRAreg,
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@ -376,16 +376,16 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
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ssa.OpARMORshiftRAreg,
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ssa.OpARMXORshiftRAreg,
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ssa.OpARMBICshiftRAreg:
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genregshift(v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Args[2].Reg(), v.Reg(), arm.SHIFT_AR)
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genregshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Args[2].Reg(), v.Reg(), arm.SHIFT_AR)
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case ssa.OpARMADDSshiftRAreg,
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ssa.OpARMSUBSshiftRAreg,
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ssa.OpARMRSBSshiftRAreg:
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p := genregshift(v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Args[2].Reg(), v.Reg0(), arm.SHIFT_AR)
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p := genregshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Args[2].Reg(), v.Reg0(), arm.SHIFT_AR)
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p.Scond = arm.C_SBIT
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case ssa.OpARMHMUL,
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ssa.OpARMHMULU:
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// 32-bit high multiplication
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p := gc.Prog(v.Op.Asm())
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p := s.Prog(v.Op.Asm())
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p.From.Type = obj.TYPE_REG
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p.From.Reg = v.Args[0].Reg()
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p.Reg = v.Args[1].Reg()
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@ -394,7 +394,7 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
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p.To.Offset = arm.REGTMP // throw away low 32-bit into tmp register
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case ssa.OpARMMULLU:
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// 32-bit multiplication, results 64-bit, high 32-bit in out0, low 32-bit in out1
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p := gc.Prog(v.Op.Asm())
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p := s.Prog(v.Op.Asm())
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p.From.Type = obj.TYPE_REG
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p.From.Reg = v.Args[0].Reg()
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p.Reg = v.Args[1].Reg()
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@ -402,7 +402,7 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
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p.To.Reg = v.Reg0() // high 32-bit
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p.To.Offset = int64(v.Reg1()) // low 32-bit
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case ssa.OpARMMULA:
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p := gc.Prog(v.Op.Asm())
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p := s.Prog(v.Op.Asm())
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p.From.Type = obj.TYPE_REG
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p.From.Reg = v.Args[0].Reg()
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p.Reg = v.Args[1].Reg()
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@ -410,14 +410,14 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
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p.To.Reg = v.Reg() // result
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p.To.Offset = int64(v.Args[2].Reg()) // addend
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case ssa.OpARMMOVWconst:
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p := gc.Prog(v.Op.Asm())
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p := s.Prog(v.Op.Asm())
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p.From.Type = obj.TYPE_CONST
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p.From.Offset = v.AuxInt
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p.To.Type = obj.TYPE_REG
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p.To.Reg = v.Reg()
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case ssa.OpARMMOVFconst,
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ssa.OpARMMOVDconst:
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p := gc.Prog(v.Op.Asm())
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p := s.Prog(v.Op.Asm())
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p.From.Type = obj.TYPE_FCONST
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p.From.Val = math.Float64frombits(uint64(v.AuxInt))
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p.To.Type = obj.TYPE_REG
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@ -428,7 +428,7 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
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ssa.OpARMTEQ,
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ssa.OpARMCMPF,
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ssa.OpARMCMPD:
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p := gc.Prog(v.Op.Asm())
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p := s.Prog(v.Op.Asm())
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p.From.Type = obj.TYPE_REG
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// Special layout in ARM assembly
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// Comparing to x86, the operands of ARM's CMP are reversed.
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@ -439,29 +439,29 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
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ssa.OpARMTSTconst,
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ssa.OpARMTEQconst:
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// Special layout in ARM assembly
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p := gc.Prog(v.Op.Asm())
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p := s.Prog(v.Op.Asm())
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p.From.Type = obj.TYPE_CONST
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p.From.Offset = v.AuxInt
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p.Reg = v.Args[0].Reg()
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case ssa.OpARMCMPF0,
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ssa.OpARMCMPD0:
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p := gc.Prog(v.Op.Asm())
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p := s.Prog(v.Op.Asm())
|
||||
p.From.Type = obj.TYPE_REG
|
||||
p.From.Reg = v.Args[0].Reg()
|
||||
case ssa.OpARMCMPshiftLL:
|
||||
genshift(v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), 0, arm.SHIFT_LL, v.AuxInt)
|
||||
genshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), 0, arm.SHIFT_LL, v.AuxInt)
|
||||
case ssa.OpARMCMPshiftRL:
|
||||
genshift(v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), 0, arm.SHIFT_LR, v.AuxInt)
|
||||
genshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), 0, arm.SHIFT_LR, v.AuxInt)
|
||||
case ssa.OpARMCMPshiftRA:
|
||||
genshift(v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), 0, arm.SHIFT_AR, v.AuxInt)
|
||||
genshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), 0, arm.SHIFT_AR, v.AuxInt)
|
||||
case ssa.OpARMCMPshiftLLreg:
|
||||
genregshift(v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Args[2].Reg(), 0, arm.SHIFT_LL)
|
||||
genregshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Args[2].Reg(), 0, arm.SHIFT_LL)
|
||||
case ssa.OpARMCMPshiftRLreg:
|
||||
genregshift(v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Args[2].Reg(), 0, arm.SHIFT_LR)
|
||||
genregshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Args[2].Reg(), 0, arm.SHIFT_LR)
|
||||
case ssa.OpARMCMPshiftRAreg:
|
||||
genregshift(v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Args[2].Reg(), 0, arm.SHIFT_AR)
|
||||
genregshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Args[2].Reg(), 0, arm.SHIFT_AR)
|
||||
case ssa.OpARMMOVWaddr:
|
||||
p := gc.Prog(arm.AMOVW)
|
||||
p := s.Prog(arm.AMOVW)
|
||||
p.From.Type = obj.TYPE_ADDR
|
||||
p.To.Type = obj.TYPE_REG
|
||||
p.To.Reg = v.Reg()
|
||||
|
|
@ -498,7 +498,7 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
|
|||
ssa.OpARMMOVWload,
|
||||
ssa.OpARMMOVFload,
|
||||
ssa.OpARMMOVDload:
|
||||
p := gc.Prog(v.Op.Asm())
|
||||
p := s.Prog(v.Op.Asm())
|
||||
p.From.Type = obj.TYPE_MEM
|
||||
p.From.Reg = v.Args[0].Reg()
|
||||
gc.AddAux(&p.From, v)
|
||||
|
|
@ -509,7 +509,7 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
|
|||
ssa.OpARMMOVWstore,
|
||||
ssa.OpARMMOVFstore,
|
||||
ssa.OpARMMOVDstore:
|
||||
p := gc.Prog(v.Op.Asm())
|
||||
p := s.Prog(v.Op.Asm())
|
||||
p.From.Type = obj.TYPE_REG
|
||||
p.From.Reg = v.Args[1].Reg()
|
||||
p.To.Type = obj.TYPE_MEM
|
||||
|
|
@ -519,33 +519,33 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
|
|||
// this is just shift 0 bits
|
||||
fallthrough
|
||||
case ssa.OpARMMOVWloadshiftLL:
|
||||
p := genshift(v.Op.Asm(), 0, v.Args[1].Reg(), v.Reg(), arm.SHIFT_LL, v.AuxInt)
|
||||
p := genshift(s, v.Op.Asm(), 0, v.Args[1].Reg(), v.Reg(), arm.SHIFT_LL, v.AuxInt)
|
||||
p.From.Reg = v.Args[0].Reg()
|
||||
case ssa.OpARMMOVWloadshiftRL:
|
||||
p := genshift(v.Op.Asm(), 0, v.Args[1].Reg(), v.Reg(), arm.SHIFT_LR, v.AuxInt)
|
||||
p := genshift(s, v.Op.Asm(), 0, v.Args[1].Reg(), v.Reg(), arm.SHIFT_LR, v.AuxInt)
|
||||
p.From.Reg = v.Args[0].Reg()
|
||||
case ssa.OpARMMOVWloadshiftRA:
|
||||
p := genshift(v.Op.Asm(), 0, v.Args[1].Reg(), v.Reg(), arm.SHIFT_AR, v.AuxInt)
|
||||
p := genshift(s, v.Op.Asm(), 0, v.Args[1].Reg(), v.Reg(), arm.SHIFT_AR, v.AuxInt)
|
||||
p.From.Reg = v.Args[0].Reg()
|
||||
case ssa.OpARMMOVWstoreidx:
|
||||
// this is just shift 0 bits
|
||||
fallthrough
|
||||
case ssa.OpARMMOVWstoreshiftLL:
|
||||
p := gc.Prog(v.Op.Asm())
|
||||
p := s.Prog(v.Op.Asm())
|
||||
p.From.Type = obj.TYPE_REG
|
||||
p.From.Reg = v.Args[2].Reg()
|
||||
p.To.Type = obj.TYPE_SHIFT
|
||||
p.To.Reg = v.Args[0].Reg()
|
||||
p.To.Offset = int64(makeshift(v.Args[1].Reg(), arm.SHIFT_LL, v.AuxInt))
|
||||
case ssa.OpARMMOVWstoreshiftRL:
|
||||
p := gc.Prog(v.Op.Asm())
|
||||
p := s.Prog(v.Op.Asm())
|
||||
p.From.Type = obj.TYPE_REG
|
||||
p.From.Reg = v.Args[2].Reg()
|
||||
p.To.Type = obj.TYPE_SHIFT
|
||||
p.To.Reg = v.Args[0].Reg()
|
||||
p.To.Offset = int64(makeshift(v.Args[1].Reg(), arm.SHIFT_LR, v.AuxInt))
|
||||
case ssa.OpARMMOVWstoreshiftRA:
|
||||
p := gc.Prog(v.Op.Asm())
|
||||
p := s.Prog(v.Op.Asm())
|
||||
p.From.Type = obj.TYPE_REG
|
||||
p.From.Reg = v.Args[2].Reg()
|
||||
p.To.Type = obj.TYPE_SHIFT
|
||||
|
|
@ -570,7 +570,7 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
|
|||
if v.Reg() == v.Args[0].Reg() {
|
||||
return
|
||||
}
|
||||
p := gc.Prog(arm.AMOVW)
|
||||
p := s.Prog(arm.AMOVW)
|
||||
p.From.Type = obj.TYPE_REG
|
||||
p.From.Reg = v.Args[0].Reg()
|
||||
p.To.Type = obj.TYPE_REG
|
||||
|
|
@ -591,7 +591,7 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
|
|||
ssa.OpARMMOVDW,
|
||||
ssa.OpARMMOVFD,
|
||||
ssa.OpARMMOVDF:
|
||||
p := gc.Prog(v.Op.Asm())
|
||||
p := s.Prog(v.Op.Asm())
|
||||
p.From.Type = obj.TYPE_REG
|
||||
p.From.Reg = v.Args[0].Reg()
|
||||
p.To.Type = obj.TYPE_REG
|
||||
|
|
@ -600,21 +600,21 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
|
|||
ssa.OpARMMOVWUD,
|
||||
ssa.OpARMMOVFWU,
|
||||
ssa.OpARMMOVDWU:
|
||||
p := gc.Prog(v.Op.Asm())
|
||||
p := s.Prog(v.Op.Asm())
|
||||
p.Scond = arm.C_UBIT
|
||||
p.From.Type = obj.TYPE_REG
|
||||
p.From.Reg = v.Args[0].Reg()
|
||||
p.To.Type = obj.TYPE_REG
|
||||
p.To.Reg = v.Reg()
|
||||
case ssa.OpARMCMOVWHSconst:
|
||||
p := gc.Prog(arm.AMOVW)
|
||||
p := s.Prog(arm.AMOVW)
|
||||
p.Scond = arm.C_SCOND_HS
|
||||
p.From.Type = obj.TYPE_CONST
|
||||
p.From.Offset = v.AuxInt
|
||||
p.To.Type = obj.TYPE_REG
|
||||
p.To.Reg = v.Reg()
|
||||
case ssa.OpARMCMOVWLSconst:
|
||||
p := gc.Prog(arm.AMOVW)
|
||||
p := s.Prog(arm.AMOVW)
|
||||
p.Scond = arm.C_SCOND_LS
|
||||
p.From.Type = obj.TYPE_CONST
|
||||
p.From.Offset = v.AuxInt
|
||||
|
|
@ -623,20 +623,20 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
|
|||
case ssa.OpARMCALLstatic, ssa.OpARMCALLclosure, ssa.OpARMCALLinter, ssa.OpARMCALLudiv:
|
||||
s.Call(v)
|
||||
case ssa.OpARMDUFFZERO:
|
||||
p := gc.Prog(obj.ADUFFZERO)
|
||||
p := s.Prog(obj.ADUFFZERO)
|
||||
p.To.Type = obj.TYPE_MEM
|
||||
p.To.Name = obj.NAME_EXTERN
|
||||
p.To.Sym = gc.Duffzero
|
||||
p.To.Offset = v.AuxInt
|
||||
case ssa.OpARMDUFFCOPY:
|
||||
p := gc.Prog(obj.ADUFFCOPY)
|
||||
p := s.Prog(obj.ADUFFCOPY)
|
||||
p.To.Type = obj.TYPE_MEM
|
||||
p.To.Name = obj.NAME_EXTERN
|
||||
p.To.Sym = gc.Duffcopy
|
||||
p.To.Offset = v.AuxInt
|
||||
case ssa.OpARMLoweredNilCheck:
|
||||
// Issue a load which will fault if arg is nil.
|
||||
p := gc.Prog(arm.AMOVB)
|
||||
p := s.Prog(arm.AMOVB)
|
||||
p.From.Type = obj.TYPE_MEM
|
||||
p.From.Reg = v.Args[0].Reg()
|
||||
gc.AddAux(&p.From, v)
|
||||
|
|
@ -665,18 +665,18 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
|
|||
sz = 1
|
||||
mov = arm.AMOVB
|
||||
}
|
||||
p := gc.Prog(mov)
|
||||
p := s.Prog(mov)
|
||||
p.Scond = arm.C_PBIT
|
||||
p.From.Type = obj.TYPE_REG
|
||||
p.From.Reg = v.Args[2].Reg()
|
||||
p.To.Type = obj.TYPE_MEM
|
||||
p.To.Reg = arm.REG_R1
|
||||
p.To.Offset = sz
|
||||
p2 := gc.Prog(arm.ACMP)
|
||||
p2 := s.Prog(arm.ACMP)
|
||||
p2.From.Type = obj.TYPE_REG
|
||||
p2.From.Reg = v.Args[1].Reg()
|
||||
p2.Reg = arm.REG_R1
|
||||
p3 := gc.Prog(arm.ABLE)
|
||||
p3 := s.Prog(arm.ABLE)
|
||||
p3.To.Type = obj.TYPE_BRANCH
|
||||
gc.Patch(p3, p)
|
||||
case ssa.OpARMLoweredMove:
|
||||
|
|
@ -699,25 +699,25 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
|
|||
sz = 1
|
||||
mov = arm.AMOVB
|
||||
}
|
||||
p := gc.Prog(mov)
|
||||
p := s.Prog(mov)
|
||||
p.Scond = arm.C_PBIT
|
||||
p.From.Type = obj.TYPE_MEM
|
||||
p.From.Reg = arm.REG_R1
|
||||
p.From.Offset = sz
|
||||
p.To.Type = obj.TYPE_REG
|
||||
p.To.Reg = arm.REGTMP
|
||||
p2 := gc.Prog(mov)
|
||||
p2 := s.Prog(mov)
|
||||
p2.Scond = arm.C_PBIT
|
||||
p2.From.Type = obj.TYPE_REG
|
||||
p2.From.Reg = arm.REGTMP
|
||||
p2.To.Type = obj.TYPE_MEM
|
||||
p2.To.Reg = arm.REG_R2
|
||||
p2.To.Offset = sz
|
||||
p3 := gc.Prog(arm.ACMP)
|
||||
p3 := s.Prog(arm.ACMP)
|
||||
p3.From.Type = obj.TYPE_REG
|
||||
p3.From.Reg = v.Args[2].Reg()
|
||||
p3.Reg = arm.REG_R1
|
||||
p4 := gc.Prog(arm.ABLE)
|
||||
p4 := s.Prog(arm.ABLE)
|
||||
p4.To.Type = obj.TYPE_BRANCH
|
||||
gc.Patch(p4, p)
|
||||
case ssa.OpARMEqual,
|
||||
|
|
@ -732,12 +732,12 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
|
|||
ssa.OpARMGreaterEqualU:
|
||||
// generate boolean values
|
||||
// use conditional move
|
||||
p := gc.Prog(arm.AMOVW)
|
||||
p := s.Prog(arm.AMOVW)
|
||||
p.From.Type = obj.TYPE_CONST
|
||||
p.From.Offset = 0
|
||||
p.To.Type = obj.TYPE_REG
|
||||
p.To.Reg = v.Reg()
|
||||
p = gc.Prog(arm.AMOVW)
|
||||
p = s.Prog(arm.AMOVW)
|
||||
p.Scond = condBits[v.Op]
|
||||
p.From.Type = obj.TYPE_CONST
|
||||
p.From.Offset = 1
|
||||
|
|
@ -791,7 +791,7 @@ func ssaGenBlock(s *gc.SSAGenState, b, next *ssa.Block) {
|
|||
switch b.Kind {
|
||||
case ssa.BlockPlain:
|
||||
if b.Succs[0].Block() != next {
|
||||
p := gc.Prog(obj.AJMP)
|
||||
p := s.Prog(obj.AJMP)
|
||||
p.To.Type = obj.TYPE_BRANCH
|
||||
s.Branches = append(s.Branches, gc.Branch{P: p, B: b.Succs[0].Block()})
|
||||
}
|
||||
|
|
@ -800,27 +800,27 @@ func ssaGenBlock(s *gc.SSAGenState, b, next *ssa.Block) {
|
|||
// defer returns in R0:
|
||||
// 0 if we should continue executing
|
||||
// 1 if we should jump to deferreturn call
|
||||
p := gc.Prog(arm.ACMP)
|
||||
p := s.Prog(arm.ACMP)
|
||||
p.From.Type = obj.TYPE_CONST
|
||||
p.From.Offset = 0
|
||||
p.Reg = arm.REG_R0
|
||||
p = gc.Prog(arm.ABNE)
|
||||
p = s.Prog(arm.ABNE)
|
||||
p.To.Type = obj.TYPE_BRANCH
|
||||
s.Branches = append(s.Branches, gc.Branch{P: p, B: b.Succs[1].Block()})
|
||||
if b.Succs[0].Block() != next {
|
||||
p := gc.Prog(obj.AJMP)
|
||||
p := s.Prog(obj.AJMP)
|
||||
p.To.Type = obj.TYPE_BRANCH
|
||||
s.Branches = append(s.Branches, gc.Branch{P: p, B: b.Succs[0].Block()})
|
||||
}
|
||||
|
||||
case ssa.BlockExit:
|
||||
gc.Prog(obj.AUNDEF) // tell plive.go that we never reach here
|
||||
s.Prog(obj.AUNDEF) // tell plive.go that we never reach here
|
||||
|
||||
case ssa.BlockRet:
|
||||
gc.Prog(obj.ARET)
|
||||
s.Prog(obj.ARET)
|
||||
|
||||
case ssa.BlockRetJmp:
|
||||
p := gc.Prog(obj.ARET)
|
||||
p := s.Prog(obj.ARET)
|
||||
p.To.Type = obj.TYPE_MEM
|
||||
p.To.Name = obj.NAME_EXTERN
|
||||
p.To.Sym = b.Aux.(*obj.LSym)
|
||||
|
|
@ -834,18 +834,18 @@ func ssaGenBlock(s *gc.SSAGenState, b, next *ssa.Block) {
|
|||
var p *obj.Prog
|
||||
switch next {
|
||||
case b.Succs[0].Block():
|
||||
p = gc.Prog(jmp.invasm)
|
||||
p = s.Prog(jmp.invasm)
|
||||
p.To.Type = obj.TYPE_BRANCH
|
||||
s.Branches = append(s.Branches, gc.Branch{P: p, B: b.Succs[1].Block()})
|
||||
case b.Succs[1].Block():
|
||||
p = gc.Prog(jmp.asm)
|
||||
p = s.Prog(jmp.asm)
|
||||
p.To.Type = obj.TYPE_BRANCH
|
||||
s.Branches = append(s.Branches, gc.Branch{P: p, B: b.Succs[0].Block()})
|
||||
default:
|
||||
p = gc.Prog(jmp.asm)
|
||||
p = s.Prog(jmp.asm)
|
||||
p.To.Type = obj.TYPE_BRANCH
|
||||
s.Branches = append(s.Branches, gc.Branch{P: p, B: b.Succs[0].Block()})
|
||||
q := gc.Prog(obj.AJMP)
|
||||
q := s.Prog(obj.AJMP)
|
||||
q.To.Type = obj.TYPE_BRANCH
|
||||
s.Branches = append(s.Branches, gc.Branch{P: q, B: b.Succs[1].Block()})
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue