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cmd/internal/obj: support arm64 FMOVQ large offset encoding

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Support arm64 FMOVQ with large offset in immediate which is encoded
using register offset instruction in opldrr or opstrr. This will help
allowing folding immediate into new ssa ops FMOVQload and FMOVQstore.

For example: FMOVQ F0, -20000(R0) is encoded as following:
  MOVD 3(PC), R27
  FMOVQ F0, (R0)(R27)
  RET
  ffff b1e0 # constant value

Change-Id: Ib71f92f6ff4b310bda004a440b1df41ffe164523
Reviewed-on: https://go-review.googlesource.com/c/go/+/716960
Reviewed-by: Cherry Mui <cherryyz@google.com>
Auto-Submit: Michael Pratt <mpratt@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Michael Pratt <mpratt@google.com>
This commit is contained in:
Alexander Musman 2025-11-01 14:44:39 +03:00 • committed by Gopher Robot
parent 85bec791a0
commit 0c4444e13d
2 changed files with 8 additions and 0 deletions
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4
src/cmd/asm/internal/asm/testdata/arm64.s vendored
View file

@ -630,6 +630,8 @@ TEXT foo(SB), DUPOK|NOSPLIT, $-8
FMOVS F1, 0x44332211(R2) // FMOVS F1, 1144201745(R2) FMOVS F1, 0x44332211(R2) // FMOVS F1, 1144201745(R2)
FMOVD F1, 0x1007000(R2) // FMOVD F1, 16805888(R2) FMOVD F1, 0x1007000(R2) // FMOVD F1, 16805888(R2)
FMOVD F1, 0x44332211(R2) // FMOVD F1, 1144201745(R2) FMOVD F1, 0x44332211(R2) // FMOVD F1, 1144201745(R2)
FMOVQ F1, 0x1003000(R2) // FMOVQ F1, 16789504(R2)
FMOVQ F1, 0x44332211(R2) // FMOVQ F1, 1144201745(R2)
MOVB 0x1000000(R1), R2 // MOVB 16777216(R1), R2 MOVB 0x1000000(R1), R2 // MOVB 16777216(R1), R2
MOVB 0x44332211(R1), R2 // MOVB 1144201745(R1), R2 MOVB 0x44332211(R1), R2 // MOVB 1144201745(R1), R2
@ -643,6 +645,8 @@ TEXT foo(SB), DUPOK|NOSPLIT, $-8
FMOVS 0x44332211(R1), F2 // FMOVS 1144201745(R1), F2 FMOVS 0x44332211(R1), F2 // FMOVS 1144201745(R1), F2
FMOVD 0x1000000(R1), F2 // FMOVD 16777216(R1), F2 FMOVD 0x1000000(R1), F2 // FMOVD 16777216(R1), F2
FMOVD 0x44332211(R1), F2 // FMOVD 1144201745(R1), F2 FMOVD 0x44332211(R1), F2 // FMOVD 1144201745(R1), F2
FMOVQ 0x1000000(R1), F2 // FMOVQ 16777216(R1), F2
FMOVQ 0x44332211(R1), F2 // FMOVQ 1144201745(R1), F2
// shifted or extended register offset. // shifted or extended register offset.
MOVD (R2)(R6.SXTW), R4 // 44c866f8 MOVD (R2)(R6.SXTW), R4 // 44c866f8

4
src/cmd/internal/obj/arm64/asm7.go
View file

@ -7276,6 +7276,8 @@ func (c *ctxt7) opldrr(p *obj.Prog, a obj.As, rt, rn, rm int16, extension bool)
op = OptionS<<10 | 0x3<<21 | 0x17<<27 | 1<<26 op = OptionS<<10 | 0x3<<21 | 0x17<<27 | 1<<26
case AFMOVD: case AFMOVD:
op = OptionS<<10 | 0x3<<21 | 0x1f<<27 | 1<<26 op = OptionS<<10 | 0x3<<21 | 0x1f<<27 | 1<<26
case AFMOVQ:
op = OptionS<<10 | 0x7<<21 | 0x07<<27 | 1<<26
default: default:
c.ctxt.Diag("bad opldrr %v\n%v", a, p) c.ctxt.Diag("bad opldrr %v\n%v", a, p)
return 0 return 0
@ -7308,6 +7310,8 @@ func (c *ctxt7) opstrr(p *obj.Prog, a obj.As, rt, rn, rm int16, extension bool)
op = OptionS<<10 | 0x1<<21 | 0x17<<27 | 1<<26 op = OptionS<<10 | 0x1<<21 | 0x17<<27 | 1<<26
case AFMOVD: case AFMOVD:
op = OptionS<<10 | 0x1<<21 | 0x1f<<27 | 1<<26 op = OptionS<<10 | 0x1<<21 | 0x1f<<27 | 1<<26
case AFMOVQ:
op = OptionS<<10 | 0x5<<21 | 0x07<<27 | 1<<26
default: default:
c.ctxt.Diag("bad opstrr %v\n%v", a, p) c.ctxt.Diag("bad opstrr %v\n%v", a, p)
return 0 return 0