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cmd/compile: use generated loops instead of DUFFCOPY on arm64
Change-Id: Ic2aa8959b7fc594b86def70b6c2be38badf7970c Reviewed-on: https://go-review.googlesource.com/c/go/+/679015 Reviewed-by: Keith Randall <khr@google.com> Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Jorropo <jorropo.pgm@gmail.com>
This commit is contained in:
Keith Randall
parent
bca3e98b8a
commit
15d6dbc05c
5 changed files with 220 additions and 178 deletions
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@ -1162,41 +1162,119 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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// BNE loop
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// There's a past-the-end pointer here, any problem with that?
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case ssa.OpARM64DUFFCOPY:
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p := s.Prog(obj.ADUFFCOPY)
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p.To.Type = obj.TYPE_MEM
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p.To.Name = obj.NAME_EXTERN
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p.To.Sym = ir.Syms.Duffcopy
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p.To.Offset = v.AuxInt
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case ssa.OpARM64LoweredMove:
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// LDP.P 16(R16), (R25, Rtmp)
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// STP.P (R25, Rtmp), 16(R17)
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// CMP Rarg2, R16
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// BLE -3(PC)
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// arg2 is the address of the last element of src
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p := s.Prog(arm64.ALDP)
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p.Scond = arm64.C_XPOST
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p.From.Type = obj.TYPE_MEM
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p.From.Reg = arm64.REG_R16
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p.From.Offset = 16
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p.To.Type = obj.TYPE_REGREG
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p.To.Reg = arm64.REG_R25
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p.To.Offset = int64(arm64.REGTMP)
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p2 := s.Prog(arm64.ASTP)
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p2.Scond = arm64.C_XPOST
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p2.From.Type = obj.TYPE_REGREG
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p2.From.Reg = arm64.REG_R25
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p2.From.Offset = int64(arm64.REGTMP)
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p2.To.Type = obj.TYPE_MEM
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p2.To.Reg = arm64.REG_R17
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p2.To.Offset = 16
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p3 := s.Prog(arm64.ACMP)
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p3.From.Type = obj.TYPE_REG
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p3.From.Reg = v.Args[2].Reg()
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p3.Reg = arm64.REG_R16
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p4 := s.Prog(arm64.ABLE)
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p4.To.Type = obj.TYPE_BRANCH
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p4.To.SetTarget(p)
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dstReg := v.Args[0].Reg()
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srcReg := v.Args[1].Reg()
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if dstReg == srcReg {
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break
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}
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tmpReg1 := int16(arm64.REG_R24)
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tmpReg2 := int16(arm64.REG_R25)
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n := v.AuxInt
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if n < 16 {
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v.Fatalf("Move too small %d", n)
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}
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// Generate copying instructions.
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var off int64
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for n >= 16 {
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// LDP off(srcReg), (tmpReg1, tmpReg2)
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// STP (tmpReg1, tmpReg2), off(dstReg)
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move16(s, srcReg, dstReg, tmpReg1, tmpReg2, off, false)
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off += 16
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n -= 16
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}
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if n > 8 {
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// MOVD off(srcReg), tmpReg1
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// MOVD tmpReg1, off(dstReg)
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move8(s, srcReg, dstReg, tmpReg1, off)
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off += 8
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n -= 8
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}
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if n != 0 {
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// MOVD off+n-8(srcReg), tmpReg1
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// MOVD tmpReg1, off+n-8(dstReg)
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move8(s, srcReg, dstReg, tmpReg1, off+n-8)
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}
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case ssa.OpARM64LoweredMoveLoop:
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dstReg := v.Args[0].Reg()
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srcReg := v.Args[1].Reg()
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if dstReg == srcReg {
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break
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}
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countReg := int16(arm64.REG_R23)
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tmpReg1 := int16(arm64.REG_R24)
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tmpReg2 := int16(arm64.REG_R25)
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n := v.AuxInt
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loopSize := int64(64)
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if n < 3*loopSize {
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// - a loop count of 0 won't work.
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// - a loop count of 1 is useless.
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// - a loop count of 2 is a code size ~tie
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// 3 instructions to implement the loop
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// 4 instructions in the loop body
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// vs
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// 8 instructions in the straightline code
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// Might as well use straightline code.
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v.Fatalf("ZeroLoop size too small %d", n)
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}
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// Put iteration count in a register.
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// MOVD $n, countReg
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p := s.Prog(arm64.AMOVD)
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p.From.Type = obj.TYPE_CONST
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p.From.Offset = n / loopSize
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p.To.Type = obj.TYPE_REG
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p.To.Reg = countReg
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cntInit := p
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// Move loopSize bytes starting at srcReg to dstReg.
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// Increment srcReg and destReg by loopSize as a side effect.
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for range loopSize / 16 {
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// LDP.P 16(srcReg), (tmpReg1, tmpReg2)
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// STP.P (tmpReg1, tmpReg2), 16(dstReg)
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move16(s, srcReg, dstReg, tmpReg1, tmpReg2, 0, true)
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}
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// Decrement loop count.
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// SUB $1, countReg
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p = s.Prog(arm64.ASUB)
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p.From.Type = obj.TYPE_CONST
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p.From.Offset = 1
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p.To.Type = obj.TYPE_REG
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p.To.Reg = countReg
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// Jump to loop header if we're not done yet.
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// CBNZ head
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p = s.Prog(arm64.ACBNZ)
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p.From.Type = obj.TYPE_REG
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p.From.Reg = countReg
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p.To.Type = obj.TYPE_BRANCH
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p.To.SetTarget(cntInit.Link)
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// Multiples of the loop size are now done.
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n %= loopSize
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// Copy any fractional portion.
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var off int64
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for n >= 16 {
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// LDP off(srcReg), (tmpReg1, tmpReg2)
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// STP (tmpReg1, tmpReg2), off(dstReg)
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move16(s, srcReg, dstReg, tmpReg1, tmpReg2, off, false)
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off += 16
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n -= 16
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}
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if n > 8 {
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// MOVD off(srcReg), tmpReg1
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// MOVD tmpReg1, off(dstReg)
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move8(s, srcReg, dstReg, tmpReg1, off)
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off += 8
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n -= 8
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}
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if n != 0 {
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// MOVD off+n-8(srcReg), tmpReg1
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// MOVD tmpReg1, off+n-8(dstReg)
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move8(s, srcReg, dstReg, tmpReg1, off+n-8)
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}
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case ssa.OpARM64CALLstatic, ssa.OpARM64CALLclosure, ssa.OpARM64CALLinter:
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s.Call(v)
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case ssa.OpARM64CALLtail:
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@ -1599,3 +1677,53 @@ func zero8(s *ssagen.State, reg int16, off int64) {
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p.To.Reg = reg
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p.To.Offset = off
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}
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// move16 copies 16 bytes at src+off to dst+off.
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// Uses registers tmp1 and tmp2.
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// If postInc is true, increment src and dst by 16.
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func move16(s *ssagen.State, src, dst, tmp1, tmp2 int16, off int64, postInc bool) {
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// LDP off(src), (tmp1, tmp2)
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ld := s.Prog(arm64.ALDP)
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ld.From.Type = obj.TYPE_MEM
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ld.From.Reg = src
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ld.From.Offset = off
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ld.To.Type = obj.TYPE_REGREG
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ld.To.Reg = tmp1
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ld.To.Offset = int64(tmp2)
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// STP (tmp1, tmp2), off(dst)
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st := s.Prog(arm64.ASTP)
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st.From.Type = obj.TYPE_REGREG
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st.From.Reg = tmp1
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st.From.Offset = int64(tmp2)
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st.To.Type = obj.TYPE_MEM
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st.To.Reg = dst
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st.To.Offset = off
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if postInc {
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if off != 0 {
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panic("can't postinc with non-zero offset")
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}
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ld.Scond = arm64.C_XPOST
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st.Scond = arm64.C_XPOST
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ld.From.Offset = 16
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st.To.Offset = 16
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}
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}
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// move8 copies 8 bytes at src+off to dst+off.
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// Uses register tmp.
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func move8(s *ssagen.State, src, dst, tmp int16, off int64) {
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// MOVD off(src), tmp
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ld := s.Prog(arm64.AMOVD)
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ld.From.Type = obj.TYPE_MEM
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ld.From.Reg = src
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ld.From.Offset = off
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ld.To.Type = obj.TYPE_REG
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ld.To.Reg = tmp
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// MOVD tmp, off(dst)
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st := s.Prog(arm64.AMOVD)
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st.From.Type = obj.TYPE_REG
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st.From.Reg = tmp
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st.To.Type = obj.TYPE_MEM
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st.To.Reg = dst
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st.To.Offset = off
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}
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@ -462,39 +462,8 @@
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(STP [16] dst (Select0 <typ.UInt64> (LDP [16] src mem)) (Select1 <typ.UInt64> (LDP [16] src mem))
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(STP dst (Select0 <typ.UInt64> (LDP src mem)) (Select1 <typ.UInt64> (LDP src mem)) mem))))
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// strip off fractional word move
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(Move [s] dst src mem) && s%16 != 0 && s%16 <= 8 && s > 64 =>
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(Move [8]
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(OffPtr <dst.Type> dst [s-8])
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(OffPtr <src.Type> src [s-8])
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(Move [s-s%16] dst src mem))
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(Move [s] dst src mem) && s%16 != 0 && s%16 > 8 && s > 64 =>
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(Move [16]
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(OffPtr <dst.Type> dst [s-16])
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(OffPtr <src.Type> src [s-16])
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(Move [s-s%16] dst src mem))
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// medium move uses a duff device
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(Move [s] dst src mem)
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&& s > 64 && s <= 16*64 && s%16 == 0
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&& logLargeCopy(v, s) =>
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(DUFFCOPY [8 * (64 - s/16)] dst src mem)
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// 8 is the number of bytes to encode:
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//
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// LDP.P 16(R16), (R26, R27)
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// STP.P (R26, R27), 16(R17)
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//
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// 64 is number of these blocks. See runtime/duff_arm64.s:duffcopy
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// large move uses a loop
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(Move [s] dst src mem)
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&& s%16 == 0 && s > 16*64
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&& logLargeCopy(v, s) =>
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(LoweredMove
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dst
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src
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(ADDconst <src.Type> src [s-16])
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mem)
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(Move [s] dst src mem) && s > 64 && s < 192 && logLargeCopy(v, s) => (LoweredMove [s] dst src mem)
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(Move [s] dst src mem) && s >= 192 && logLargeCopy(v, s) => (LoweredMoveLoop [s] dst src mem)
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// calls
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(StaticCall ...) => (CALLstatic ...)
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@ -144,6 +144,8 @@ func init() {
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gpspsbg = gpspg | buildReg("SB")
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fp = buildReg("F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31")
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callerSave = gp | fp | buildReg("g") // runtime.setg (and anything calling it) may clobber g
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r24to25 = buildReg("R24 R25")
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r23to25 = buildReg("R23 R24 R25")
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rz = buildReg("ZERO")
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first16 = buildReg("R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15")
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)
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@ -568,47 +570,40 @@ func init() {
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needIntTemp: true,
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},
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// duffcopy
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// arg0 = address of dst memory (in R21, changed as side effect)
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// arg1 = address of src memory (in R20, changed as side effect)
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// medium copying
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// arg0 = address of dst memory
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// arg1 = address of src memory
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// arg2 = mem
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// auxint = offset into duffcopy code to start executing
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// auxint = # of bytes to copy
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// returns mem
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// R20, R21 changed as side effect
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// R16 and R17 may be clobbered by linker trampoline.
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{
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name: "DUFFCOPY",
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name: "LoweredMove",
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aux: "Int64",
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argLength: 3,
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reg: regInfo{
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inputs: []regMask{buildReg("R21"), buildReg("R20")},
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clobbers: buildReg("R16 R17 R20 R21 R26 R30"),
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inputs: []regMask{gp &^ r24to25, gp &^ r24to25},
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clobbers: r24to25, // TODO: figure out needIntTemp x2
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},
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//faultOnNilArg0: true, // Note: removed for 73748. TODO: reenable at some point
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//faultOnNilArg1: true,
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unsafePoint: true, // FP maintenance around DUFFCOPY can be clobbered by interrupts
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faultOnNilArg0: true,
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faultOnNilArg1: true,
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},
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// large move
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// arg0 = address of dst memory (in R17 aka arm64.REGRT2, changed as side effect)
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// arg1 = address of src memory (in R16 aka arm64.REGRT1, changed as side effect)
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// arg2 = address of the last element of src
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// arg3 = mem
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// large copying
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// arg0 = address of dst memory
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// arg1 = address of src memory
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// arg2 = mem
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// auxint = # of bytes to copy
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// returns mem
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// LDP.P 16(R16), (R25, Rtmp)
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// STP.P (R25, Rtmp), 16(R17)
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// CMP Rarg2, R16
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// BLE -3(PC)
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// Note: the-end-of-src may be not a valid pointer. it's a problem if it is spilled.
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// the-end-of-src - 16 is within the area to copy, ok to spill.
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{
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name: "LoweredMove",
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argLength: 4,
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name: "LoweredMoveLoop",
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aux: "Int64",
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argLength: 3,
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reg: regInfo{
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inputs: []regMask{buildReg("R17"), buildReg("R16"), gp &^ buildReg("R25")},
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clobbers: buildReg("R16 R17 R25"),
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inputs: []regMask{gp &^ r23to25, gp &^ r23to25},
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clobbers: r23to25, // TODO: figure out needIntTemp x3
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clobbersArg0: true,
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clobbersArg1: true,
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},
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clobberFlags: true,
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faultOnNilArg0: true,
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faultOnNilArg1: true,
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},
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@ -1720,8 +1720,8 @@ const (
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OpARM64GreaterEqualNoov
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OpARM64LoweredZero
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OpARM64LoweredZeroLoop
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OpARM64DUFFCOPY
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OpARM64LoweredMove
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OpARM64LoweredMoveLoop
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OpARM64LoweredGetClosurePtr
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OpARM64LoweredGetCallerSP
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OpARM64LoweredGetCallerPC
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@ -23095,32 +23095,34 @@ var opcodeTable = [...]opInfo{
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clobbersArg0: true,
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},
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},
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{
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name: "DUFFCOPY",
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auxType: auxInt64,
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argLen: 3,
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unsafePoint: true,
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reg: regInfo{
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inputs: []inputInfo{
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{0, 1048576}, // R21
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{1, 524288}, // R20
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},
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clobbers: 303759360, // R16 R17 R20 R21 R26 R30
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},
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},
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{
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name: "LoweredMove",
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argLen: 4,
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clobberFlags: true,
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auxType: auxInt64,
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argLen: 3,
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faultOnNilArg0: true,
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faultOnNilArg1: true,
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reg: regInfo{
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inputs: []inputInfo{
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{0, 131072}, // R17
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{1, 65536}, // R16
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{2, 318767103}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R19 R20 R21 R22 R23 R24 R26 R30
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{0, 310378495}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R19 R20 R21 R22 R23 R26 R30
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{1, 310378495}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R19 R20 R21 R22 R23 R26 R30
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},
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clobbers: 16973824, // R16 R17 R25
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clobbers: 25165824, // R24 R25
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},
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},
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{
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name: "LoweredMoveLoop",
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auxType: auxInt64,
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argLen: 3,
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faultOnNilArg0: true,
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faultOnNilArg1: true,
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reg: regInfo{
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inputs: []inputInfo{
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{0, 306184191}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R19 R20 R21 R22 R26 R30
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{1, 306184191}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R19 R20 R21 R22 R26 R30
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},
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clobbers: 29360128, // R23 R24 R25
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clobbersArg0: true,
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clobbersArg1: true,
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},
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},
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{
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@ -19688,87 +19688,35 @@ func rewriteValueARM64_OpMove(v *Value) bool {
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return true
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}
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// match: (Move [s] dst src mem)
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// cond: s%16 != 0 && s%16 <= 8 && s > 64
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// result: (Move [8] (OffPtr <dst.Type> dst [s-8]) (OffPtr <src.Type> src [s-8]) (Move [s-s%16] dst src mem))
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// cond: s > 64 && s < 192 && logLargeCopy(v, s)
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// result: (LoweredMove [s] dst src mem)
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||||
for {
|
||||
s := auxIntToInt64(v.AuxInt)
|
||||
dst := v_0
|
||||
src := v_1
|
||||
mem := v_2
|
||||
if !(s%16 != 0 && s%16 <= 8 && s > 64) {
|
||||
if !(s > 64 && s < 192 && logLargeCopy(v, s)) {
|
||||
break
|
||||
}
|
||||
v.reset(OpMove)
|
||||
v.AuxInt = int64ToAuxInt(8)
|
||||
v0 := b.NewValue0(v.Pos, OpOffPtr, dst.Type)
|
||||
v0.AuxInt = int64ToAuxInt(s - 8)
|
||||
v0.AddArg(dst)
|
||||
v1 := b.NewValue0(v.Pos, OpOffPtr, src.Type)
|
||||
v1.AuxInt = int64ToAuxInt(s - 8)
|
||||
v1.AddArg(src)
|
||||
v2 := b.NewValue0(v.Pos, OpMove, types.TypeMem)
|
||||
v2.AuxInt = int64ToAuxInt(s - s%16)
|
||||
v2.AddArg3(dst, src, mem)
|
||||
v.AddArg3(v0, v1, v2)
|
||||
return true
|
||||
}
|
||||
// match: (Move [s] dst src mem)
|
||||
// cond: s%16 != 0 && s%16 > 8 && s > 64
|
||||
// result: (Move [16] (OffPtr <dst.Type> dst [s-16]) (OffPtr <src.Type> src [s-16]) (Move [s-s%16] dst src mem))
|
||||
for {
|
||||
s := auxIntToInt64(v.AuxInt)
|
||||
dst := v_0
|
||||
src := v_1
|
||||
mem := v_2
|
||||
if !(s%16 != 0 && s%16 > 8 && s > 64) {
|
||||
break
|
||||
}
|
||||
v.reset(OpMove)
|
||||
v.AuxInt = int64ToAuxInt(16)
|
||||
v0 := b.NewValue0(v.Pos, OpOffPtr, dst.Type)
|
||||
v0.AuxInt = int64ToAuxInt(s - 16)
|
||||
v0.AddArg(dst)
|
||||
v1 := b.NewValue0(v.Pos, OpOffPtr, src.Type)
|
||||
v1.AuxInt = int64ToAuxInt(s - 16)
|
||||
v1.AddArg(src)
|
||||
v2 := b.NewValue0(v.Pos, OpMove, types.TypeMem)
|
||||
v2.AuxInt = int64ToAuxInt(s - s%16)
|
||||
v2.AddArg3(dst, src, mem)
|
||||
v.AddArg3(v0, v1, v2)
|
||||
return true
|
||||
}
|
||||
// match: (Move [s] dst src mem)
|
||||
// cond: s > 64 && s <= 16*64 && s%16 == 0 && logLargeCopy(v, s)
|
||||
// result: (DUFFCOPY [8 * (64 - s/16)] dst src mem)
|
||||
for {
|
||||
s := auxIntToInt64(v.AuxInt)
|
||||
dst := v_0
|
||||
src := v_1
|
||||
mem := v_2
|
||||
if !(s > 64 && s <= 16*64 && s%16 == 0 && logLargeCopy(v, s)) {
|
||||
break
|
||||
}
|
||||
v.reset(OpARM64DUFFCOPY)
|
||||
v.AuxInt = int64ToAuxInt(8 * (64 - s/16))
|
||||
v.reset(OpARM64LoweredMove)
|
||||
v.AuxInt = int64ToAuxInt(s)
|
||||
v.AddArg3(dst, src, mem)
|
||||
return true
|
||||
}
|
||||
// match: (Move [s] dst src mem)
|
||||
// cond: s%16 == 0 && s > 16*64 && logLargeCopy(v, s)
|
||||
// result: (LoweredMove dst src (ADDconst <src.Type> src [s-16]) mem)
|
||||
// cond: s >= 192 && logLargeCopy(v, s)
|
||||
// result: (LoweredMoveLoop [s] dst src mem)
|
||||
for {
|
||||
s := auxIntToInt64(v.AuxInt)
|
||||
dst := v_0
|
||||
src := v_1
|
||||
mem := v_2
|
||||
if !(s%16 == 0 && s > 16*64 && logLargeCopy(v, s)) {
|
||||
if !(s >= 192 && logLargeCopy(v, s)) {
|
||||
break
|
||||
}
|
||||
v.reset(OpARM64LoweredMove)
|
||||
v0 := b.NewValue0(v.Pos, OpARM64ADDconst, src.Type)
|
||||
v0.AuxInt = int64ToAuxInt(s - 16)
|
||||
v0.AddArg(src)
|
||||
v.AddArg4(dst, src, v0, mem)
|
||||
v.reset(OpARM64LoweredMoveLoop)
|
||||
v.AuxInt = int64ToAuxInt(s)
|
||||
v.AddArg3(dst, src, mem)
|
||||
return true
|
||||
}
|
||||
return false
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue