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cmd/compile: improve LoweredZero performance for ppc64x
This change improves the performance of the LoweredZero rule on ppc64x. The improvement can be seen in the runtime ClearFat benchmarks: BenchmarkClearFat12-16 2.40 0.69 -71.25% BenchmarkClearFat16-16 9.98 0.93 -90.68% BenchmarkClearFat24-16 4.75 0.93 -80.42% BenchmarkClearFat32-16 6.02 0.93 -84.55% BenchmarkClearFat40-16 7.19 1.16 -83.87% BenchmarkClearFat48-16 15.0 1.39 -90.73% BenchmarkClearFat56-16 9.95 1.62 -83.72% BenchmarkClearFat64-16 18.0 1.86 -89.67% BenchmarkClearFat128-16 30.0 8.08 -73.07% BenchmarkClearFat256-16 52.5 11.3 -78.48% BenchmarkClearFat512-16 97.0 19.0 -80.41% BenchmarkClearFat1024-16 244 34.2 -85.98% Fixes: #19532 Change-Id: If493e28bc1d8e61bc79978498be9f5336a36cd3f Reviewed-on: https://go-review.googlesource.com/38096 Run-TryBot: Lynn Boger <laboger@linux.vnet.ibm.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Michael Munday <munday@ca.ibm.com>
This commit is contained in:
Lynn Boger
parent
d972dc2de9
commit
23bd919136
5 changed files with 426 additions and 305 deletions
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@ -831,62 +831,135 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
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ssaGenISEL(v, ppc64.C_COND_EQ, iselRegs[1], v.Reg())
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case ssa.OpPPC64LoweredZero:
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// Similar to how this is done on ARM,
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// except that PPC MOVDU x,off(y) is *(y+off) = x; y=y+off
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// not store-and-increment.
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// Therefore R3 should be dest-align
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// and arg1 should be dest+size-align
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// HOWEVER, the input dest address cannot be dest-align because
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// that does not necessarily address valid memory and it's not
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// known how that might be optimized. Therefore, correct it in
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// in the expansion:
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// unaligned data doesn't hurt performance
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// for these instructions on power8 or later
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// for sizes >= 64 generate a loop as follows:
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// set up loop counter in CTR, used by BC
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// MOVD len/32,REG_TMP
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// MOVD REG_TMP,CTR
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// loop:
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// MOVD R0,(R3)
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// MOVD R0,8(R3)
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// MOVD R0,16(R3)
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// MOVD R0,24(R3)
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// ADD $32,R3
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// BC 16, 0, loop
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//
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// ADD -8,R3,R3
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// MOVDU R0, 8(R3)
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// CMP R3, Rarg1
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// BL -2(PC)
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// arg1 is the address of the last element to zero
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// auxint is alignment
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var sz int64
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var movu obj.As
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switch {
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case v.AuxInt%8 == 0:
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sz = 8
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movu = ppc64.AMOVDU
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case v.AuxInt%4 == 0:
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sz = 4
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movu = ppc64.AMOVWZU // MOVWU instruction not implemented
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case v.AuxInt%2 == 0:
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sz = 2
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movu = ppc64.AMOVHU
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default:
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sz = 1
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movu = ppc64.AMOVBU
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}
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// any remainder is done as described below
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p := gc.Prog(ppc64.AADD)
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p.Reg = v.Args[0].Reg()
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// for sizes < 64 bytes, first clear as many doublewords as possible,
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// then handle the remainder
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// MOVD R0,(R3)
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// MOVD R0,8(R3)
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// .... etc.
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//
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// the remainder bytes are cleared using one or more
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// of the following instructions with the appropriate
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// offsets depending which instructions are needed
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//
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// MOVW R0,n1(R3) 4 bytes
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// MOVH R0,n2(R3) 2 bytes
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// MOVB R0,n3(R3) 1 byte
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//
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// 7 bytes: MOVW, MOVH, MOVB
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// 6 bytes: MOVW, MOVH
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// 5 bytes: MOVW, MOVB
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// 3 bytes: MOVH, MOVB
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// each loop iteration does 32 bytes
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ctr := v.AuxInt / 32
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// remainder bytes
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rem := v.AuxInt % 32
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// only generate a loop if there is more
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// than 1 iteration.
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if ctr > 1 {
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// Set up CTR loop counter
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p := gc.Prog(ppc64.AMOVD)
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p.From.Type = obj.TYPE_CONST
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p.From.Offset = -sz
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p.From.Offset = ctr
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p.To.Type = obj.TYPE_REG
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p.To.Reg = v.Args[0].Reg()
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p.To.Reg = ppc64.REGTMP
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p = gc.Prog(movu)
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p = gc.Prog(ppc64.AMOVD)
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p.From.Type = obj.TYPE_REG
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p.From.Reg = ppc64.REGTMP
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p.To.Type = obj.TYPE_REG
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p.To.Reg = ppc64.REG_CTR
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// generate 4 MOVDs
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// when this is a loop then the top must be saved
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var top *obj.Prog
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for offset := int64(0); offset < 32; offset += 8 {
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// This is the top of loop
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p := gc.Prog(ppc64.AMOVD)
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p.From.Type = obj.TYPE_REG
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p.From.Reg = ppc64.REG_R0
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p.To.Type = obj.TYPE_MEM
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p.To.Reg = v.Args[0].Reg()
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p.To.Offset = sz
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p.To.Offset = offset
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// Save the top of loop
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if top == nil {
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top = p
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}
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}
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p2 := gc.Prog(ppc64.ACMPU)
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p2.From.Type = obj.TYPE_REG
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p2.From.Reg = v.Args[0].Reg()
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p2.To.Reg = v.Args[1].Reg()
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p2.To.Type = obj.TYPE_REG
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// Increment address for the
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// 4 doublewords just zeroed.
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p = gc.Prog(ppc64.AADD)
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p.Reg = v.Args[0].Reg()
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p.From.Type = obj.TYPE_CONST
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p.From.Offset = 32
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p.To.Type = obj.TYPE_REG
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p.To.Reg = v.Args[0].Reg()
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p3 := gc.Prog(ppc64.ABLT)
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p3.To.Type = obj.TYPE_BRANCH
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gc.Patch(p3, p)
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// Branch back to top of loop
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// based on CTR
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// BC with BO_BCTR generates bdnz
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p = gc.Prog(ppc64.ABC)
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p.From.Type = obj.TYPE_CONST
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p.From.Offset = ppc64.BO_BCTR
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p.Reg = ppc64.REG_R0
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p.To.Type = obj.TYPE_BRANCH
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gc.Patch(p, top)
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}
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// when ctr == 1 the loop was not generated but
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// there are at least 32 bytes to clear, so add
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// that to the remainder to generate the code
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// to clear those doublewords
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if ctr == 1 {
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rem += 32
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}
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// clear the remainder starting at offset zero
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offset := int64(0)
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// first clear as many doublewords as possible
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// then clear remaining sizes as available
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for rem > 0 {
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op, size := ppc64.AMOVB, int64(1)
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switch {
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case rem >= 8:
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op, size = ppc64.AMOVD, 8
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case rem >= 4:
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op, size = ppc64.AMOVW, 4
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case rem >= 2:
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op, size = ppc64.AMOVH, 2
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}
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p := gc.Prog(op)
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p.From.Type = obj.TYPE_REG
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p.From.Reg = ppc64.REG_R0
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p.To.Type = obj.TYPE_MEM
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p.To.Reg = v.Args[0].Reg()
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p.To.Offset = offset
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rem -= size
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offset += size
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}
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case ssa.OpPPC64LoweredMove:
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// Similar to how this is done on ARM,
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@ -485,60 +485,73 @@
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(Store {t} ptr val mem) && t.(Type).Size() == 2 -> (MOVHstore ptr val mem)
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(Store {t} ptr val mem) && t.(Type).Size() == 1 -> (MOVBstore ptr val mem)
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// Using Zero instead of LoweredZero allows the
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// target address to be folded where possible.
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(Zero [0] _ mem) -> mem
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(Zero [1] destptr mem) -> (MOVBstorezero destptr mem)
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(Zero [2] {t} destptr mem) && t.(Type).Alignment()%2 == 0 ->
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(MOVHstorezero destptr mem)
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(Zero [2] destptr mem) ->
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(MOVBstorezero [1] destptr
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(MOVBstorezero [0] destptr mem))
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(Zero [4] {t} destptr mem) && t.(Type).Alignment()%4 == 0 ->
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(MOVWstorezero destptr mem)
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(Zero [4] {t} destptr mem) && t.(Type).Alignment()%2 == 0 ->
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(MOVHstorezero [2] destptr
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(MOVHstorezero [0] destptr mem))
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(Zero [4] destptr mem) ->
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(MOVBstorezero [3] destptr
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(MOVBstorezero [2] destptr
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(MOVBstorezero [1] destptr
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(MOVBstorezero [0] destptr mem))))
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(Zero [8] {t} destptr mem) && t.(Type).Alignment()%8 == 0 ->
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(MOVDstorezero [0] destptr mem)
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(Zero [8] {t} destptr mem) && t.(Type).Alignment()%4 == 0 ->
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(MOVWstorezero [4] destptr
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(MOVWstorezero [0] destptr mem))
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(Zero [8] {t} destptr mem) && t.(Type).Alignment()%2 == 0 ->
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(MOVHstorezero [6] destptr
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(MOVHstorezero [4] destptr
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(MOVHstorezero [2] destptr
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(MOVHstorezero [0] destptr mem))))
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(MOVHstorezero destptr mem)
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(Zero [3] destptr mem) ->
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(MOVBstorezero [2] destptr
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(MOVBstorezero [1] destptr
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(MOVBstorezero [0] destptr mem)))
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(MOVHstorezero destptr mem))
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(Zero [4] destptr mem) ->
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(MOVWstorezero destptr mem)
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(Zero [5] destptr mem) ->
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(MOVBstorezero [4] destptr
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(MOVWstorezero destptr mem))
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(Zero [6] destptr mem) ->
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(MOVHstorezero [4] destptr
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(MOVWstorezero destptr mem))
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(Zero [7] destptr mem) ->
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(MOVBstorezero [6] destptr
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(MOVHstorezero [4] destptr
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(MOVWstorezero destptr mem)))
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(Zero [8] destptr mem) ->
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(MOVDstorezero destptr mem)
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// Zero small numbers of words directly.
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(Zero [16] {t} destptr mem) && t.(Type).Alignment()%8 == 0 ->
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(Zero [12] destptr mem) ->
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(MOVWstorezero [8] destptr
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(MOVDstorezero [0] destptr mem))
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(Zero [16] destptr mem) ->
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(MOVDstorezero [8] destptr
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(MOVDstorezero [0] destptr mem))
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(Zero [24] {t} destptr mem) && t.(Type).Alignment()%8 == 0 ->
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(Zero [24] destptr mem) ->
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(MOVDstorezero [16] destptr
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(MOVDstorezero [8] destptr
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(MOVDstorezero [0] destptr mem)))
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(Zero [32] {t} destptr mem) && t.(Type).Alignment()%8 == 0 ->
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(Zero [32] destptr mem) ->
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(MOVDstorezero [24] destptr
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(MOVDstorezero [16] destptr
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(MOVDstorezero [8] destptr
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(MOVDstorezero [0] destptr mem))))
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// Large zeroing uses a loop
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(Zero [s] {t} ptr mem)
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&& (s > 512 || config.noDuffDevice) || t.(Type).Alignment()%8 != 0 ->
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(LoweredZero [t.(Type).Alignment()]
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ptr
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(ADDconst <ptr.Type> ptr [s-moveSize(t.(Type).Alignment(), config)])
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mem)
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(Zero [40] destptr mem) ->
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(MOVDstorezero [32] destptr
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(MOVDstorezero [24] destptr
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(MOVDstorezero [16] destptr
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(MOVDstorezero [8] destptr
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(MOVDstorezero [0] destptr mem)))))
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(Zero [48] destptr mem) ->
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(MOVDstorezero [40] destptr
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(MOVDstorezero [32] destptr
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(MOVDstorezero [24] destptr
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(MOVDstorezero [16] destptr
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(MOVDstorezero [8] destptr
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(MOVDstorezero [0] destptr mem))))))
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(Zero [56] destptr mem) ->
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(MOVDstorezero [48] destptr
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(MOVDstorezero [40] destptr
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(MOVDstorezero [32] destptr
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(MOVDstorezero [24] destptr
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(MOVDstorezero [16] destptr
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(MOVDstorezero [8] destptr
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(MOVDstorezero [0] destptr mem)))))))
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// Handle cases not handled above
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(Zero [s] ptr mem) -> (LoweredZero [s] ptr mem)
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// moves
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(Move [0] _ _ mem) -> mem
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@ -312,19 +312,37 @@ func init() {
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// large or unaligned zeroing
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// arg0 = address of memory to zero (in R3, changed as side effect)
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// arg1 = address of the last element to zero
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// arg2 = mem
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// returns mem
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// ADD -8,R3,R3 // intermediate value not valid GC ptr, cannot expose to opt+GC
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// MOVDU R0, 8(R3)
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// CMP R3, Rarg1
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// BLE -2(PC)
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//
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// a loop is generated when there is more than one iteration
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// needed to clear 4 doublewords
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//
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// MOVD $len/32,R31
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// MOVD R31,CTR
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// loop:
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// MOVD R0,(R3)
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// MOVD R0,8(R3)
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// MOVD R0,16(R3)
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// MOVD R0,24(R3)
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// ADD R3,32
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// BC loop
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// remaining doubleword clears generated as needed
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// MOVD R0,(R3)
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// MOVD R0,8(R3)
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// MOVD R0,16(R3)
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// MOVD R0,24(R3)
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// one or more of these to clear remainder < 8 bytes
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// MOVW R0,n1(R3)
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// MOVH R0,n2(R3)
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// MOVB R0,n3(R3)
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{
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name: "LoweredZero",
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aux: "Int64",
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argLength: 3,
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argLength: 2,
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reg: regInfo{
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inputs: []regMask{buildReg("R3"), gp},
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inputs: []regMask{buildReg("R3")},
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clobbers: buildReg("R3"),
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},
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clobberFlags: true,
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@ -17368,13 +17368,12 @@ var opcodeTable = [...]opInfo{
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{
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name: "LoweredZero",
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auxType: auxInt64,
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argLen: 3,
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argLen: 2,
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clobberFlags: true,
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faultOnNilArg0: true,
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reg: regInfo{
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inputs: []inputInfo{
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{0, 8}, // R3
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{1, 1073733624}, // R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 R26 R27 R28 R29
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},
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clobbers: 8, // R3
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},
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@ -9656,8 +9656,6 @@ func rewriteValuePPC64_OpXor8(v *Value) bool {
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func rewriteValuePPC64_OpZero(v *Value) bool {
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b := v.Block
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_ = b
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config := b.Func.Config
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_ = config
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// match: (Zero [0] _ mem)
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// cond:
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// result: mem
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@ -9685,187 +9683,23 @@ func rewriteValuePPC64_OpZero(v *Value) bool {
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v.AddArg(mem)
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return true
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}
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// match: (Zero [2] {t} destptr mem)
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// cond: t.(Type).Alignment()%2 == 0
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// match: (Zero [2] destptr mem)
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// cond:
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// result: (MOVHstorezero destptr mem)
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for {
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if v.AuxInt != 2 {
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break
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}
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t := v.Aux
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destptr := v.Args[0]
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mem := v.Args[1]
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if !(t.(Type).Alignment()%2 == 0) {
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break
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}
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v.reset(OpPPC64MOVHstorezero)
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v.AddArg(destptr)
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v.AddArg(mem)
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return true
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}
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// match: (Zero [2] destptr mem)
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// cond:
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// result: (MOVBstorezero [1] destptr (MOVBstorezero [0] destptr mem))
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for {
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if v.AuxInt != 2 {
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break
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}
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destptr := v.Args[0]
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mem := v.Args[1]
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v.reset(OpPPC64MOVBstorezero)
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v.AuxInt = 1
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v.AddArg(destptr)
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v0 := b.NewValue0(v.Pos, OpPPC64MOVBstorezero, TypeMem)
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v0.AuxInt = 0
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v0.AddArg(destptr)
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v0.AddArg(mem)
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v.AddArg(v0)
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return true
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}
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// match: (Zero [4] {t} destptr mem)
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// cond: t.(Type).Alignment()%4 == 0
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// result: (MOVWstorezero destptr mem)
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for {
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if v.AuxInt != 4 {
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break
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}
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t := v.Aux
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destptr := v.Args[0]
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mem := v.Args[1]
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if !(t.(Type).Alignment()%4 == 0) {
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break
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}
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v.reset(OpPPC64MOVWstorezero)
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v.AddArg(destptr)
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v.AddArg(mem)
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return true
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||||
}
|
||||
// match: (Zero [4] {t} destptr mem)
|
||||
// cond: t.(Type).Alignment()%2 == 0
|
||||
// result: (MOVHstorezero [2] destptr (MOVHstorezero [0] destptr mem))
|
||||
for {
|
||||
if v.AuxInt != 4 {
|
||||
break
|
||||
}
|
||||
t := v.Aux
|
||||
destptr := v.Args[0]
|
||||
mem := v.Args[1]
|
||||
if !(t.(Type).Alignment()%2 == 0) {
|
||||
break
|
||||
}
|
||||
v.reset(OpPPC64MOVHstorezero)
|
||||
v.AuxInt = 2
|
||||
v.AddArg(destptr)
|
||||
v0 := b.NewValue0(v.Pos, OpPPC64MOVHstorezero, TypeMem)
|
||||
v0.AuxInt = 0
|
||||
v0.AddArg(destptr)
|
||||
v0.AddArg(mem)
|
||||
v.AddArg(v0)
|
||||
return true
|
||||
}
|
||||
// match: (Zero [4] destptr mem)
|
||||
// cond:
|
||||
// result: (MOVBstorezero [3] destptr (MOVBstorezero [2] destptr (MOVBstorezero [1] destptr (MOVBstorezero [0] destptr mem))))
|
||||
for {
|
||||
if v.AuxInt != 4 {
|
||||
break
|
||||
}
|
||||
destptr := v.Args[0]
|
||||
mem := v.Args[1]
|
||||
v.reset(OpPPC64MOVBstorezero)
|
||||
v.AuxInt = 3
|
||||
v.AddArg(destptr)
|
||||
v0 := b.NewValue0(v.Pos, OpPPC64MOVBstorezero, TypeMem)
|
||||
v0.AuxInt = 2
|
||||
v0.AddArg(destptr)
|
||||
v1 := b.NewValue0(v.Pos, OpPPC64MOVBstorezero, TypeMem)
|
||||
v1.AuxInt = 1
|
||||
v1.AddArg(destptr)
|
||||
v2 := b.NewValue0(v.Pos, OpPPC64MOVBstorezero, TypeMem)
|
||||
v2.AuxInt = 0
|
||||
v2.AddArg(destptr)
|
||||
v2.AddArg(mem)
|
||||
v1.AddArg(v2)
|
||||
v0.AddArg(v1)
|
||||
v.AddArg(v0)
|
||||
return true
|
||||
}
|
||||
// match: (Zero [8] {t} destptr mem)
|
||||
// cond: t.(Type).Alignment()%8 == 0
|
||||
// result: (MOVDstorezero [0] destptr mem)
|
||||
for {
|
||||
if v.AuxInt != 8 {
|
||||
break
|
||||
}
|
||||
t := v.Aux
|
||||
destptr := v.Args[0]
|
||||
mem := v.Args[1]
|
||||
if !(t.(Type).Alignment()%8 == 0) {
|
||||
break
|
||||
}
|
||||
v.reset(OpPPC64MOVDstorezero)
|
||||
v.AuxInt = 0
|
||||
v.AddArg(destptr)
|
||||
v.AddArg(mem)
|
||||
return true
|
||||
}
|
||||
// match: (Zero [8] {t} destptr mem)
|
||||
// cond: t.(Type).Alignment()%4 == 0
|
||||
// result: (MOVWstorezero [4] destptr (MOVWstorezero [0] destptr mem))
|
||||
for {
|
||||
if v.AuxInt != 8 {
|
||||
break
|
||||
}
|
||||
t := v.Aux
|
||||
destptr := v.Args[0]
|
||||
mem := v.Args[1]
|
||||
if !(t.(Type).Alignment()%4 == 0) {
|
||||
break
|
||||
}
|
||||
v.reset(OpPPC64MOVWstorezero)
|
||||
v.AuxInt = 4
|
||||
v.AddArg(destptr)
|
||||
v0 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, TypeMem)
|
||||
v0.AuxInt = 0
|
||||
v0.AddArg(destptr)
|
||||
v0.AddArg(mem)
|
||||
v.AddArg(v0)
|
||||
return true
|
||||
}
|
||||
// match: (Zero [8] {t} destptr mem)
|
||||
// cond: t.(Type).Alignment()%2 == 0
|
||||
// result: (MOVHstorezero [6] destptr (MOVHstorezero [4] destptr (MOVHstorezero [2] destptr (MOVHstorezero [0] destptr mem))))
|
||||
for {
|
||||
if v.AuxInt != 8 {
|
||||
break
|
||||
}
|
||||
t := v.Aux
|
||||
destptr := v.Args[0]
|
||||
mem := v.Args[1]
|
||||
if !(t.(Type).Alignment()%2 == 0) {
|
||||
break
|
||||
}
|
||||
v.reset(OpPPC64MOVHstorezero)
|
||||
v.AuxInt = 6
|
||||
v.AddArg(destptr)
|
||||
v0 := b.NewValue0(v.Pos, OpPPC64MOVHstorezero, TypeMem)
|
||||
v0.AuxInt = 4
|
||||
v0.AddArg(destptr)
|
||||
v1 := b.NewValue0(v.Pos, OpPPC64MOVHstorezero, TypeMem)
|
||||
v1.AuxInt = 2
|
||||
v1.AddArg(destptr)
|
||||
v2 := b.NewValue0(v.Pos, OpPPC64MOVHstorezero, TypeMem)
|
||||
v2.AuxInt = 0
|
||||
v2.AddArg(destptr)
|
||||
v2.AddArg(mem)
|
||||
v1.AddArg(v2)
|
||||
v0.AddArg(v1)
|
||||
v.AddArg(v0)
|
||||
return true
|
||||
}
|
||||
// match: (Zero [3] destptr mem)
|
||||
// cond:
|
||||
// result: (MOVBstorezero [2] destptr (MOVBstorezero [1] destptr (MOVBstorezero [0] destptr mem)))
|
||||
// result: (MOVBstorezero [2] destptr (MOVHstorezero destptr mem))
|
||||
for {
|
||||
if v.AuxInt != 3 {
|
||||
break
|
||||
|
|
@ -9875,30 +9709,126 @@ func rewriteValuePPC64_OpZero(v *Value) bool {
|
|||
v.reset(OpPPC64MOVBstorezero)
|
||||
v.AuxInt = 2
|
||||
v.AddArg(destptr)
|
||||
v0 := b.NewValue0(v.Pos, OpPPC64MOVBstorezero, TypeMem)
|
||||
v0.AuxInt = 1
|
||||
v0 := b.NewValue0(v.Pos, OpPPC64MOVHstorezero, TypeMem)
|
||||
v0.AddArg(destptr)
|
||||
v1 := b.NewValue0(v.Pos, OpPPC64MOVBstorezero, TypeMem)
|
||||
v1.AuxInt = 0
|
||||
v0.AddArg(mem)
|
||||
v.AddArg(v0)
|
||||
return true
|
||||
}
|
||||
// match: (Zero [4] destptr mem)
|
||||
// cond:
|
||||
// result: (MOVWstorezero destptr mem)
|
||||
for {
|
||||
if v.AuxInt != 4 {
|
||||
break
|
||||
}
|
||||
destptr := v.Args[0]
|
||||
mem := v.Args[1]
|
||||
v.reset(OpPPC64MOVWstorezero)
|
||||
v.AddArg(destptr)
|
||||
v.AddArg(mem)
|
||||
return true
|
||||
}
|
||||
// match: (Zero [5] destptr mem)
|
||||
// cond:
|
||||
// result: (MOVBstorezero [4] destptr (MOVWstorezero destptr mem))
|
||||
for {
|
||||
if v.AuxInt != 5 {
|
||||
break
|
||||
}
|
||||
destptr := v.Args[0]
|
||||
mem := v.Args[1]
|
||||
v.reset(OpPPC64MOVBstorezero)
|
||||
v.AuxInt = 4
|
||||
v.AddArg(destptr)
|
||||
v0 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, TypeMem)
|
||||
v0.AddArg(destptr)
|
||||
v0.AddArg(mem)
|
||||
v.AddArg(v0)
|
||||
return true
|
||||
}
|
||||
// match: (Zero [6] destptr mem)
|
||||
// cond:
|
||||
// result: (MOVHstorezero [4] destptr (MOVWstorezero destptr mem))
|
||||
for {
|
||||
if v.AuxInt != 6 {
|
||||
break
|
||||
}
|
||||
destptr := v.Args[0]
|
||||
mem := v.Args[1]
|
||||
v.reset(OpPPC64MOVHstorezero)
|
||||
v.AuxInt = 4
|
||||
v.AddArg(destptr)
|
||||
v0 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, TypeMem)
|
||||
v0.AddArg(destptr)
|
||||
v0.AddArg(mem)
|
||||
v.AddArg(v0)
|
||||
return true
|
||||
}
|
||||
// match: (Zero [7] destptr mem)
|
||||
// cond:
|
||||
// result: (MOVBstorezero [6] destptr (MOVHstorezero [4] destptr (MOVWstorezero destptr mem)))
|
||||
for {
|
||||
if v.AuxInt != 7 {
|
||||
break
|
||||
}
|
||||
destptr := v.Args[0]
|
||||
mem := v.Args[1]
|
||||
v.reset(OpPPC64MOVBstorezero)
|
||||
v.AuxInt = 6
|
||||
v.AddArg(destptr)
|
||||
v0 := b.NewValue0(v.Pos, OpPPC64MOVHstorezero, TypeMem)
|
||||
v0.AuxInt = 4
|
||||
v0.AddArg(destptr)
|
||||
v1 := b.NewValue0(v.Pos, OpPPC64MOVWstorezero, TypeMem)
|
||||
v1.AddArg(destptr)
|
||||
v1.AddArg(mem)
|
||||
v0.AddArg(v1)
|
||||
v.AddArg(v0)
|
||||
return true
|
||||
}
|
||||
// match: (Zero [16] {t} destptr mem)
|
||||
// cond: t.(Type).Alignment()%8 == 0
|
||||
// match: (Zero [8] destptr mem)
|
||||
// cond:
|
||||
// result: (MOVDstorezero destptr mem)
|
||||
for {
|
||||
if v.AuxInt != 8 {
|
||||
break
|
||||
}
|
||||
destptr := v.Args[0]
|
||||
mem := v.Args[1]
|
||||
v.reset(OpPPC64MOVDstorezero)
|
||||
v.AddArg(destptr)
|
||||
v.AddArg(mem)
|
||||
return true
|
||||
}
|
||||
// match: (Zero [12] destptr mem)
|
||||
// cond:
|
||||
// result: (MOVWstorezero [8] destptr (MOVDstorezero [0] destptr mem))
|
||||
for {
|
||||
if v.AuxInt != 12 {
|
||||
break
|
||||
}
|
||||
destptr := v.Args[0]
|
||||
mem := v.Args[1]
|
||||
v.reset(OpPPC64MOVWstorezero)
|
||||
v.AuxInt = 8
|
||||
v.AddArg(destptr)
|
||||
v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, TypeMem)
|
||||
v0.AuxInt = 0
|
||||
v0.AddArg(destptr)
|
||||
v0.AddArg(mem)
|
||||
v.AddArg(v0)
|
||||
return true
|
||||
}
|
||||
// match: (Zero [16] destptr mem)
|
||||
// cond:
|
||||
// result: (MOVDstorezero [8] destptr (MOVDstorezero [0] destptr mem))
|
||||
for {
|
||||
if v.AuxInt != 16 {
|
||||
break
|
||||
}
|
||||
t := v.Aux
|
||||
destptr := v.Args[0]
|
||||
mem := v.Args[1]
|
||||
if !(t.(Type).Alignment()%8 == 0) {
|
||||
break
|
||||
}
|
||||
v.reset(OpPPC64MOVDstorezero)
|
||||
v.AuxInt = 8
|
||||
v.AddArg(destptr)
|
||||
|
|
@ -9909,19 +9839,15 @@ func rewriteValuePPC64_OpZero(v *Value) bool {
|
|||
v.AddArg(v0)
|
||||
return true
|
||||
}
|
||||
// match: (Zero [24] {t} destptr mem)
|
||||
// cond: t.(Type).Alignment()%8 == 0
|
||||
// match: (Zero [24] destptr mem)
|
||||
// cond:
|
||||
// result: (MOVDstorezero [16] destptr (MOVDstorezero [8] destptr (MOVDstorezero [0] destptr mem)))
|
||||
for {
|
||||
if v.AuxInt != 24 {
|
||||
break
|
||||
}
|
||||
t := v.Aux
|
||||
destptr := v.Args[0]
|
||||
mem := v.Args[1]
|
||||
if !(t.(Type).Alignment()%8 == 0) {
|
||||
break
|
||||
}
|
||||
v.reset(OpPPC64MOVDstorezero)
|
||||
v.AuxInt = 16
|
||||
v.AddArg(destptr)
|
||||
|
|
@ -9936,19 +9862,15 @@ func rewriteValuePPC64_OpZero(v *Value) bool {
|
|||
v.AddArg(v0)
|
||||
return true
|
||||
}
|
||||
// match: (Zero [32] {t} destptr mem)
|
||||
// cond: t.(Type).Alignment()%8 == 0
|
||||
// match: (Zero [32] destptr mem)
|
||||
// cond:
|
||||
// result: (MOVDstorezero [24] destptr (MOVDstorezero [16] destptr (MOVDstorezero [8] destptr (MOVDstorezero [0] destptr mem))))
|
||||
for {
|
||||
if v.AuxInt != 32 {
|
||||
break
|
||||
}
|
||||
t := v.Aux
|
||||
destptr := v.Args[0]
|
||||
mem := v.Args[1]
|
||||
if !(t.(Type).Alignment()%8 == 0) {
|
||||
break
|
||||
}
|
||||
v.reset(OpPPC64MOVDstorezero)
|
||||
v.AuxInt = 24
|
||||
v.AddArg(destptr)
|
||||
|
|
@ -9967,28 +9889,124 @@ func rewriteValuePPC64_OpZero(v *Value) bool {
|
|||
v.AddArg(v0)
|
||||
return true
|
||||
}
|
||||
// match: (Zero [s] {t} ptr mem)
|
||||
// cond: (s > 512 || config.noDuffDevice) || t.(Type).Alignment()%8 != 0
|
||||
// result: (LoweredZero [t.(Type).Alignment()] ptr (ADDconst <ptr.Type> ptr [s-moveSize(t.(Type).Alignment(), config)]) mem)
|
||||
// match: (Zero [40] destptr mem)
|
||||
// cond:
|
||||
// result: (MOVDstorezero [32] destptr (MOVDstorezero [24] destptr (MOVDstorezero [16] destptr (MOVDstorezero [8] destptr (MOVDstorezero [0] destptr mem)))))
|
||||
for {
|
||||
s := v.AuxInt
|
||||
t := v.Aux
|
||||
ptr := v.Args[0]
|
||||
mem := v.Args[1]
|
||||
if !((s > 512 || config.noDuffDevice) || t.(Type).Alignment()%8 != 0) {
|
||||
if v.AuxInt != 40 {
|
||||
break
|
||||
}
|
||||
v.reset(OpPPC64LoweredZero)
|
||||
v.AuxInt = t.(Type).Alignment()
|
||||
v.AddArg(ptr)
|
||||
v0 := b.NewValue0(v.Pos, OpPPC64ADDconst, ptr.Type)
|
||||
v0.AuxInt = s - moveSize(t.(Type).Alignment(), config)
|
||||
v0.AddArg(ptr)
|
||||
destptr := v.Args[0]
|
||||
mem := v.Args[1]
|
||||
v.reset(OpPPC64MOVDstorezero)
|
||||
v.AuxInt = 32
|
||||
v.AddArg(destptr)
|
||||
v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, TypeMem)
|
||||
v0.AuxInt = 24
|
||||
v0.AddArg(destptr)
|
||||
v1 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, TypeMem)
|
||||
v1.AuxInt = 16
|
||||
v1.AddArg(destptr)
|
||||
v2 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, TypeMem)
|
||||
v2.AuxInt = 8
|
||||
v2.AddArg(destptr)
|
||||
v3 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, TypeMem)
|
||||
v3.AuxInt = 0
|
||||
v3.AddArg(destptr)
|
||||
v3.AddArg(mem)
|
||||
v2.AddArg(v3)
|
||||
v1.AddArg(v2)
|
||||
v0.AddArg(v1)
|
||||
v.AddArg(v0)
|
||||
return true
|
||||
}
|
||||
// match: (Zero [48] destptr mem)
|
||||
// cond:
|
||||
// result: (MOVDstorezero [40] destptr (MOVDstorezero [32] destptr (MOVDstorezero [24] destptr (MOVDstorezero [16] destptr (MOVDstorezero [8] destptr (MOVDstorezero [0] destptr mem))))))
|
||||
for {
|
||||
if v.AuxInt != 48 {
|
||||
break
|
||||
}
|
||||
destptr := v.Args[0]
|
||||
mem := v.Args[1]
|
||||
v.reset(OpPPC64MOVDstorezero)
|
||||
v.AuxInt = 40
|
||||
v.AddArg(destptr)
|
||||
v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, TypeMem)
|
||||
v0.AuxInt = 32
|
||||
v0.AddArg(destptr)
|
||||
v1 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, TypeMem)
|
||||
v1.AuxInt = 24
|
||||
v1.AddArg(destptr)
|
||||
v2 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, TypeMem)
|
||||
v2.AuxInt = 16
|
||||
v2.AddArg(destptr)
|
||||
v3 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, TypeMem)
|
||||
v3.AuxInt = 8
|
||||
v3.AddArg(destptr)
|
||||
v4 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, TypeMem)
|
||||
v4.AuxInt = 0
|
||||
v4.AddArg(destptr)
|
||||
v4.AddArg(mem)
|
||||
v3.AddArg(v4)
|
||||
v2.AddArg(v3)
|
||||
v1.AddArg(v2)
|
||||
v0.AddArg(v1)
|
||||
v.AddArg(v0)
|
||||
return true
|
||||
}
|
||||
// match: (Zero [56] destptr mem)
|
||||
// cond:
|
||||
// result: (MOVDstorezero [48] destptr (MOVDstorezero [40] destptr (MOVDstorezero [32] destptr (MOVDstorezero [24] destptr (MOVDstorezero [16] destptr (MOVDstorezero [8] destptr (MOVDstorezero [0] destptr mem)))))))
|
||||
for {
|
||||
if v.AuxInt != 56 {
|
||||
break
|
||||
}
|
||||
destptr := v.Args[0]
|
||||
mem := v.Args[1]
|
||||
v.reset(OpPPC64MOVDstorezero)
|
||||
v.AuxInt = 48
|
||||
v.AddArg(destptr)
|
||||
v0 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, TypeMem)
|
||||
v0.AuxInt = 40
|
||||
v0.AddArg(destptr)
|
||||
v1 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, TypeMem)
|
||||
v1.AuxInt = 32
|
||||
v1.AddArg(destptr)
|
||||
v2 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, TypeMem)
|
||||
v2.AuxInt = 24
|
||||
v2.AddArg(destptr)
|
||||
v3 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, TypeMem)
|
||||
v3.AuxInt = 16
|
||||
v3.AddArg(destptr)
|
||||
v4 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, TypeMem)
|
||||
v4.AuxInt = 8
|
||||
v4.AddArg(destptr)
|
||||
v5 := b.NewValue0(v.Pos, OpPPC64MOVDstorezero, TypeMem)
|
||||
v5.AuxInt = 0
|
||||
v5.AddArg(destptr)
|
||||
v5.AddArg(mem)
|
||||
v4.AddArg(v5)
|
||||
v3.AddArg(v4)
|
||||
v2.AddArg(v3)
|
||||
v1.AddArg(v2)
|
||||
v0.AddArg(v1)
|
||||
v.AddArg(v0)
|
||||
return true
|
||||
}
|
||||
// match: (Zero [s] ptr mem)
|
||||
// cond:
|
||||
// result: (LoweredZero [s] ptr mem)
|
||||
for {
|
||||
s := v.AuxInt
|
||||
ptr := v.Args[0]
|
||||
mem := v.Args[1]
|
||||
v.reset(OpPPC64LoweredZero)
|
||||
v.AuxInt = s
|
||||
v.AddArg(ptr)
|
||||
v.AddArg(mem)
|
||||
return true
|
||||
}
|
||||
return false
|
||||
}
|
||||
func rewriteValuePPC64_OpZeroExt16to32(v *Value) bool {
|
||||
// match: (ZeroExt16to32 x)
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue