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cmd/internal/obj/s390x: add VSTRL instruction
VSTRL (Vector Store Righmost with Length) instruction is used to store specified number of rightmost bytes of a Vector register into a memory location. This change will add VSTRL into the Go asm for s390x architecture. An upcoming PR of bigmod/nat_s390x.s will use this instruction for performance improvement. Change-Id: I18b5b55025930fda78adb466cc0f26238f73dd6e Reviewed-on: https://go-review.googlesource.com/c/go/+/755520 Reviewed-by: Keith Randall <khr@google.com> Auto-Submit: Keith Randall <khr@golang.org> Reviewed-by: Keith Randall <khr@golang.org> Reviewed-by: Carlos Amedee <carlos@golang.org> LUCI-TryBot-Result: golang-scoped@luci-project-accounts.iam.gserviceaccount.com <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Srinivas Pokala <Pokala.Srinivas@ibm.com>
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5 changed files with 32 additions and 1 deletions
1
src/cmd/asm/internal/asm/testdata/s390x.s
vendored
1
src/cmd/asm/internal/asm/testdata/s390x.s
vendored
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@ -456,6 +456,7 @@ TEXT main·foo(SB),DUPOK|NOSPLIT,$16-0 // TEXT main.foo(SB), DUPOK|NOSPLIT, $16-
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VST V1, (R15) // e710f000000e
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VL (R15), V31 // e7f0f0000806
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VST V31, (R15) // e7f0f000080e
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VSTRL V4, $6, 1(R4) // e6064001403d
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VESLB $5, V14 // e7ee00050030
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VESRAG $0, V15, V16 // e70f0000383a
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VLM (R15), V8, V23 // e787f0000436
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@ -946,6 +946,7 @@ const (
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AVSTEG
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AVSTEB
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AVSTM
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AVSTRL
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AVSTL
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AVSTRC
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AVSTRCB
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@ -669,6 +669,7 @@ var Anames = []string{
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"VSTEG",
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"VSTEB",
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"VSTM",
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"VSTRL",
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"VSTL",
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"VSTRC",
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"VSTRCB",
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@ -458,6 +458,10 @@ var optab = []Optab{
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// MVC storage and storage
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{i: 127, as: AMVCLE, a1: C_LOREG, a2: C_REG, a6: C_REG},
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{i: 127, as: AMVCLE, a1: C_SCON, a2: C_REG, a6: C_REG},
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// VSI store rightmost with length
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{i: 129, as: AVSTRL, a1: C_VREG, a3: C_SCON, a6: C_SOREG},
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{i: 129, as: AVSTRL, a1: C_VREG, a3: C_SCON, a6: C_SAUTO},
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}
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var oprange [ALAST & obj.AMask][]Optab
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@ -2634,6 +2638,7 @@ const (
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op_VSTEG uint32 = 0xE70A // VRX VECTOR STORE ELEMENT (64)
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op_VSTEB uint32 = 0xE708 // VRX VECTOR STORE ELEMENT (8)
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op_VSTM uint32 = 0xE73E // VRS-a VECTOR STORE MULTIPLE
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op_VSTRL uint32 = 0xE63D // VSI VECTOR STORE RIGHTMOST WITH LENGTH
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op_VSTL uint32 = 0xE73F // VRS-b VECTOR STORE WITH LENGTH
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op_VSTRC uint32 = 0xE78A // VRR-d VECTOR STRING RANGE COMPARE
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op_VS uint32 = 0xE7F7 // VRR-c VECTOR SUBTRACT
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@ -4459,7 +4464,7 @@ func (c *ctxtz) asmout(p *obj.Prog, asm *[]byte) {
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}
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zRRF(opcode, uint32(p.Reg), 0, uint32(p.From.Reg), uint32(p.To.Reg), asm)
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case 127:
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case 127: // RS-a Move Long Extended
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// NOTE: Mapping MVCLE operands is as follows:
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// Instruction Format: MVCLE R1,R3,D2(B2)
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// R1 - prog.To (for Destination)
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@ -4482,6 +4487,17 @@ func (c *ctxtz) asmout(p *obj.Prog, asm *[]byte) {
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m5 := singleElementMask(p.As)
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m6 := uint32(c.vregoff(&p.From))
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zVRRc(op, uint32(p.To.Reg), uint32(p.Reg), uint32(p.GetFrom3().Reg), m6, m5, m4, asm)
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case 129: // VSI Vector Store Rightmost with Length
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op, _, _ := vop(p.As)
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v1 := p.From.Reg
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b2 := p.To.Reg
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if b2 == 0 {
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b2 = REGSP
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}
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d2 := uint32(c.vregoff(&p.To))
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i3 := uint32(c.vregoff(p.GetFrom3()))
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zVSI(op, uint32(v1), uint32(b2), d2, i3, asm)
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}
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}
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@ -5081,3 +5097,13 @@ func zVRIe(op, v1, v2, i3, m5, m4 uint32, asm *[]byte) {
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(uint8(m4)<<4)|rxb(v1, v2, 0, 0),
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uint8(op))
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}
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func zVSI(op, v1, b2, d2, i3 uint32, asm *[]byte) {
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*asm = append(*asm,
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uint8(op>>8),
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uint8(i3),
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(uint8(b2)<<4)|(uint8(d2>>8)&0xf),
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uint8(d2),
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(uint8(v1)<<4)|rxb(v1, 0, 0, 0),
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uint8(op))
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}
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@ -915,6 +915,8 @@ func vop(as obj.As) (opcode, es, cs uint32) {
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return op_VSTEB, 0, 0
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case AVSTM:
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return op_VSTM, 0, 0
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case AVSTRL:
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return op_VSTRL, 0, 0
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case AVSTL:
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return op_VSTL, 0, 0
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case AVSTRC:
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