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cmd/internal/obj/loong64: add {V,XV}SEQ.{B,H,W,D} instructions support
Go asm syntax:
VSEQ{B,H,W,V} VJ, VK, VD
XVSEQ{B,H,W,V} XJ, XK, XD
Equivalent platform assembler syntax:
vseq.{b,w,h,d} vd, vj, vk
xvseq.{b,w,h,d} xd, xj, xk
Change-Id: Ia87277b12c817ebc41a46f4c3d09f4b76995ff2f
Reviewed-on: https://go-review.googlesource.com/c/go/+/616076
Reviewed-by: Meidan Li <limeidan@loongson.cn>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
Reviewed-by: Qiqi Huang <huangqiqi@loongson.cn>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
Reviewed-by: Cherry Mui <cherryyz@google.com>
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4 changed files with 55 additions and 0 deletions
10
src/cmd/asm/internal/asm/testdata/loong64enc1.s
vendored
10
src/cmd/asm/internal/asm/testdata/loong64enc1.s
vendored
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@ -433,3 +433,13 @@ lable2:
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XVMOVQ -2044(R4), X5 // 8510a02c
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XVMOVQ -2044(R4), X5 // 8510a02c
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XVMOVQ y+16(FP), X6 // 0660802c
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XVMOVQ y+16(FP), X6 // 0660802c
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XVMOVQ x+2030(FP), X7 // 07d89f2c
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XVMOVQ x+2030(FP), X7 // 07d89f2c
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// VSEQ{B,H,W,V}, XVSEQ{B,H,W,V} instruction
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VSEQB V1, V2, V3 // 43040070
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VSEQH V1, V2, V3 // 43840070
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VSEQW V1, V2, V3 // 43040170
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VSEQV V1, V2, V3 // 43840170
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XVSEQB X3, X2, X4 // 440c0074
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XVSEQH X3, X2, X4 // 448c0074
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XVSEQW X3, X2, X4 // 440c0174
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XVSEQV X3, X2, X4 // 448c0174
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@ -628,6 +628,16 @@ const (
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AVMOVQ
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AVMOVQ
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AXVMOVQ
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AXVMOVQ
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// LSX and LASX integer comparison instruction
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AVSEQB
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AXVSEQB
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AVSEQH
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AXVSEQH
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AVSEQW
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AXVSEQW
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AVSEQV
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AXVSEQV
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ALAST
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ALAST
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// aliases
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// aliases
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@ -257,5 +257,13 @@ var Anames = []string{
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"FTINTRNEVD",
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"FTINTRNEVD",
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"VMOVQ",
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"VMOVQ",
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"XVMOVQ",
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"XVMOVQ",
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"VSEQB",
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"XVSEQB",
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"VSEQH",
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"XVSEQH",
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"VSEQW",
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"XVSEQW",
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"VSEQV",
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"XVSEQV",
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"LAST",
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"LAST",
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}
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}
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@ -85,6 +85,8 @@ var optab = []Optab{
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{AADDF, C_FREG, C_NONE, C_NONE, C_FREG, C_NONE, 2, 4, 0, 0},
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{AADDF, C_FREG, C_NONE, C_NONE, C_FREG, C_NONE, 2, 4, 0, 0},
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{AADDF, C_FREG, C_FREG, C_NONE, C_FREG, C_NONE, 2, 4, 0, 0},
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{AADDF, C_FREG, C_FREG, C_NONE, C_FREG, C_NONE, 2, 4, 0, 0},
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{ACMPEQF, C_FREG, C_FREG, C_NONE, C_FCCREG, C_NONE, 2, 4, 0, 0},
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{ACMPEQF, C_FREG, C_FREG, C_NONE, C_FCCREG, C_NONE, 2, 4, 0, 0},
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{AVSEQB, C_VREG, C_VREG, C_NONE, C_VREG, C_NONE, 2, 4, 0, 0},
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{AXVSEQB, C_XREG, C_XREG, C_NONE, C_XREG, C_NONE, 2, 4, 0, 0},
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{ACLOW, C_REG, C_NONE, C_NONE, C_REG, C_NONE, 9, 4, 0, 0},
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{ACLOW, C_REG, C_NONE, C_NONE, C_REG, C_NONE, 9, 4, 0, 0},
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{AABSF, C_FREG, C_NONE, C_NONE, C_FREG, C_NONE, 9, 4, 0, 0},
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{AABSF, C_FREG, C_NONE, C_NONE, C_FREG, C_NONE, 9, 4, 0, 0},
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@ -1283,6 +1285,15 @@ func buildop(ctxt *obj.Link) {
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}
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}
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opset(i, r0)
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opset(i, r0)
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}
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}
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case AVSEQB:
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opset(AVSEQH, r0)
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opset(AVSEQW, r0)
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opset(AVSEQV, r0)
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case AXVSEQB:
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opset(AXVSEQH, r0)
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opset(AXVSEQW, r0)
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opset(AXVSEQV, r0)
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}
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}
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}
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}
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}
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}
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@ -2125,6 +2136,22 @@ func (c *ctxt0) oprrr(a obj.As) uint32 {
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return 0x07088 << 15 // vstx
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return 0x07088 << 15 // vstx
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case AXVMOVQ:
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case AXVMOVQ:
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return 0x07098 << 15 // xvstx
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return 0x07098 << 15 // xvstx
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case AVSEQB:
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return 0x0e000 << 15 // vseq.b
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case AXVSEQB:
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return 0x0e800 << 15 // xvseq.b
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case AVSEQH:
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return 0x0e001 << 15 // vseq.h
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case AXVSEQH:
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return 0x0e801 << 15 // xvseq.h
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case AVSEQW:
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return 0x0e002 << 15 // vseq.w
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case AXVSEQW:
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return 0x0e802 << 15 // xvseq.w
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case AVSEQV:
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return 0x0e003 << 15 // vseq.d
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case AXVSEQV:
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return 0x0e803 << 15 // xvseq.d
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}
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}
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if a < 0 {
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if a < 0 {
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