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cmd/compile: move loong64 over to new bounds check strategy
Change-Id: I5dec33d10d16a5d5c0dc7231cd1f764a6d1d7598 Reviewed-on: https://go-review.googlesource.com/c/go/+/682399 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: abner chenc <chenguoqi@loongson.cn> Reviewed-by: Keith Randall <khr@google.com> Reviewed-by: Michael Knyszek <mknyszek@google.com> Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
This commit is contained in:
parent
89a0af86b8
commit
5216fd570e
6 changed files with 236 additions and 161 deletions
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@ -16,6 +16,7 @@ import (
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"cmd/compile/internal/types"
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"cmd/compile/internal/types"
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"cmd/internal/obj"
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"cmd/internal/obj"
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"cmd/internal/obj/loong64"
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"cmd/internal/obj/loong64"
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"internal/abi"
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)
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)
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// isFPreg reports whether r is an FP register.
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// isFPreg reports whether r is an FP register.
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@ -663,12 +664,92 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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p.From.Type = obj.TYPE_CONST
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p.From.Type = obj.TYPE_CONST
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p.From.Offset = 0x1A
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p.From.Offset = 0x1A
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case ssa.OpLOONG64LoweredPanicBoundsA, ssa.OpLOONG64LoweredPanicBoundsB, ssa.OpLOONG64LoweredPanicBoundsC:
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case ssa.OpLOONG64LoweredPanicBoundsRR, ssa.OpLOONG64LoweredPanicBoundsRC, ssa.OpLOONG64LoweredPanicBoundsCR, ssa.OpLOONG64LoweredPanicBoundsCC:
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p := s.Prog(obj.ACALL)
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// Compute the constant we put in the PCData entry for this call.
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code, signed := ssa.BoundsKind(v.AuxInt).Code()
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xIsReg := false
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yIsReg := false
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xVal := 0
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yVal := 0
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switch v.Op {
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case ssa.OpLOONG64LoweredPanicBoundsRR:
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xIsReg = true
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xVal = int(v.Args[0].Reg() - loong64.REG_R4)
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yIsReg = true
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yVal = int(v.Args[1].Reg() - loong64.REG_R4)
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case ssa.OpLOONG64LoweredPanicBoundsRC:
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xIsReg = true
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xVal = int(v.Args[0].Reg() - loong64.REG_R4)
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c := v.Aux.(ssa.PanicBoundsC).C
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if c >= 0 && c <= abi.BoundsMaxConst {
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yVal = int(c)
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} else {
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// Move constant to a register
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yIsReg = true
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if yVal == xVal {
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yVal = 1
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}
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p := s.Prog(loong64.AMOVV)
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p.From.Type = obj.TYPE_CONST
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p.From.Offset = c
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p.To.Type = obj.TYPE_REG
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p.To.Reg = loong64.REG_R4 + int16(yVal)
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}
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case ssa.OpLOONG64LoweredPanicBoundsCR:
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yIsReg = true
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yVal := int(v.Args[0].Reg() - loong64.REG_R4)
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c := v.Aux.(ssa.PanicBoundsC).C
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if c >= 0 && c <= abi.BoundsMaxConst {
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xVal = int(c)
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} else {
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// Move constant to a register
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xIsReg = true
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if xVal == yVal {
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xVal = 1
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}
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p := s.Prog(loong64.AMOVV)
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p.From.Type = obj.TYPE_CONST
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p.From.Offset = c
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p.To.Type = obj.TYPE_REG
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p.To.Reg = loong64.REG_R4 + int16(xVal)
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}
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case ssa.OpLOONG64LoweredPanicBoundsCC:
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c := v.Aux.(ssa.PanicBoundsCC).Cx
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if c >= 0 && c <= abi.BoundsMaxConst {
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xVal = int(c)
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} else {
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// Move constant to a register
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xIsReg = true
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p := s.Prog(loong64.AMOVV)
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p.From.Type = obj.TYPE_CONST
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p.From.Offset = c
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p.To.Type = obj.TYPE_REG
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p.To.Reg = loong64.REG_R4 + int16(xVal)
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}
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c = v.Aux.(ssa.PanicBoundsCC).Cy
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if c >= 0 && c <= abi.BoundsMaxConst {
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yVal = int(c)
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} else {
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// Move constant to a register
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yIsReg = true
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yVal = 1
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p := s.Prog(loong64.AMOVV)
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p.From.Type = obj.TYPE_CONST
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p.From.Offset = c
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p.To.Type = obj.TYPE_REG
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p.To.Reg = loong64.REG_R4 + int16(yVal)
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}
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}
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c := abi.BoundsEncode(code, signed, xIsReg, yIsReg, xVal, yVal)
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p := s.Prog(obj.APCDATA)
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p.From.SetConst(abi.PCDATA_PanicBounds)
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p.To.SetConst(int64(c))
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p = s.Prog(obj.ACALL)
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p.To.Type = obj.TYPE_MEM
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p.To.Type = obj.TYPE_MEM
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p.To.Name = obj.NAME_EXTERN
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p.To.Name = obj.NAME_EXTERN
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p.To.Sym = ssagen.BoundsCheckFunc[v.AuxInt]
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p.To.Sym = ir.Syms.PanicBounds
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s.UseArgs(16) // space used in callee args area by assembly stubs
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case ssa.OpLOONG64LoweredAtomicLoad8, ssa.OpLOONG64LoweredAtomicLoad32, ssa.OpLOONG64LoweredAtomicLoad64:
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case ssa.OpLOONG64LoweredAtomicLoad8, ssa.OpLOONG64LoweredAtomicLoad32, ssa.OpLOONG64LoweredAtomicLoad64:
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// MOVB (Rarg0), Rout
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// MOVB (Rarg0), Rout
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// DBAR 0x14
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// DBAR 0x14
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@ -527,9 +527,11 @@
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// Publication barrier as intrinsic
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// Publication barrier as intrinsic
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(PubBarrier ...) => (LoweredPubBarrier ...)
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(PubBarrier ...) => (LoweredPubBarrier ...)
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(PanicBounds [kind] x y mem) && boundsABI(kind) == 0 => (LoweredPanicBoundsA [kind] x y mem)
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(PanicBounds ...) => (LoweredPanicBoundsRR ...)
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(PanicBounds [kind] x y mem) && boundsABI(kind) == 1 => (LoweredPanicBoundsB [kind] x y mem)
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(LoweredPanicBoundsRR [kind] x (MOVVconst [c]) mem) => (LoweredPanicBoundsRC [kind] x {PanicBoundsC{C:c}} mem)
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(PanicBounds [kind] x y mem) && boundsABI(kind) == 2 => (LoweredPanicBoundsC [kind] x y mem)
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(LoweredPanicBoundsRR [kind] (MOVVconst [c]) y mem) => (LoweredPanicBoundsCR [kind] {PanicBoundsC{C:c}} y mem)
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(LoweredPanicBoundsRC [kind] {p} (MOVVconst [c]) mem) => (LoweredPanicBoundsCC [kind] {PanicBoundsCC{Cx:c, Cy:p.C}} mem)
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(LoweredPanicBoundsCR [kind] {p} (MOVVconst [c]) mem) => (LoweredPanicBoundsCC [kind] {PanicBoundsCC{Cx:p.C, Cy:c}} mem)
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(CondSelect <t> x y cond) => (OR (MASKEQZ <t> x cond) (MASKNEZ <t> y cond))
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(CondSelect <t> x y cond) => (OR (MASKEQZ <t> x cond) (MASKNEZ <t> y cond))
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@ -130,10 +130,7 @@ func init() {
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gpspsbg = gpspg | buildReg("SB")
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gpspsbg = gpspg | buildReg("SB")
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fp = buildReg("F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31")
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fp = buildReg("F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31")
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callerSave = gp | fp | buildReg("g") // runtime.setg (and anything calling it) may clobber g
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callerSave = gp | fp | buildReg("g") // runtime.setg (and anything calling it) may clobber g
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r1 = buildReg("R20")
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first16 = buildReg("R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19")
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r2 = buildReg("R21")
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r3 = buildReg("R23")
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r4 = buildReg("R24")
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)
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)
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// Common regInfo
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// Common regInfo
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var (
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var (
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@ -563,12 +560,15 @@ func init() {
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// Do data barrier. arg0=memorys
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// Do data barrier. arg0=memorys
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{name: "LoweredPubBarrier", argLength: 1, asm: "DBAR", hasSideEffects: true},
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{name: "LoweredPubBarrier", argLength: 1, asm: "DBAR", hasSideEffects: true},
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// There are three of these functions so that they can have three different register inputs.
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// LoweredPanicBoundsRR takes x and y, two values that caused a bounds check to fail.
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// When we check 0 <= c <= cap (A), then 0 <= b <= c (B), then 0 <= a <= b (C), we want the
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// the RC and CR versions are used when one of the arguments is a constant. CC is used
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// default registers to match so we don't need to copy registers around unnecessarily.
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// when both are constant (normally both 0, as prove derives the fact that a [0] bounds
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{name: "LoweredPanicBoundsA", argLength: 3, aux: "Int64", reg: regInfo{inputs: []regMask{r3, r4}}, typ: "Mem", call: true}, // arg0=idx, arg1=len, arg2=mem, returns memory. AuxInt contains report code (see PanicBounds in genericOps.go).
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// failure means the length must have also been 0).
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{name: "LoweredPanicBoundsB", argLength: 3, aux: "Int64", reg: regInfo{inputs: []regMask{r2, r3}}, typ: "Mem", call: true}, // arg0=idx, arg1=len, arg2=mem, returns memory. AuxInt contains report code (see PanicBounds in genericOps.go).
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// AuxInt contains a report code (see PanicBounds in genericOps.go).
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{name: "LoweredPanicBoundsC", argLength: 3, aux: "Int64", reg: regInfo{inputs: []regMask{r1, r2}}, typ: "Mem", call: true}, // arg0=idx, arg1=len, arg2=mem, returns memory. AuxInt contains report code (see PanicBounds in genericOps.go).
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{name: "LoweredPanicBoundsRR", argLength: 3, aux: "Int64", reg: regInfo{inputs: []regMask{first16, first16}}, typ: "Mem", call: true}, // arg0=x, arg1=y, arg2=mem, returns memory.
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{name: "LoweredPanicBoundsRC", argLength: 2, aux: "PanicBoundsC", reg: regInfo{inputs: []regMask{first16}}, typ: "Mem", call: true}, // arg0=x, arg1=mem, returns memory.
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{name: "LoweredPanicBoundsCR", argLength: 2, aux: "PanicBoundsC", reg: regInfo{inputs: []regMask{first16}}, typ: "Mem", call: true}, // arg0=y, arg1=mem, returns memory.
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{name: "LoweredPanicBoundsCC", argLength: 1, aux: "PanicBoundsCC", reg: regInfo{}, typ: "Mem", call: true}, // arg0=mem, returns memory.
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// Prefetch instruction
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// Prefetch instruction
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// Do prefetch arg0 address with option aux. arg0=addr, arg1=memory, aux=option.
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// Do prefetch arg0 address with option aux. arg0=addr, arg1=memory, aux=option.
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@ -1963,9 +1963,10 @@ const (
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OpLOONG64LoweredGetCallerPC
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OpLOONG64LoweredGetCallerPC
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OpLOONG64LoweredWB
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OpLOONG64LoweredWB
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OpLOONG64LoweredPubBarrier
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OpLOONG64LoweredPubBarrier
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OpLOONG64LoweredPanicBoundsA
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OpLOONG64LoweredPanicBoundsRR
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OpLOONG64LoweredPanicBoundsB
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OpLOONG64LoweredPanicBoundsRC
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OpLOONG64LoweredPanicBoundsC
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OpLOONG64LoweredPanicBoundsCR
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OpLOONG64LoweredPanicBoundsCC
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OpLOONG64PRELD
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OpLOONG64PRELD
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OpLOONG64PRELDX
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OpLOONG64PRELDX
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@ -26439,41 +26440,46 @@ var opcodeTable = [...]opInfo{
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reg: regInfo{},
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reg: regInfo{},
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},
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},
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{
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{
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name: "LoweredPanicBoundsA",
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name: "LoweredPanicBoundsRR",
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auxType: auxInt64,
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auxType: auxInt64,
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argLen: 3,
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argLen: 3,
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call: true,
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call: true,
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reg: regInfo{
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reg: regInfo{
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inputs: []inputInfo{
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inputs: []inputInfo{
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{0, 4194304}, // R23
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{0, 524280}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19
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{1, 8388608}, // R24
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{1, 524280}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19
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},
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},
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},
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},
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},
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},
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{
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{
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name: "LoweredPanicBoundsB",
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name: "LoweredPanicBoundsRC",
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auxType: auxInt64,
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auxType: auxPanicBoundsC,
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argLen: 3,
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argLen: 2,
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call: true,
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call: true,
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reg: regInfo{
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reg: regInfo{
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inputs: []inputInfo{
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inputs: []inputInfo{
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{0, 1048576}, // R21
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{0, 524280}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19
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{1, 4194304}, // R23
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},
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},
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},
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},
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},
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},
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{
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{
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name: "LoweredPanicBoundsC",
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name: "LoweredPanicBoundsCR",
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auxType: auxInt64,
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auxType: auxPanicBoundsC,
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argLen: 3,
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argLen: 2,
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call: true,
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call: true,
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reg: regInfo{
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reg: regInfo{
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inputs: []inputInfo{
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inputs: []inputInfo{
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{0, 524288}, // R20
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{0, 524280}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19
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{1, 1048576}, // R21
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},
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},
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},
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},
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},
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},
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{
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name: "LoweredPanicBoundsCC",
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auxType: auxPanicBoundsCC,
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argLen: 1,
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call: true,
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reg: regInfo{},
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},
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{
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{
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name: "PRELD",
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name: "PRELD",
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auxType: auxInt64,
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auxType: auxInt64,
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@ -330,6 +330,12 @@ func rewriteValueLOONG64(v *Value) bool {
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return rewriteValueLOONG64_OpLOONG64DIVV(v)
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return rewriteValueLOONG64_OpLOONG64DIVV(v)
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case OpLOONG64DIVVU:
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case OpLOONG64DIVVU:
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return rewriteValueLOONG64_OpLOONG64DIVVU(v)
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return rewriteValueLOONG64_OpLOONG64DIVVU(v)
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case OpLOONG64LoweredPanicBoundsCR:
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return rewriteValueLOONG64_OpLOONG64LoweredPanicBoundsCR(v)
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case OpLOONG64LoweredPanicBoundsRC:
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return rewriteValueLOONG64_OpLOONG64LoweredPanicBoundsRC(v)
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case OpLOONG64LoweredPanicBoundsRR:
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return rewriteValueLOONG64_OpLOONG64LoweredPanicBoundsRR(v)
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case OpLOONG64MASKEQZ:
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case OpLOONG64MASKEQZ:
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return rewriteValueLOONG64_OpLOONG64MASKEQZ(v)
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return rewriteValueLOONG64_OpLOONG64MASKEQZ(v)
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case OpLOONG64MASKNEZ:
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case OpLOONG64MASKNEZ:
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@ -669,7 +675,8 @@ func rewriteValueLOONG64(v *Value) bool {
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v.Op = OpLOONG64OR
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v.Op = OpLOONG64OR
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return true
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return true
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case OpPanicBounds:
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case OpPanicBounds:
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return rewriteValueLOONG64_OpPanicBounds(v)
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v.Op = OpLOONG64LoweredPanicBoundsRR
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return true
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case OpPopCount16:
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case OpPopCount16:
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return rewriteValueLOONG64_OpPopCount16(v)
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return rewriteValueLOONG64_OpPopCount16(v)
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case OpPopCount32:
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case OpPopCount32:
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@ -2070,6 +2077,86 @@ func rewriteValueLOONG64_OpLOONG64DIVVU(v *Value) bool {
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}
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}
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return false
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return false
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}
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}
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func rewriteValueLOONG64_OpLOONG64LoweredPanicBoundsCR(v *Value) bool {
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v_1 := v.Args[1]
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v_0 := v.Args[0]
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// match: (LoweredPanicBoundsCR [kind] {p} (MOVVconst [c]) mem)
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// result: (LoweredPanicBoundsCC [kind] {PanicBoundsCC{Cx:p.C, Cy:c}} mem)
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for {
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kind := auxIntToInt64(v.AuxInt)
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p := auxToPanicBoundsC(v.Aux)
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if v_0.Op != OpLOONG64MOVVconst {
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break
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}
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c := auxIntToInt64(v_0.AuxInt)
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mem := v_1
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v.reset(OpLOONG64LoweredPanicBoundsCC)
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v.AuxInt = int64ToAuxInt(kind)
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v.Aux = panicBoundsCCToAux(PanicBoundsCC{Cx: p.C, Cy: c})
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v.AddArg(mem)
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return true
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}
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return false
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}
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func rewriteValueLOONG64_OpLOONG64LoweredPanicBoundsRC(v *Value) bool {
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v_1 := v.Args[1]
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v_0 := v.Args[0]
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// match: (LoweredPanicBoundsRC [kind] {p} (MOVVconst [c]) mem)
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// result: (LoweredPanicBoundsCC [kind] {PanicBoundsCC{Cx:c, Cy:p.C}} mem)
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for {
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kind := auxIntToInt64(v.AuxInt)
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p := auxToPanicBoundsC(v.Aux)
|
||||||
|
if v_0.Op != OpLOONG64MOVVconst {
|
||||||
|
break
|
||||||
|
}
|
||||||
|
c := auxIntToInt64(v_0.AuxInt)
|
||||||
|
mem := v_1
|
||||||
|
v.reset(OpLOONG64LoweredPanicBoundsCC)
|
||||||
|
v.AuxInt = int64ToAuxInt(kind)
|
||||||
|
v.Aux = panicBoundsCCToAux(PanicBoundsCC{Cx: c, Cy: p.C})
|
||||||
|
v.AddArg(mem)
|
||||||
|
return true
|
||||||
|
}
|
||||||
|
return false
|
||||||
|
}
|
||||||
|
func rewriteValueLOONG64_OpLOONG64LoweredPanicBoundsRR(v *Value) bool {
|
||||||
|
v_2 := v.Args[2]
|
||||||
|
v_1 := v.Args[1]
|
||||||
|
v_0 := v.Args[0]
|
||||||
|
// match: (LoweredPanicBoundsRR [kind] x (MOVVconst [c]) mem)
|
||||||
|
// result: (LoweredPanicBoundsRC [kind] x {PanicBoundsC{C:c}} mem)
|
||||||
|
for {
|
||||||
|
kind := auxIntToInt64(v.AuxInt)
|
||||||
|
x := v_0
|
||||||
|
if v_1.Op != OpLOONG64MOVVconst {
|
||||||
|
break
|
||||||
|
}
|
||||||
|
c := auxIntToInt64(v_1.AuxInt)
|
||||||
|
mem := v_2
|
||||||
|
v.reset(OpLOONG64LoweredPanicBoundsRC)
|
||||||
|
v.AuxInt = int64ToAuxInt(kind)
|
||||||
|
v.Aux = panicBoundsCToAux(PanicBoundsC{C: c})
|
||||||
|
v.AddArg2(x, mem)
|
||||||
|
return true
|
||||||
|
}
|
||||||
|
// match: (LoweredPanicBoundsRR [kind] (MOVVconst [c]) y mem)
|
||||||
|
// result: (LoweredPanicBoundsCR [kind] {PanicBoundsC{C:c}} y mem)
|
||||||
|
for {
|
||||||
|
kind := auxIntToInt64(v.AuxInt)
|
||||||
|
if v_0.Op != OpLOONG64MOVVconst {
|
||||||
|
break
|
||||||
|
}
|
||||||
|
c := auxIntToInt64(v_0.AuxInt)
|
||||||
|
y := v_1
|
||||||
|
mem := v_2
|
||||||
|
v.reset(OpLOONG64LoweredPanicBoundsCR)
|
||||||
|
v.AuxInt = int64ToAuxInt(kind)
|
||||||
|
v.Aux = panicBoundsCToAux(PanicBoundsC{C: c})
|
||||||
|
v.AddArg2(y, mem)
|
||||||
|
return true
|
||||||
|
}
|
||||||
|
return false
|
||||||
|
}
|
||||||
func rewriteValueLOONG64_OpLOONG64MASKEQZ(v *Value) bool {
|
func rewriteValueLOONG64_OpLOONG64MASKEQZ(v *Value) bool {
|
||||||
v_1 := v.Args[1]
|
v_1 := v.Args[1]
|
||||||
v_0 := v.Args[0]
|
v_0 := v.Args[0]
|
||||||
|
@ -9106,60 +9193,6 @@ func rewriteValueLOONG64_OpOffPtr(v *Value) bool {
|
||||||
return true
|
return true
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
func rewriteValueLOONG64_OpPanicBounds(v *Value) bool {
|
|
||||||
v_2 := v.Args[2]
|
|
||||||
v_1 := v.Args[1]
|
|
||||||
v_0 := v.Args[0]
|
|
||||||
// match: (PanicBounds [kind] x y mem)
|
|
||||||
// cond: boundsABI(kind) == 0
|
|
||||||
// result: (LoweredPanicBoundsA [kind] x y mem)
|
|
||||||
for {
|
|
||||||
kind := auxIntToInt64(v.AuxInt)
|
|
||||||
x := v_0
|
|
||||||
y := v_1
|
|
||||||
mem := v_2
|
|
||||||
if !(boundsABI(kind) == 0) {
|
|
||||||
break
|
|
||||||
}
|
|
||||||
v.reset(OpLOONG64LoweredPanicBoundsA)
|
|
||||||
v.AuxInt = int64ToAuxInt(kind)
|
|
||||||
v.AddArg3(x, y, mem)
|
|
||||||
return true
|
|
||||||
}
|
|
||||||
// match: (PanicBounds [kind] x y mem)
|
|
||||||
// cond: boundsABI(kind) == 1
|
|
||||||
// result: (LoweredPanicBoundsB [kind] x y mem)
|
|
||||||
for {
|
|
||||||
kind := auxIntToInt64(v.AuxInt)
|
|
||||||
x := v_0
|
|
||||||
y := v_1
|
|
||||||
mem := v_2
|
|
||||||
if !(boundsABI(kind) == 1) {
|
|
||||||
break
|
|
||||||
}
|
|
||||||
v.reset(OpLOONG64LoweredPanicBoundsB)
|
|
||||||
v.AuxInt = int64ToAuxInt(kind)
|
|
||||||
v.AddArg3(x, y, mem)
|
|
||||||
return true
|
|
||||||
}
|
|
||||||
// match: (PanicBounds [kind] x y mem)
|
|
||||||
// cond: boundsABI(kind) == 2
|
|
||||||
// result: (LoweredPanicBoundsC [kind] x y mem)
|
|
||||||
for {
|
|
||||||
kind := auxIntToInt64(v.AuxInt)
|
|
||||||
x := v_0
|
|
||||||
y := v_1
|
|
||||||
mem := v_2
|
|
||||||
if !(boundsABI(kind) == 2) {
|
|
||||||
break
|
|
||||||
}
|
|
||||||
v.reset(OpLOONG64LoweredPanicBoundsC)
|
|
||||||
v.AuxInt = int64ToAuxInt(kind)
|
|
||||||
v.AddArg3(x, y, mem)
|
|
||||||
return true
|
|
||||||
}
|
|
||||||
return false
|
|
||||||
}
|
|
||||||
func rewriteValueLOONG64_OpPopCount16(v *Value) bool {
|
func rewriteValueLOONG64_OpPopCount16(v *Value) bool {
|
||||||
v_0 := v.Args[0]
|
v_0 := v.Args[0]
|
||||||
b := v.Block
|
b := v.Block
|
||||||
|
|
|
@ -1135,76 +1135,29 @@ TEXT runtime·debugCallPanicked(SB),NOSPLIT,$16-16
|
||||||
BREAK
|
BREAK
|
||||||
RET
|
RET
|
||||||
|
|
||||||
// Note: these functions use a special calling convention to save generated code space.
|
TEXT runtime·panicBounds<ABIInternal>(SB),NOSPLIT,$144-0
|
||||||
// Arguments are passed in registers, but the space for those arguments are allocated
|
NO_LOCAL_POINTERS
|
||||||
// in the caller's stack frame. These stubs write the args into that stack space and
|
// Save all 16 int registers that could have an index in them.
|
||||||
// then tail call to the corresponding runtime handler.
|
// They may be pointers, but if they are they are dead.
|
||||||
// The tail call makes these stubs disappear in backtraces.
|
// Skip R0 aka ZERO, R1 aka LR, R2 aka thread pointer, R3 aka SP.
|
||||||
TEXT runtime·panicIndex<ABIInternal>(SB),NOSPLIT,$0-16
|
MOVV R4, 24(R3)
|
||||||
MOVV R20, R4
|
MOVV R5, 32(R3)
|
||||||
MOVV R21, R5
|
MOVV R6, 40(R3)
|
||||||
JMP runtime·goPanicIndex<ABIInternal>(SB)
|
MOVV R7, 48(R3)
|
||||||
TEXT runtime·panicIndexU<ABIInternal>(SB),NOSPLIT,$0-16
|
MOVV R8, 56(R3)
|
||||||
MOVV R20, R4
|
MOVV R9, 64(R3)
|
||||||
MOVV R21, R5
|
MOVV R10, 72(R3)
|
||||||
JMP runtime·goPanicIndexU<ABIInternal>(SB)
|
MOVV R11, 80(R3)
|
||||||
TEXT runtime·panicSliceAlen<ABIInternal>(SB),NOSPLIT,$0-16
|
MOVV R12, 88(R3)
|
||||||
MOVV R21, R4
|
MOVV R13, 96(R3)
|
||||||
MOVV R23, R5
|
MOVV R14, 104(R3)
|
||||||
JMP runtime·goPanicSliceAlen<ABIInternal>(SB)
|
MOVV R15, 112(R3)
|
||||||
TEXT runtime·panicSliceAlenU<ABIInternal>(SB),NOSPLIT,$0-16
|
MOVV R16, 120(R3)
|
||||||
MOVV R21, R4
|
MOVV R17, 128(R3)
|
||||||
MOVV R23, R5
|
MOVV R18, 136(R3)
|
||||||
JMP runtime·goPanicSliceAlenU<ABIInternal>(SB)
|
MOVV R19, 144(R3)
|
||||||
TEXT runtime·panicSliceAcap<ABIInternal>(SB),NOSPLIT,$0-16
|
|
||||||
MOVV R21, R4
|
MOVV R1, R4 // PC immediately after call to panicBounds
|
||||||
MOVV R23, R5
|
ADDV $24, R3, R5 // pointer to save area
|
||||||
JMP runtime·goPanicSliceAcap<ABIInternal>(SB)
|
CALL runtime·panicBounds64<ABIInternal>(SB)
|
||||||
TEXT runtime·panicSliceAcapU<ABIInternal>(SB),NOSPLIT,$0-16
|
RET
|
||||||
MOVV R21, R4
|
|
||||||
MOVV R23, R5
|
|
||||||
JMP runtime·goPanicSliceAcapU<ABIInternal>(SB)
|
|
||||||
TEXT runtime·panicSliceB<ABIInternal>(SB),NOSPLIT,$0-16
|
|
||||||
MOVV R20, R4
|
|
||||||
MOVV R21, R5
|
|
||||||
JMP runtime·goPanicSliceB<ABIInternal>(SB)
|
|
||||||
TEXT runtime·panicSliceBU<ABIInternal>(SB),NOSPLIT,$0-16
|
|
||||||
MOVV R20, R4
|
|
||||||
MOVV R21, R5
|
|
||||||
JMP runtime·goPanicSliceBU<ABIInternal>(SB)
|
|
||||||
TEXT runtime·panicSlice3Alen<ABIInternal>(SB),NOSPLIT,$0-16
|
|
||||||
MOVV R23, R4
|
|
||||||
MOVV R24, R5
|
|
||||||
JMP runtime·goPanicSlice3Alen<ABIInternal>(SB)
|
|
||||||
TEXT runtime·panicSlice3AlenU<ABIInternal>(SB),NOSPLIT,$0-16
|
|
||||||
MOVV R23, R4
|
|
||||||
MOVV R24, R5
|
|
||||||
JMP runtime·goPanicSlice3AlenU<ABIInternal>(SB)
|
|
||||||
TEXT runtime·panicSlice3Acap<ABIInternal>(SB),NOSPLIT,$0-16
|
|
||||||
MOVV R23, R4
|
|
||||||
MOVV R24, R5
|
|
||||||
JMP runtime·goPanicSlice3Acap<ABIInternal>(SB)
|
|
||||||
TEXT runtime·panicSlice3AcapU<ABIInternal>(SB),NOSPLIT,$0-16
|
|
||||||
MOVV R23, R4
|
|
||||||
MOVV R24, R5
|
|
||||||
JMP runtime·goPanicSlice3AcapU<ABIInternal>(SB)
|
|
||||||
TEXT runtime·panicSlice3B<ABIInternal>(SB),NOSPLIT,$0-16
|
|
||||||
MOVV R21, R4
|
|
||||||
MOVV R23, R5
|
|
||||||
JMP runtime·goPanicSlice3B<ABIInternal>(SB)
|
|
||||||
TEXT runtime·panicSlice3BU<ABIInternal>(SB),NOSPLIT,$0-16
|
|
||||||
MOVV R21, R4
|
|
||||||
MOVV R23, R5
|
|
||||||
JMP runtime·goPanicSlice3BU<ABIInternal>(SB)
|
|
||||||
TEXT runtime·panicSlice3C<ABIInternal>(SB),NOSPLIT,$0-16
|
|
||||||
MOVV R20, R4
|
|
||||||
MOVV R21, R5
|
|
||||||
JMP runtime·goPanicSlice3C<ABIInternal>(SB)
|
|
||||||
TEXT runtime·panicSlice3CU<ABIInternal>(SB),NOSPLIT,$0-16
|
|
||||||
MOVV R20, R4
|
|
||||||
MOVV R21, R5
|
|
||||||
JMP runtime·goPanicSlice3CU<ABIInternal>(SB)
|
|
||||||
TEXT runtime·panicSliceConvert<ABIInternal>(SB),NOSPLIT,$0-16
|
|
||||||
MOVV R23, R4
|
|
||||||
MOVV R24, R5
|
|
||||||
JMP runtime·goPanicSliceConvert<ABIInternal>(SB)
|
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue