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cmd/compile: use a single const MOV operand for riscv64
Most platforms only use a single MOV const operand - remove the MOV{B,H,W}const
operands from riscv64 and consistently use MOVDconst instead. The implementation
of all four is the same and there is no benefit gained from having multiple const
operands (in fact it requires a lot more rewrite rules).
Change-Id: I0ba7d7554e371a1de762ef5f3745e9c0c30d41ac
Reviewed-on: https://go-review.googlesource.com/c/go/+/302610
Trust: Joel Sing <joel@sing.id.au>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Reviewed-by: Michael Munday <mike.munday@lowrisc.org>
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Go Bot <gobot@golang.org>
This commit is contained in:
Joel Sing
parent
f5e6d3e879
commit
6517844129
5 changed files with 180 additions and 711 deletions
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@ -301,7 +301,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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p.Reg = v.Args[0].Reg()
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p.To.Type = obj.TYPE_REG
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p.To.Reg = v.Reg()
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case ssa.OpRISCV64MOVBconst, ssa.OpRISCV64MOVHconst, ssa.OpRISCV64MOVWconst, ssa.OpRISCV64MOVDconst:
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case ssa.OpRISCV64MOVDconst:
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p := s.Prog(v.Op.Asm())
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p.From.Type = obj.TYPE_CONST
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p.From.Offset = v.AuxInt
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@ -222,9 +222,9 @@
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(Rsh64x64 <t> x y) => (SRA <t> x (OR <y.Type> y (ADDI <y.Type> [-1] (SLTIU <y.Type> [64] y))))
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// rotates
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(RotateLeft8 <t> x (MOVBconst [c])) => (Or8 (Lsh8x64 <t> x (MOVBconst [c&7])) (Rsh8Ux64 <t> x (MOVBconst [-c&7])))
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(RotateLeft16 <t> x (MOVHconst [c])) => (Or16 (Lsh16x64 <t> x (MOVHconst [c&15])) (Rsh16Ux64 <t> x (MOVHconst [-c&15])))
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(RotateLeft32 <t> x (MOVWconst [c])) => (Or32 (Lsh32x64 <t> x (MOVWconst [c&31])) (Rsh32Ux64 <t> x (MOVWconst [-c&31])))
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(RotateLeft8 <t> x (MOVDconst [c])) => (Or8 (Lsh8x64 <t> x (MOVDconst [c&7])) (Rsh8Ux64 <t> x (MOVDconst [-c&7])))
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(RotateLeft16 <t> x (MOVDconst [c])) => (Or16 (Lsh16x64 <t> x (MOVDconst [c&15])) (Rsh16Ux64 <t> x (MOVDconst [-c&15])))
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(RotateLeft32 <t> x (MOVDconst [c])) => (Or32 (Lsh32x64 <t> x (MOVDconst [c&31])) (Rsh32Ux64 <t> x (MOVDconst [-c&31])))
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(RotateLeft64 <t> x (MOVDconst [c])) => (Or64 (Lsh64x64 <t> x (MOVDconst [c&63])) (Rsh64Ux64 <t> x (MOVDconst [-c&63])))
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(Less64 ...) => (SLT ...)
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@ -354,45 +354,45 @@
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// Small zeroing
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(Zero [0] _ mem) => mem
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(Zero [1] ptr mem) => (MOVBstore ptr (MOVBconst [0]) mem)
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(Zero [1] ptr mem) => (MOVBstore ptr (MOVDconst [0]) mem)
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(Zero [2] {t} ptr mem) && t.Alignment()%2 == 0 =>
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(MOVHstore ptr (MOVHconst [0]) mem)
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(MOVHstore ptr (MOVDconst [0]) mem)
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(Zero [2] ptr mem) =>
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(MOVBstore [1] ptr (MOVBconst [0])
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(MOVBstore ptr (MOVBconst [0]) mem))
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(MOVBstore [1] ptr (MOVDconst [0])
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(MOVBstore ptr (MOVDconst [0]) mem))
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(Zero [4] {t} ptr mem) && t.Alignment()%4 == 0 =>
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(MOVWstore ptr (MOVWconst [0]) mem)
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(MOVWstore ptr (MOVDconst [0]) mem)
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(Zero [4] {t} ptr mem) && t.Alignment()%2 == 0 =>
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(MOVHstore [2] ptr (MOVHconst [0])
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(MOVHstore ptr (MOVHconst [0]) mem))
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(MOVHstore [2] ptr (MOVDconst [0])
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(MOVHstore ptr (MOVDconst [0]) mem))
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(Zero [4] ptr mem) =>
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(MOVBstore [3] ptr (MOVBconst [0])
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(MOVBstore [2] ptr (MOVBconst [0])
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(MOVBstore [1] ptr (MOVBconst [0])
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(MOVBstore ptr (MOVBconst [0]) mem))))
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(MOVBstore [3] ptr (MOVDconst [0])
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(MOVBstore [2] ptr (MOVDconst [0])
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(MOVBstore [1] ptr (MOVDconst [0])
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(MOVBstore ptr (MOVDconst [0]) mem))))
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(Zero [8] {t} ptr mem) && t.Alignment()%8 == 0 =>
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(MOVDstore ptr (MOVDconst [0]) mem)
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(Zero [8] {t} ptr mem) && t.Alignment()%4 == 0 =>
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(MOVWstore [4] ptr (MOVWconst [0])
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(MOVWstore ptr (MOVWconst [0]) mem))
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(MOVWstore [4] ptr (MOVDconst [0])
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(MOVWstore ptr (MOVDconst [0]) mem))
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(Zero [8] {t} ptr mem) && t.Alignment()%2 == 0 =>
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(MOVHstore [6] ptr (MOVHconst [0])
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(MOVHstore [4] ptr (MOVHconst [0])
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(MOVHstore [2] ptr (MOVHconst [0])
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(MOVHstore ptr (MOVHconst [0]) mem))))
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(MOVHstore [6] ptr (MOVDconst [0])
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(MOVHstore [4] ptr (MOVDconst [0])
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(MOVHstore [2] ptr (MOVDconst [0])
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(MOVHstore ptr (MOVDconst [0]) mem))))
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(Zero [3] ptr mem) =>
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(MOVBstore [2] ptr (MOVBconst [0])
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(MOVBstore [1] ptr (MOVBconst [0])
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(MOVBstore ptr (MOVBconst [0]) mem)))
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(MOVBstore [2] ptr (MOVDconst [0])
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(MOVBstore [1] ptr (MOVDconst [0])
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(MOVBstore ptr (MOVDconst [0]) mem)))
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(Zero [6] {t} ptr mem) && t.Alignment()%2 == 0 =>
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(MOVHstore [4] ptr (MOVHconst [0])
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(MOVHstore [2] ptr (MOVHconst [0])
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(MOVHstore ptr (MOVHconst [0]) mem)))
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(MOVHstore [4] ptr (MOVDconst [0])
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(MOVHstore [2] ptr (MOVDconst [0])
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(MOVHstore ptr (MOVDconst [0]) mem)))
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(Zero [12] {t} ptr mem) && t.Alignment()%4 == 0 =>
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(MOVWstore [8] ptr (MOVWconst [0])
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(MOVWstore [4] ptr (MOVWconst [0])
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(MOVWstore ptr (MOVWconst [0]) mem)))
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(MOVWstore [8] ptr (MOVDconst [0])
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(MOVWstore [4] ptr (MOVDconst [0])
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(MOVWstore ptr (MOVDconst [0]) mem)))
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(Zero [16] {t} ptr mem) && t.Alignment()%8 == 0 =>
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(MOVDstore [8] ptr (MOVDconst [0])
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(MOVDstore ptr (MOVDconst [0]) mem))
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@ -522,16 +522,14 @@
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(OffPtr [off] ptr) && is32Bit(off) => (ADDI [off] ptr)
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(OffPtr [off] ptr) => (ADD (MOVDconst [off]) ptr)
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// TODO(jsing): Check if we actually need MOV{B,H,W}const as most platforms
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// use a single MOVDconst op.
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(Const8 ...) => (MOVBconst ...)
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(Const16 ...) => (MOVHconst ...)
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(Const32 ...) => (MOVWconst ...)
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(Const64 ...) => (MOVDconst ...)
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(Const32F [val]) => (FMVSX (MOVWconst [int32(math.Float32bits(val))]))
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(Const8 [val]) => (MOVDconst [int64(val)])
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(Const16 [val]) => (MOVDconst [int64(val)])
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(Const32 [val]) => (MOVDconst [int64(val)])
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(Const64 [val]) => (MOVDconst [int64(val)])
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(Const32F [val]) => (FMVSX (MOVDconst [int64(math.Float32bits(val))]))
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(Const64F [val]) => (FMVDX (MOVDconst [int64(math.Float64bits(val))]))
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(ConstNil) => (MOVDconst [0])
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(ConstBool [val]) => (MOVBconst [int8(b2i(val))])
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(ConstBool [val]) => (MOVDconst [int64(b2i(val))])
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// Convert 64 bit immediate to two 32 bit immediates, combine with add and shift.
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// The lower 32 bit immediate will be treated as signed,
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@ -612,24 +610,18 @@
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(BNE cond (MOVDconst [0]) yes no) => (BNEZ cond yes no)
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// Store zero
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(MOVBstore [off] {sym} ptr (MOVBconst [0]) mem) => (MOVBstorezero [off] {sym} ptr mem)
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(MOVHstore [off] {sym} ptr (MOVHconst [0]) mem) => (MOVHstorezero [off] {sym} ptr mem)
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(MOVWstore [off] {sym} ptr (MOVWconst [0]) mem) => (MOVWstorezero [off] {sym} ptr mem)
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(MOVBstore [off] {sym} ptr (MOVDconst [0]) mem) => (MOVBstorezero [off] {sym} ptr mem)
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(MOVHstore [off] {sym} ptr (MOVDconst [0]) mem) => (MOVHstorezero [off] {sym} ptr mem)
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(MOVWstore [off] {sym} ptr (MOVDconst [0]) mem) => (MOVWstorezero [off] {sym} ptr mem)
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(MOVDstore [off] {sym} ptr (MOVDconst [0]) mem) => (MOVDstorezero [off] {sym} ptr mem)
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// Avoid sign/zero extension for consts.
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(MOVBreg (MOVBconst [c])) => (MOVDconst [int64(c)])
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(MOVHreg (MOVBconst [c])) => (MOVDconst [int64(c)])
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(MOVHreg (MOVHconst [c])) => (MOVDconst [int64(c)])
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(MOVWreg (MOVBconst [c])) => (MOVDconst [int64(c)])
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(MOVWreg (MOVHconst [c])) => (MOVDconst [int64(c)])
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(MOVWreg (MOVWconst [c])) => (MOVDconst [int64(c)])
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(MOVBUreg (MOVBconst [c])) => (MOVDconst [int64(uint8(c))])
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(MOVHUreg (MOVBconst [c])) => (MOVDconst [int64(uint16(c))])
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(MOVHUreg (MOVHconst [c])) => (MOVDconst [int64(uint16(c))])
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(MOVWUreg (MOVBconst [c])) => (MOVDconst [int64(uint32(c))])
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(MOVWUreg (MOVHconst [c])) => (MOVDconst [int64(uint32(c))])
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(MOVWUreg (MOVWconst [c])) => (MOVDconst [int64(uint32(c))])
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(MOVBreg (MOVDconst [c])) => (MOVDconst [int64(c)])
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(MOVHreg (MOVDconst [c])) => (MOVDconst [int64(c)])
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(MOVWreg (MOVDconst [c])) => (MOVDconst [int64(c)])
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(MOVBUreg (MOVDconst [c])) => (MOVDconst [int64(uint8(c))])
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(MOVHUreg (MOVDconst [c])) => (MOVDconst [int64(uint16(c))])
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(MOVWUreg (MOVDconst [c])) => (MOVDconst [int64(uint32(c))])
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// Avoid sign/zero extension after properly typed load.
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(MOVBreg x:(MOVBload _ _)) => (MOVDreg x)
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@ -695,60 +687,24 @@
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(MOVDnop (MOVDconst [c])) => (MOVDconst [c])
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// Fold constant into immediate instructions where possible.
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(ADD (MOVBconst [val]) x) => (ADDI [int64(val)] x)
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(ADD (MOVHconst [val]) x) => (ADDI [int64(val)] x)
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(ADD (MOVWconst [val]) x) => (ADDI [int64(val)] x)
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(ADD (MOVDconst [val]) x) && is32Bit(val) => (ADDI [val] x)
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(AND (MOVBconst [val]) x) => (ANDI [int64(val)] x)
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(AND (MOVHconst [val]) x) => (ANDI [int64(val)] x)
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(AND (MOVWconst [val]) x) => (ANDI [int64(val)] x)
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(AND (MOVDconst [val]) x) && is32Bit(val) => (ANDI [val] x)
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(OR (MOVBconst [val]) x) => (ORI [int64(val)] x)
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(OR (MOVHconst [val]) x) => (ORI [int64(val)] x)
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(OR (MOVWconst [val]) x) => (ORI [int64(val)] x)
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(OR (MOVDconst [val]) x) && is32Bit(val) => (ORI [val] x)
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(XOR (MOVBconst [val]) x) => (XORI [int64(val)] x)
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(XOR (MOVHconst [val]) x) => (XORI [int64(val)] x)
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(XOR (MOVWconst [val]) x) => (XORI [int64(val)] x)
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(OR (MOVDconst [val]) x) && is32Bit(val) => (ORI [val] x)
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(XOR (MOVDconst [val]) x) && is32Bit(val) => (XORI [val] x)
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(SLL x (MOVBconst [val])) => (SLLI [int64(val&63)] x)
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(SLL x (MOVHconst [val])) => (SLLI [int64(val&63)] x)
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(SLL x (MOVWconst [val])) => (SLLI [int64(val&63)] x)
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(SLL x (MOVDconst [val])) => (SLLI [int64(val&63)] x)
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(SRL x (MOVBconst [val])) => (SRLI [int64(val&63)] x)
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(SRL x (MOVHconst [val])) => (SRLI [int64(val&63)] x)
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(SRL x (MOVWconst [val])) => (SRLI [int64(val&63)] x)
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(SRL x (MOVDconst [val])) => (SRLI [int64(val&63)] x)
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(SRA x (MOVBconst [val])) => (SRAI [int64(val&63)] x)
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(SRA x (MOVHconst [val])) => (SRAI [int64(val&63)] x)
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(SRA x (MOVWconst [val])) => (SRAI [int64(val&63)] x)
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(SRA x (MOVDconst [val])) => (SRAI [int64(val&63)] x)
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// Convert subtraction of a const into ADDI with negative immediate, where possible.
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(SUB x (MOVBconst [val])) => (ADDI [-int64(val)] x)
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(SUB x (MOVHconst [val])) => (ADDI [-int64(val)] x)
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(SUB x (MOVWconst [val])) && is32Bit(-int64(val)) => (ADDI [-int64(val)] x)
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(SUB x (MOVDconst [val])) && is32Bit(-val) => (ADDI [-val] x)
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// Subtraction of zero.
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(SUB x (MOVBconst [0])) => x
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(SUB x (MOVHconst [0])) => x
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(SUB x (MOVWconst [0])) => x
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(SUB x (MOVDconst [0])) => x
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// Subtraction of zero with sign extension.
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(SUBW x (MOVWconst [0])) => (ADDIW [0] x)
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(SUBW x (MOVDconst [0])) => (ADDIW [0] x)
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// Subtraction from zero.
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(SUB (MOVBconst [0]) x) => (NEG x)
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(SUB (MOVHconst [0]) x) => (NEG x)
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(SUB (MOVWconst [0]) x) => (NEG x)
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(SUB (MOVDconst [0]) x) => (NEG x)
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// Subtraction from zero with sign extension.
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@ -168,9 +168,6 @@ func init() {
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{name: "MOVaddr", argLength: 1, reg: gp11sb, asm: "MOV", aux: "SymOff", rematerializeable: true, symEffect: "RdWr"}, // arg0 + auxint + offset encoded in aux
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// auxint+aux == add auxint and the offset of the symbol in aux (if any) to the effective address
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{name: "MOVBconst", reg: gp01, asm: "MOV", typ: "UInt8", aux: "Int8", rematerializeable: true}, // 8 low bits of auxint
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{name: "MOVHconst", reg: gp01, asm: "MOV", typ: "UInt16", aux: "Int16", rematerializeable: true}, // 16 low bits of auxint
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{name: "MOVWconst", reg: gp01, asm: "MOV", typ: "UInt32", aux: "Int32", rematerializeable: true}, // 32 low bits of auxint
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{name: "MOVDconst", reg: gp01, asm: "MOV", typ: "UInt64", aux: "Int64", rematerializeable: true}, // auxint
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// Loads: load <size> bits from arg0+auxint+aux and extend to 64 bits; arg1=mem
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@ -2089,9 +2089,6 @@ const (
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OpRISCV64REMW
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OpRISCV64REMUW
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OpRISCV64MOVaddr
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OpRISCV64MOVBconst
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OpRISCV64MOVHconst
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OpRISCV64MOVWconst
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OpRISCV64MOVDconst
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OpRISCV64MOVBload
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OpRISCV64MOVHload
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@ -27904,42 +27901,6 @@ var opcodeTable = [...]opInfo{
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},
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},
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},
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{
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name: "MOVBconst",
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auxType: auxInt8,
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argLen: 0,
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rematerializeable: true,
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asm: riscv.AMOV,
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reg: regInfo{
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outputs: []outputInfo{
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{0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30
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},
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},
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},
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{
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name: "MOVHconst",
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auxType: auxInt16,
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argLen: 0,
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rematerializeable: true,
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asm: riscv.AMOV,
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reg: regInfo{
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outputs: []outputInfo{
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{0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30
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},
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},
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},
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{
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name: "MOVWconst",
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auxType: auxInt32,
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argLen: 0,
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rematerializeable: true,
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asm: riscv.AMOV,
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reg: regInfo{
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outputs: []outputInfo{
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{0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30
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},
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},
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},
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{
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name: "MOVDconst",
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auxType: auxInt64,
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