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fix test files

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This commit is contained in:
lxq015 2025-09-17 12:05:05 +08:00
parent d1adb65c90
commit 6539cc86cb
2 changed files with 5 additions and 5 deletions
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8
src/cmd/asm/internal/asm/testdata/riscv64.s vendored
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@ -178,10 +178,10 @@ start:
RDINSTRET X5 // f32220c0
// 12.3: Integer Conditional Operations (Zicond)
CZEROEQZ X1, X13, X5 // b3d2160e
CZEROEQZ X1, X13 // b3d6160e
CZERONEZ X31, X3, X11 // b3f5f10f
CZERONEZ X31, X3 // b3f1f10f
CZEROEQZ X5, X6, X7 // b353530e
CZEROEQZ X5, X7 // b3d3530e
CZERONEZ X5, X6, X7 // b373530e
CZERONEZ X5, X7 // b3f3530e
// 13.1: Multiplication Operations
MUL X5, X6, X7 // b3035302

2
src/cmd/internal/obj/riscv/inst.go
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@ -1,4 +1,4 @@
// Code generated by ./parse.py -go rv64_a rv64_c rv64_d rv64_f rv64_i rv64_m rv64_q rv64_zba rv64_zbb rv64_zbs rv_a rv_c rv_c_d rv_d rv_f rv_i rv_m rv_q rv_s rv_system rv_v rv_zba rv_zbb rv_zbs rv_zicsr rv_zicond; DO NOT EDIT.
// Code generated by ./parse.py -go rv64_a rv64_c rv64_d rv64_f rv64_i rv64_m rv64_q rv64_zba rv64_zbb rv64_zbs rv_a rv_c rv_c_d rv_d rv_f rv_i rv_m rv_q rv_s rv_system rv_v rv_zba rv_zbb rv_zbs rv_zicond rv_zicsr; DO NOT EDIT.
package riscv
import "cmd/internal/obj"