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[dev.simd] cmd/compile, simd: add AES instructions

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AVXAES is a composite feature set, Intel did listed it as "AVXAES" in
the XED data instead of separating them.

The tests will be in the next CL.

Change-Id: I89c97261f2228b2fdafb48f63e82ef6239bdd5ca
Reviewed-on: https://go-review.googlesource.com/c/go/+/706055
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: David Chase <drchase@google.com>
This commit is contained in:
Junyang Shao 2025-09-23 05:16:30 +00:00
parent 1c961c2fb2
commit 703a5fbaad
15 changed files with 497 additions and 4 deletions
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16
src/cmd/compile/internal/amd64/simdssa.go
View file

@ -12,7 +12,8 @@ import (
func ssaGenSIMDValue(s *ssagen.State, v *ssa.Value) bool {
var p *obj.Prog
switch v.Op {
case ssa.OpAMD64VPABSB128,
case ssa.OpAMD64VAESIMC128,
ssa.OpAMD64VPABSB128,
ssa.OpAMD64VPABSB256,
ssa.OpAMD64VPABSB512,
ssa.OpAMD64VPABSW128,
@ -148,7 +149,15 @@ func ssaGenSIMDValue(s *ssagen.State, v *ssa.Value) bool {
ssa.OpAMD64VSQRTPD512:
p = simdV11(s, v)
case ssa.OpAMD64VADDPS128,
case ssa.OpAMD64VAESDECLAST128,
ssa.OpAMD64VAESDECLAST256,
ssa.OpAMD64VAESDEC128,
ssa.OpAMD64VAESDEC256,
ssa.OpAMD64VAESENCLAST128,
ssa.OpAMD64VAESENCLAST256,
ssa.OpAMD64VAESENC128,
ssa.OpAMD64VAESENC256,
ssa.OpAMD64VADDPS128,
ssa.OpAMD64VADDPS256,
ssa.OpAMD64VADDPS512,
ssa.OpAMD64VADDPD128,
@ -917,7 +926,8 @@ func ssaGenSIMDValue(s *ssagen.State, v *ssa.Value) bool {
ssa.OpAMD64VPBLENDVB256:
p = simdV31(s, v)
case ssa.OpAMD64VROUNDPS128,
case ssa.OpAMD64VAESKEYGENASSIST128,
ssa.OpAMD64VROUNDPS128,
ssa.OpAMD64VROUNDPS256,
ssa.OpAMD64VROUNDPD128,
ssa.OpAMD64VROUNDPD256,