[dev.simd] cmd/compile: generated simd*ops files weren't up to date

I re-ran the generator in arch/internal/simd to
verify a clean move of the intrinsics helpers, and
these changes (which look correct) appeared.

Change-Id: I28a0e8bd144d47aec216f557f238362f238d0428
Reviewed-on: https://go-review.googlesource.com/c/go/+/681499
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Junyang Shao <shaojunyang@google.com>

src/cmd/compile/internal/ssa/_gen/simdAMD64ops.go

@@ -5,7 +5,7 @@ func simdAMD64Ops(fp11, fp21, fp2k1, fp1k1fp1, fp2k1fp1, fp2k1k1, fp31, fp3k1fp1
 	return []opData{
 		{name: "VADDPS512", argLength: 2, reg: fp21, asm: "VADDPS", commutative: true, typ: "Vec512", resultInArg0: false},
 		{name: "VANDPS512", argLength: 2, reg: fp21, asm: "VANDPS", commutative: true, typ: "Vec512", resultInArg0: false},
-		{name: "VANDNPS512", argLength: 2, reg: fp21, asm: "VANDNPS", commutative: true, typ: "Vec512", resultInArg0: false},
+		{name: "VANDNPS512", argLength: 2, reg: fp21, asm: "VANDNPS", commutative: false, typ: "Vec512", resultInArg0: false},
 		{name: "VRCP14PS512", argLength: 1, reg: fp11, asm: "VRCP14PS", commutative: false, typ: "Vec512", resultInArg0: false},
 		{name: "VRSQRT14PS512", argLength: 1, reg: fp11, asm: "VRSQRT14PS", commutative: false, typ: "Vec512", resultInArg0: false},
 		{name: "VDIVPS512", argLength: 2, reg: fp21, asm: "VDIVPS", commutative: false, typ: "Vec512", resultInArg0: false},
@@ -29,7 +29,7 @@ func simdAMD64Ops(fp11, fp21, fp2k1, fp1k1fp1, fp2k1fp1, fp2k1k1, fp31, fp3k1fp1
 		{name: "VFNMSUB231PS512", argLength: 3, reg: fp31, asm: "VFNMSUB231PS", commutative: false, typ: "Vec512", resultInArg0: true},
 		{name: "VADDPSMasked512", argLength: 3, reg: fp2k1fp1, asm: "VADDPS", commutative: true, typ: "Vec512", resultInArg0: false},
 		{name: "VANDPSMasked512", argLength: 3, reg: fp2k1fp1, asm: "VANDPS", commutative: true, typ: "Vec512", resultInArg0: false},
-		{name: "VANDNPSMasked512", argLength: 3, reg: fp2k1fp1, asm: "VANDNPS", commutative: true, typ: "Vec512", resultInArg0: false},
+		{name: "VANDNPSMasked512", argLength: 3, reg: fp2k1fp1, asm: "VANDNPS", commutative: false, typ: "Vec512", resultInArg0: false},
 		{name: "VRCP14PSMasked512", argLength: 2, reg: fp1k1fp1, asm: "VRCP14PS", commutative: false, typ: "Vec512", resultInArg0: false},
 		{name: "VRSQRT14PSMasked512", argLength: 2, reg: fp1k1fp1, asm: "VRSQRT14PS", commutative: false, typ: "Vec512", resultInArg0: false},
 		{name: "VDIVPSMasked512", argLength: 3, reg: fp2k1fp1, asm: "VDIVPS", commutative: false, typ: "Vec512", resultInArg0: false},
@@ -68,7 +68,7 @@ func simdAMD64Ops(fp11, fp21, fp2k1, fp1k1fp1, fp2k1fp1, fp2k1k1, fp31, fp3k1fp1
 		{name: "VADDPS128", argLength: 2, reg: fp21, asm: "VADDPS", commutative: true, typ: "Vec128", resultInArg0: false},
 		{name: "VADDSUBPS128", argLength: 2, reg: fp21, asm: "VADDSUBPS", commutative: false, typ: "Vec128", resultInArg0: false},
 		{name: "VANDPS128", argLength: 2, reg: fp21, asm: "VANDPS", commutative: true, typ: "Vec128", resultInArg0: false},
-		{name: "VANDNPS128", argLength: 2, reg: fp21, asm: "VANDNPS", commutative: true, typ: "Vec128", resultInArg0: false},
+		{name: "VANDNPS128", argLength: 2, reg: fp21, asm: "VANDNPS", commutative: false, typ: "Vec128", resultInArg0: false},
 		{name: "VRCP14PS128", argLength: 1, reg: fp11, asm: "VRCP14PS", commutative: false, typ: "Vec128", resultInArg0: false},
 		{name: "VRSQRTPS128", argLength: 1, reg: fp11, asm: "VRSQRTPS", commutative: false, typ: "Vec128", resultInArg0: false},
 		{name: "VDIVPS128", argLength: 2, reg: fp21, asm: "VDIVPS", commutative: false, typ: "Vec128", resultInArg0: false},
@@ -92,7 +92,7 @@ func simdAMD64Ops(fp11, fp21, fp2k1, fp1k1fp1, fp2k1fp1, fp2k1k1, fp31, fp3k1fp1
 		{name: "VFNMSUB231PS128", argLength: 3, reg: fp31, asm: "VFNMSUB231PS", commutative: false, typ: "Vec128", resultInArg0: true},
 		{name: "VADDPSMasked128", argLength: 3, reg: fp2k1fp1, asm: "VADDPS", commutative: true, typ: "Vec128", resultInArg0: false},
 		{name: "VANDPSMasked128", argLength: 3, reg: fp2k1fp1, asm: "VANDPS", commutative: true, typ: "Vec128", resultInArg0: false},
-		{name: "VANDNPSMasked128", argLength: 3, reg: fp2k1fp1, asm: "VANDNPS", commutative: true, typ: "Vec128", resultInArg0: false},
+		{name: "VANDNPSMasked128", argLength: 3, reg: fp2k1fp1, asm: "VANDNPS", commutative: false, typ: "Vec128", resultInArg0: false},
 		{name: "VRCP14PSMasked128", argLength: 2, reg: fp1k1fp1, asm: "VRCP14PS", commutative: false, typ: "Vec128", resultInArg0: false},
 		{name: "VRSQRT14PSMasked128", argLength: 2, reg: fp1k1fp1, asm: "VRSQRT14PS", commutative: false, typ: "Vec128", resultInArg0: false},
 		{name: "VDIVPSMasked128", argLength: 3, reg: fp2k1fp1, asm: "VDIVPS", commutative: false, typ: "Vec128", resultInArg0: false},
@@ -133,7 +133,7 @@ func simdAMD64Ops(fp11, fp21, fp2k1, fp1k1fp1, fp2k1fp1, fp2k1k1, fp31, fp3k1fp1
 		{name: "VADDPS256", argLength: 2, reg: fp21, asm: "VADDPS", commutative: true, typ: "Vec256", resultInArg0: false},
 		{name: "VADDSUBPS256", argLength: 2, reg: fp21, asm: "VADDSUBPS", commutative: false, typ: "Vec256", resultInArg0: false},
 		{name: "VANDPS256", argLength: 2, reg: fp21, asm: "VANDPS", commutative: true, typ: "Vec256", resultInArg0: false},
-		{name: "VANDNPS256", argLength: 2, reg: fp21, asm: "VANDNPS", commutative: true, typ: "Vec256", resultInArg0: false},
+		{name: "VANDNPS256", argLength: 2, reg: fp21, asm: "VANDNPS", commutative: false, typ: "Vec256", resultInArg0: false},
 		{name: "VRCP14PS256", argLength: 1, reg: fp11, asm: "VRCP14PS", commutative: false, typ: "Vec256", resultInArg0: false},
 		{name: "VRSQRTPS256", argLength: 1, reg: fp11, asm: "VRSQRTPS", commutative: false, typ: "Vec256", resultInArg0: false},
 		{name: "VDIVPS256", argLength: 2, reg: fp21, asm: "VDIVPS", commutative: false, typ: "Vec256", resultInArg0: false},
@@ -157,7 +157,7 @@ func simdAMD64Ops(fp11, fp21, fp2k1, fp1k1fp1, fp2k1fp1, fp2k1k1, fp31, fp3k1fp1
 		{name: "VFNMSUB231PS256", argLength: 3, reg: fp31, asm: "VFNMSUB231PS", commutative: false, typ: "Vec256", resultInArg0: true},
 		{name: "VADDPSMasked256", argLength: 3, reg: fp2k1fp1, asm: "VADDPS", commutative: true, typ: "Vec256", resultInArg0: false},
 		{name: "VANDPSMasked256", argLength: 3, reg: fp2k1fp1, asm: "VANDPS", commutative: true, typ: "Vec256", resultInArg0: false},
-		{name: "VANDNPSMasked256", argLength: 3, reg: fp2k1fp1, asm: "VANDNPS", commutative: true, typ: "Vec256", resultInArg0: false},
+		{name: "VANDNPSMasked256", argLength: 3, reg: fp2k1fp1, asm: "VANDNPS", commutative: false, typ: "Vec256", resultInArg0: false},
 		{name: "VRCP14PSMasked256", argLength: 2, reg: fp1k1fp1, asm: "VRCP14PS", commutative: false, typ: "Vec256", resultInArg0: false},
 		{name: "VRSQRT14PSMasked256", argLength: 2, reg: fp1k1fp1, asm: "VRSQRT14PS", commutative: false, typ: "Vec256", resultInArg0: false},
 		{name: "VDIVPSMasked256", argLength: 3, reg: fp2k1fp1, asm: "VDIVPS", commutative: false, typ: "Vec256", resultInArg0: false},
@@ -198,7 +198,7 @@ func simdAMD64Ops(fp11, fp21, fp2k1, fp1k1fp1, fp2k1fp1, fp2k1k1, fp31, fp3k1fp1
 		{name: "VADDPD128", argLength: 2, reg: fp21, asm: "VADDPD", commutative: true, typ: "Vec128", resultInArg0: false},
 		{name: "VADDSUBPD128", argLength: 2, reg: fp21, asm: "VADDSUBPD", commutative: false, typ: "Vec128", resultInArg0: false},
 		{name: "VANDPD128", argLength: 2, reg: fp21, asm: "VANDPD", commutative: true, typ: "Vec128", resultInArg0: false},
-		{name: "VANDNPD128", argLength: 2, reg: fp21, asm: "VANDNPD", commutative: true, typ: "Vec128", resultInArg0: false},
+		{name: "VANDNPD128", argLength: 2, reg: fp21, asm: "VANDNPD", commutative: false, typ: "Vec128", resultInArg0: false},
 		{name: "VRCP14PD128", argLength: 1, reg: fp11, asm: "VRCP14PD", commutative: false, typ: "Vec128", resultInArg0: false},
 		{name: "VRSQRT14PD128", argLength: 1, reg: fp11, asm: "VRSQRT14PD", commutative: false, typ: "Vec128", resultInArg0: false},
 		{name: "VDIVPD128", argLength: 2, reg: fp21, asm: "VDIVPD", commutative: false, typ: "Vec128", resultInArg0: false},
@@ -222,7 +222,7 @@ func simdAMD64Ops(fp11, fp21, fp2k1, fp1k1fp1, fp2k1fp1, fp2k1k1, fp31, fp3k1fp1
 		{name: "VFNMSUB231PD128", argLength: 3, reg: fp31, asm: "VFNMSUB231PD", commutative: false, typ: "Vec128", resultInArg0: true},
 		{name: "VADDPDMasked128", argLength: 3, reg: fp2k1fp1, asm: "VADDPD", commutative: true, typ: "Vec128", resultInArg0: false},
 		{name: "VANDPDMasked128", argLength: 3, reg: fp2k1fp1, asm: "VANDPD", commutative: true, typ: "Vec128", resultInArg0: false},
-		{name: "VANDNPDMasked128", argLength: 3, reg: fp2k1fp1, asm: "VANDNPD", commutative: true, typ: "Vec128", resultInArg0: false},
+		{name: "VANDNPDMasked128", argLength: 3, reg: fp2k1fp1, asm: "VANDNPD", commutative: false, typ: "Vec128", resultInArg0: false},
 		{name: "VRCP14PDMasked128", argLength: 2, reg: fp1k1fp1, asm: "VRCP14PD", commutative: false, typ: "Vec128", resultInArg0: false},
 		{name: "VRSQRT14PDMasked128", argLength: 2, reg: fp1k1fp1, asm: "VRSQRT14PD", commutative: false, typ: "Vec128", resultInArg0: false},
 		{name: "VDIVPDMasked128", argLength: 3, reg: fp2k1fp1, asm: "VDIVPD", commutative: false, typ: "Vec128", resultInArg0: false},
@@ -263,7 +263,7 @@ func simdAMD64Ops(fp11, fp21, fp2k1, fp1k1fp1, fp2k1fp1, fp2k1k1, fp31, fp3k1fp1
 		{name: "VADDPD256", argLength: 2, reg: fp21, asm: "VADDPD", commutative: true, typ: "Vec256", resultInArg0: false},
 		{name: "VADDSUBPD256", argLength: 2, reg: fp21, asm: "VADDSUBPD", commutative: false, typ: "Vec256", resultInArg0: false},
 		{name: "VANDPD256", argLength: 2, reg: fp21, asm: "VANDPD", commutative: true, typ: "Vec256", resultInArg0: false},
-		{name: "VANDNPD256", argLength: 2, reg: fp21, asm: "VANDNPD", commutative: true, typ: "Vec256", resultInArg0: false},
+		{name: "VANDNPD256", argLength: 2, reg: fp21, asm: "VANDNPD", commutative: false, typ: "Vec256", resultInArg0: false},
 		{name: "VRCP14PD256", argLength: 1, reg: fp11, asm: "VRCP14PD", commutative: false, typ: "Vec256", resultInArg0: false},
 		{name: "VRSQRT14PD256", argLength: 1, reg: fp11, asm: "VRSQRT14PD", commutative: false, typ: "Vec256", resultInArg0: false},
 		{name: "VDIVPD256", argLength: 2, reg: fp21, asm: "VDIVPD", commutative: false, typ: "Vec256", resultInArg0: false},
@@ -287,7 +287,7 @@ func simdAMD64Ops(fp11, fp21, fp2k1, fp1k1fp1, fp2k1fp1, fp2k1k1, fp31, fp3k1fp1
 		{name: "VFNMSUB231PD256", argLength: 3, reg: fp31, asm: "VFNMSUB231PD", commutative: false, typ: "Vec256", resultInArg0: true},
 		{name: "VADDPDMasked256", argLength: 3, reg: fp2k1fp1, asm: "VADDPD", commutative: true, typ: "Vec256", resultInArg0: false},
 		{name: "VANDPDMasked256", argLength: 3, reg: fp2k1fp1, asm: "VANDPD", commutative: true, typ: "Vec256", resultInArg0: false},
-		{name: "VANDNPDMasked256", argLength: 3, reg: fp2k1fp1, asm: "VANDNPD", commutative: true, typ: "Vec256", resultInArg0: false},
+		{name: "VANDNPDMasked256", argLength: 3, reg: fp2k1fp1, asm: "VANDNPD", commutative: false, typ: "Vec256", resultInArg0: false},
 		{name: "VRCP14PDMasked256", argLength: 2, reg: fp1k1fp1, asm: "VRCP14PD", commutative: false, typ: "Vec256", resultInArg0: false},
 		{name: "VRSQRT14PDMasked256", argLength: 2, reg: fp1k1fp1, asm: "VRSQRT14PD", commutative: false, typ: "Vec256", resultInArg0: false},
 		{name: "VDIVPDMasked256", argLength: 3, reg: fp2k1fp1, asm: "VDIVPD", commutative: false, typ: "Vec256", resultInArg0: false},
@@ -327,7 +327,7 @@ func simdAMD64Ops(fp11, fp21, fp2k1, fp1k1fp1, fp2k1fp1, fp2k1k1, fp31, fp3k1fp1
 		{name: "VXORPD256", argLength: 2, reg: fp21, asm: "VXORPD", commutative: true, typ: "Vec256", resultInArg0: false},
 		{name: "VADDPD512", argLength: 2, reg: fp21, asm: "VADDPD", commutative: true, typ: "Vec512", resultInArg0: false},
 		{name: "VANDPD512", argLength: 2, reg: fp21, asm: "VANDPD", commutative: true, typ: "Vec512", resultInArg0: false},
-		{name: "VANDNPD512", argLength: 2, reg: fp21, asm: "VANDNPD", commutative: true, typ: "Vec512", resultInArg0: false},
+		{name: "VANDNPD512", argLength: 2, reg: fp21, asm: "VANDNPD", commutative: false, typ: "Vec512", resultInArg0: false},
 		{name: "VRCP14PD512", argLength: 1, reg: fp11, asm: "VRCP14PD", commutative: false, typ: "Vec512", resultInArg0: false},
 		{name: "VRSQRT14PD512", argLength: 1, reg: fp11, asm: "VRSQRT14PD", commutative: false, typ: "Vec512", resultInArg0: false},
 		{name: "VDIVPD512", argLength: 2, reg: fp21, asm: "VDIVPD", commutative: false, typ: "Vec512", resultInArg0: false},
@@ -351,7 +351,7 @@ func simdAMD64Ops(fp11, fp21, fp2k1, fp1k1fp1, fp2k1fp1, fp2k1k1, fp31, fp3k1fp1
 		{name: "VFNMSUB231PD512", argLength: 3, reg: fp31, asm: "VFNMSUB231PD", commutative: false, typ: "Vec512", resultInArg0: true},
 		{name: "VADDPDMasked512", argLength: 3, reg: fp2k1fp1, asm: "VADDPD", commutative: true, typ: "Vec512", resultInArg0: false},
 		{name: "VANDPDMasked512", argLength: 3, reg: fp2k1fp1, asm: "VANDPD", commutative: true, typ: "Vec512", resultInArg0: false},
-		{name: "VANDNPDMasked512", argLength: 3, reg: fp2k1fp1, asm: "VANDNPD", commutative: true, typ: "Vec512", resultInArg0: false},
+		{name: "VANDNPDMasked512", argLength: 3, reg: fp2k1fp1, asm: "VANDNPD", commutative: false, typ: "Vec512", resultInArg0: false},
 		{name: "VRCP14PDMasked512", argLength: 2, reg: fp1k1fp1, asm: "VRCP14PD", commutative: false, typ: "Vec512", resultInArg0: false},
 		{name: "VRSQRT14PDMasked512", argLength: 2, reg: fp1k1fp1, asm: "VRSQRT14PD", commutative: false, typ: "Vec512", resultInArg0: false},
 		{name: "VDIVPDMasked512", argLength: 3, reg: fp2k1fp1, asm: "VDIVPD", commutative: false, typ: "Vec512", resultInArg0: false},
@@ -390,7 +390,7 @@ func simdAMD64Ops(fp11, fp21, fp2k1, fp1k1fp1, fp2k1fp1, fp2k1k1, fp31, fp3k1fp1
 		{name: "VPABSW256", argLength: 1, reg: fp11, asm: "VPABSW", commutative: false, typ: "Vec256", resultInArg0: false},
 		{name: "VPADDW256", argLength: 2, reg: fp21, asm: "VPADDW", commutative: true, typ: "Vec256", resultInArg0: false},
 		{name: "VPAND256", argLength: 2, reg: fp21, asm: "VPAND", commutative: true, typ: "Vec256", resultInArg0: false},
-		{name: "VPANDN256", argLength: 2, reg: fp21, asm: "VPANDN", commutative: true, typ: "Vec256", resultInArg0: false},
+		{name: "VPANDN256", argLength: 2, reg: fp21, asm: "VPANDN", commutative: false, typ: "Vec256", resultInArg0: false},
 		{name: "VPCMPEQW256", argLength: 2, reg: fp21, asm: "VPCMPEQW", commutative: true, typ: "Vec256", resultInArg0: false},
 		{name: "VPCMPGTW256", argLength: 2, reg: fp21, asm: "VPCMPGTW", commutative: false, typ: "Vec256", resultInArg0: false},
 		{name: "VPABSWMasked256", argLength: 2, reg: fp1k1fp1, asm: "VPABSW", commutative: false, typ: "Vec256", resultInArg0: false},
@@ -451,7 +451,7 @@ func simdAMD64Ops(fp11, fp21, fp2k1, fp1k1fp1, fp2k1fp1, fp2k1k1, fp31, fp3k1fp1
 		{name: "VPABSW128", argLength: 1, reg: fp11, asm: "VPABSW", commutative: false, typ: "Vec128", resultInArg0: false},
 		{name: "VPADDW128", argLength: 2, reg: fp21, asm: "VPADDW", commutative: true, typ: "Vec128", resultInArg0: false},
 		{name: "VPAND128", argLength: 2, reg: fp21, asm: "VPAND", commutative: true, typ: "Vec128", resultInArg0: false},
-		{name: "VPANDN128", argLength: 2, reg: fp21, asm: "VPANDN", commutative: true, typ: "Vec128", resultInArg0: false},
+		{name: "VPANDN128", argLength: 2, reg: fp21, asm: "VPANDN", commutative: false, typ: "Vec128", resultInArg0: false},
 		{name: "VPCMPEQW128", argLength: 2, reg: fp21, asm: "VPCMPEQW", commutative: true, typ: "Vec128", resultInArg0: false},
 		{name: "VPCMPGTW128", argLength: 2, reg: fp21, asm: "VPCMPGTW", commutative: false, typ: "Vec128", resultInArg0: false},
 		{name: "VPABSWMasked128", argLength: 2, reg: fp1k1fp1, asm: "VPABSW", commutative: false, typ: "Vec128", resultInArg0: false},
@@ -486,13 +486,13 @@ func simdAMD64Ops(fp11, fp21, fp2k1, fp1k1fp1, fp2k1fp1, fp2k1k1, fp31, fp3k1fp1
 		{name: "VPABSD512", argLength: 1, reg: fp11, asm: "VPABSD", commutative: false, typ: "Vec512", resultInArg0: false},
 		{name: "VPADDD512", argLength: 2, reg: fp21, asm: "VPADDD", commutative: true, typ: "Vec512", resultInArg0: false},
 		{name: "VPANDD512", argLength: 2, reg: fp21, asm: "VPANDD", commutative: true, typ: "Vec512", resultInArg0: false},
-		{name: "VPANDND512", argLength: 2, reg: fp21, asm: "VPANDND", commutative: true, typ: "Vec512", resultInArg0: false},
+		{name: "VPANDND512", argLength: 2, reg: fp21, asm: "VPANDND", commutative: false, typ: "Vec512", resultInArg0: false},
 		{name: "VPCMPEQD512", argLength: 2, reg: fp2k1, asm: "VPCMPEQD", commutative: true, typ: "Mask", resultInArg0: false},
 		{name: "VPCMPGTD512", argLength: 2, reg: fp2k1, asm: "VPCMPGTD", commutative: false, typ: "Mask", resultInArg0: false},
 		{name: "VPABSDMasked512", argLength: 2, reg: fp1k1fp1, asm: "VPABSD", commutative: false, typ: "Vec512", resultInArg0: false},
 		{name: "VPADDDMasked512", argLength: 3, reg: fp2k1fp1, asm: "VPADDD", commutative: true, typ: "Vec512", resultInArg0: false},
 		{name: "VPANDDMasked512", argLength: 3, reg: fp2k1fp1, asm: "VPANDD", commutative: true, typ: "Vec512", resultInArg0: false},
-		{name: "VPANDNDMasked512", argLength: 3, reg: fp2k1fp1, asm: "VPANDND", commutative: true, typ: "Vec512", resultInArg0: false},
+		{name: "VPANDNDMasked512", argLength: 3, reg: fp2k1fp1, asm: "VPANDND", commutative: false, typ: "Vec512", resultInArg0: false},
 		{name: "VPCMPEQDMasked512", argLength: 3, reg: fp2k1k1, asm: "VPCMPEQD", commutative: true, typ: "Mask", resultInArg0: false},
 		{name: "VPCMPGTDMasked512", argLength: 3, reg: fp2k1k1, asm: "VPCMPGTD", commutative: false, typ: "Mask", resultInArg0: false},
 		{name: "VPMAXSDMasked512", argLength: 3, reg: fp2k1fp1, asm: "VPMAXSD", commutative: true, typ: "Vec512", resultInArg0: false},
@@ -524,7 +524,7 @@ func simdAMD64Ops(fp11, fp21, fp2k1, fp1k1fp1, fp2k1fp1, fp2k1k1, fp31, fp3k1fp1
 		{name: "VPABSDMasked128", argLength: 2, reg: fp1k1fp1, asm: "VPABSD", commutative: false, typ: "Vec128", resultInArg0: false},
 		{name: "VPADDDMasked128", argLength: 3, reg: fp2k1fp1, asm: "VPADDD", commutative: true, typ: "Vec128", resultInArg0: false},
 		{name: "VPANDDMasked128", argLength: 3, reg: fp2k1fp1, asm: "VPANDD", commutative: true, typ: "Vec128", resultInArg0: false},
-		{name: "VPANDNDMasked128", argLength: 3, reg: fp2k1fp1, asm: "VPANDND", commutative: true, typ: "Vec128", resultInArg0: false},
+		{name: "VPANDNDMasked128", argLength: 3, reg: fp2k1fp1, asm: "VPANDND", commutative: false, typ: "Vec128", resultInArg0: false},
 		{name: "VPCMPEQDMasked128", argLength: 3, reg: fp2k1k1, asm: "VPCMPEQD", commutative: true, typ: "Mask", resultInArg0: false},
 		{name: "VPCMPGTDMasked128", argLength: 3, reg: fp2k1k1, asm: "VPCMPGTD", commutative: false, typ: "Mask", resultInArg0: false},
 		{name: "VPMAXSDMasked128", argLength: 3, reg: fp2k1fp1, asm: "VPMAXSD", commutative: true, typ: "Vec128", resultInArg0: false},
@@ -558,7 +558,7 @@ func simdAMD64Ops(fp11, fp21, fp2k1, fp1k1fp1, fp2k1fp1, fp2k1k1, fp31, fp3k1fp1
 		{name: "VPABSDMasked256", argLength: 2, reg: fp1k1fp1, asm: "VPABSD", commutative: false, typ: "Vec256", resultInArg0: false},
 		{name: "VPADDDMasked256", argLength: 3, reg: fp2k1fp1, asm: "VPADDD", commutative: true, typ: "Vec256", resultInArg0: false},
 		{name: "VPANDDMasked256", argLength: 3, reg: fp2k1fp1, asm: "VPANDD", commutative: true, typ: "Vec256", resultInArg0: false},
-		{name: "VPANDNDMasked256", argLength: 3, reg: fp2k1fp1, asm: "VPANDND", commutative: true, typ: "Vec256", resultInArg0: false},
+		{name: "VPANDNDMasked256", argLength: 3, reg: fp2k1fp1, asm: "VPANDND", commutative: false, typ: "Vec256", resultInArg0: false},
 		{name: "VPCMPEQDMasked256", argLength: 3, reg: fp2k1k1, asm: "VPCMPEQD", commutative: true, typ: "Mask", resultInArg0: false},
 		{name: "VPCMPGTDMasked256", argLength: 3, reg: fp2k1k1, asm: "VPCMPGTD", commutative: false, typ: "Mask", resultInArg0: false},
 		{name: "VPMAXSDMasked256", argLength: 3, reg: fp2k1fp1, asm: "VPMAXSD", commutative: true, typ: "Vec256", resultInArg0: false},
@@ -592,7 +592,7 @@ func simdAMD64Ops(fp11, fp21, fp2k1, fp1k1fp1, fp2k1fp1, fp2k1k1, fp31, fp3k1fp1
 		{name: "VPABSQMasked128", argLength: 2, reg: fp1k1fp1, asm: "VPABSQ", commutative: false, typ: "Vec128", resultInArg0: false},
 		{name: "VPADDQMasked128", argLength: 3, reg: fp2k1fp1, asm: "VPADDQ", commutative: true, typ: "Vec128", resultInArg0: false},
 		{name: "VPANDQMasked128", argLength: 3, reg: fp2k1fp1, asm: "VPANDQ", commutative: true, typ: "Vec128", resultInArg0: false},
-		{name: "VPANDNQMasked128", argLength: 3, reg: fp2k1fp1, asm: "VPANDNQ", commutative: true, typ: "Vec128", resultInArg0: false},
+		{name: "VPANDNQMasked128", argLength: 3, reg: fp2k1fp1, asm: "VPANDNQ", commutative: false, typ: "Vec128", resultInArg0: false},
 		{name: "VPCMPEQQMasked128", argLength: 3, reg: fp2k1k1, asm: "VPCMPEQQ", commutative: true, typ: "Mask", resultInArg0: false},
 		{name: "VPCMPGTQMasked128", argLength: 3, reg: fp2k1k1, asm: "VPCMPGTQ", commutative: false, typ: "Mask", resultInArg0: false},
 		{name: "VPMAXSQMasked128", argLength: 3, reg: fp2k1fp1, asm: "VPMAXSQ", commutative: true, typ: "Vec128", resultInArg0: false},
@@ -615,7 +615,7 @@ func simdAMD64Ops(fp11, fp21, fp2k1, fp1k1fp1, fp2k1fp1, fp2k1k1, fp31, fp3k1fp1
 		{name: "VPABSQMasked256", argLength: 2, reg: fp1k1fp1, asm: "VPABSQ", commutative: false, typ: "Vec256", resultInArg0: false},
 		{name: "VPADDQMasked256", argLength: 3, reg: fp2k1fp1, asm: "VPADDQ", commutative: true, typ: "Vec256", resultInArg0: false},
 		{name: "VPANDQMasked256", argLength: 3, reg: fp2k1fp1, asm: "VPANDQ", commutative: true, typ: "Vec256", resultInArg0: false},
-		{name: "VPANDNQMasked256", argLength: 3, reg: fp2k1fp1, asm: "VPANDNQ", commutative: true, typ: "Vec256", resultInArg0: false},
+		{name: "VPANDNQMasked256", argLength: 3, reg: fp2k1fp1, asm: "VPANDNQ", commutative: false, typ: "Vec256", resultInArg0: false},
 		{name: "VPCMPEQQMasked256", argLength: 3, reg: fp2k1k1, asm: "VPCMPEQQ", commutative: true, typ: "Mask", resultInArg0: false},
 		{name: "VPCMPGTQMasked256", argLength: 3, reg: fp2k1k1, asm: "VPCMPGTQ", commutative: false, typ: "Mask", resultInArg0: false},
 		{name: "VPMAXSQMasked256", argLength: 3, reg: fp2k1fp1, asm: "VPMAXSQ", commutative: true, typ: "Vec256", resultInArg0: false},
@@ -634,13 +634,13 @@ func simdAMD64Ops(fp11, fp21, fp2k1, fp1k1fp1, fp2k1fp1, fp2k1k1, fp31, fp3k1fp1
 		{name: "VPABSQ512", argLength: 1, reg: fp11, asm: "VPABSQ", commutative: false, typ: "Vec512", resultInArg0: false},
 		{name: "VPADDQ512", argLength: 2, reg: fp21, asm: "VPADDQ", commutative: true, typ: "Vec512", resultInArg0: false},
 		{name: "VPANDQ512", argLength: 2, reg: fp21, asm: "VPANDQ", commutative: true, typ: "Vec512", resultInArg0: false},
-		{name: "VPANDNQ512", argLength: 2, reg: fp21, asm: "VPANDNQ", commutative: true, typ: "Vec512", resultInArg0: false},
+		{name: "VPANDNQ512", argLength: 2, reg: fp21, asm: "VPANDNQ", commutative: false, typ: "Vec512", resultInArg0: false},
 		{name: "VPCMPEQQ512", argLength: 2, reg: fp2k1, asm: "VPCMPEQQ", commutative: true, typ: "Mask", resultInArg0: false},
 		{name: "VPCMPGTQ512", argLength: 2, reg: fp2k1, asm: "VPCMPGTQ", commutative: false, typ: "Mask", resultInArg0: false},
 		{name: "VPABSQMasked512", argLength: 2, reg: fp1k1fp1, asm: "VPABSQ", commutative: false, typ: "Vec512", resultInArg0: false},
 		{name: "VPADDQMasked512", argLength: 3, reg: fp2k1fp1, asm: "VPADDQ", commutative: true, typ: "Vec512", resultInArg0: false},
 		{name: "VPANDQMasked512", argLength: 3, reg: fp2k1fp1, asm: "VPANDQ", commutative: true, typ: "Vec512", resultInArg0: false},
-		{name: "VPANDNQMasked512", argLength: 3, reg: fp2k1fp1, asm: "VPANDNQ", commutative: true, typ: "Vec512", resultInArg0: false},
+		{name: "VPANDNQMasked512", argLength: 3, reg: fp2k1fp1, asm: "VPANDNQ", commutative: false, typ: "Vec512", resultInArg0: false},
 		{name: "VPCMPEQQMasked512", argLength: 3, reg: fp2k1k1, asm: "VPCMPEQQ", commutative: true, typ: "Mask", resultInArg0: false},
 		{name: "VPCMPGTQMasked512", argLength: 3, reg: fp2k1k1, asm: "VPCMPGTQ", commutative: false, typ: "Mask", resultInArg0: false},
 		{name: "VPMAXSQMasked512", argLength: 3, reg: fp2k1fp1, asm: "VPMAXSQ", commutative: true, typ: "Vec512", resultInArg0: false},

src/cmd/compile/internal/ssa/_gen/simdgenericOps.go

@@ -5,7 +5,7 @@ func simdGenericOps() []opData {
 	return []opData{
 		{name: "AddFloat32x16", argLength: 2, commutative: true},
 		{name: "AndFloat32x16", argLength: 2, commutative: true},
-		{name: "AndNotFloat32x16", argLength: 2, commutative: true},
+		{name: "AndNotFloat32x16", argLength: 2, commutative: false},
 		{name: "ApproximateReciprocalFloat32x16", argLength: 1, commutative: false},
 		{name: "ApproximateReciprocalOfSqrtFloat32x16", argLength: 1, commutative: false},
 		{name: "DivFloat32x16", argLength: 2, commutative: false},
@@ -35,7 +35,7 @@ func simdGenericOps() []opData {
 		{name: "LessEqualFloat32x16", argLength: 2, commutative: false},
 		{name: "MaskedAddFloat32x16", argLength: 3, commutative: true},
 		{name: "MaskedAndFloat32x16", argLength: 3, commutative: true},
-		{name: "MaskedAndNotFloat32x16", argLength: 3, commutative: true},
+		{name: "MaskedAndNotFloat32x16", argLength: 3, commutative: false},
 		{name: "MaskedApproximateReciprocalFloat32x16", argLength: 2, commutative: false},
 		{name: "MaskedApproximateReciprocalOfSqrtFloat32x16", argLength: 2, commutative: false},
 		{name: "MaskedDivFloat32x16", argLength: 3, commutative: false},
@@ -84,7 +84,7 @@ func simdGenericOps() []opData {
 		{name: "AddFloat32x4", argLength: 2, commutative: true},
 		{name: "AddSubFloat32x4", argLength: 2, commutative: false},
 		{name: "AndFloat32x4", argLength: 2, commutative: true},
-		{name: "AndNotFloat32x4", argLength: 2, commutative: true},
+		{name: "AndNotFloat32x4", argLength: 2, commutative: false},
 		{name: "ApproximateReciprocalFloat32x4", argLength: 1, commutative: false},
 		{name: "ApproximateReciprocalOfSqrtFloat32x4", argLength: 1, commutative: false},
 		{name: "CeilFloat32x4", argLength: 1, commutative: false},
@@ -116,7 +116,7 @@ func simdGenericOps() []opData {
 		{name: "LessEqualFloat32x4", argLength: 2, commutative: false},
 		{name: "MaskedAddFloat32x4", argLength: 3, commutative: true},
 		{name: "MaskedAndFloat32x4", argLength: 3, commutative: true},
-		{name: "MaskedAndNotFloat32x4", argLength: 3, commutative: true},
+		{name: "MaskedAndNotFloat32x4", argLength: 3, commutative: false},
 		{name: "MaskedApproximateReciprocalFloat32x4", argLength: 2, commutative: false},
 		{name: "MaskedApproximateReciprocalOfSqrtFloat32x4", argLength: 2, commutative: false},
 		{name: "MaskedDivFloat32x4", argLength: 3, commutative: false},
@@ -169,7 +169,7 @@ func simdGenericOps() []opData {
 		{name: "AddFloat32x8", argLength: 2, commutative: true},
 		{name: "AddSubFloat32x8", argLength: 2, commutative: false},
 		{name: "AndFloat32x8", argLength: 2, commutative: true},
-		{name: "AndNotFloat32x8", argLength: 2, commutative: true},
+		{name: "AndNotFloat32x8", argLength: 2, commutative: false},
 		{name: "ApproximateReciprocalFloat32x8", argLength: 1, commutative: false},
 		{name: "ApproximateReciprocalOfSqrtFloat32x8", argLength: 1, commutative: false},
 		{name: "CeilFloat32x8", argLength: 1, commutative: false},
@@ -201,7 +201,7 @@ func simdGenericOps() []opData {
 		{name: "LessEqualFloat32x8", argLength: 2, commutative: false},
 		{name: "MaskedAddFloat32x8", argLength: 3, commutative: true},
 		{name: "MaskedAndFloat32x8", argLength: 3, commutative: true},
-		{name: "MaskedAndNotFloat32x8", argLength: 3, commutative: true},
+		{name: "MaskedAndNotFloat32x8", argLength: 3, commutative: false},
 		{name: "MaskedApproximateReciprocalFloat32x8", argLength: 2, commutative: false},
 		{name: "MaskedApproximateReciprocalOfSqrtFloat32x8", argLength: 2, commutative: false},
 		{name: "MaskedDivFloat32x8", argLength: 3, commutative: false},
@@ -254,7 +254,7 @@ func simdGenericOps() []opData {
 		{name: "AddFloat64x2", argLength: 2, commutative: true},
 		{name: "AddSubFloat64x2", argLength: 2, commutative: false},
 		{name: "AndFloat64x2", argLength: 2, commutative: true},
-		{name: "AndNotFloat64x2", argLength: 2, commutative: true},
+		{name: "AndNotFloat64x2", argLength: 2, commutative: false},
 		{name: "ApproximateReciprocalFloat64x2", argLength: 1, commutative: false},
 		{name: "ApproximateReciprocalOfSqrtFloat64x2", argLength: 1, commutative: false},
 		{name: "CeilFloat64x2", argLength: 1, commutative: false},
@@ -287,7 +287,7 @@ func simdGenericOps() []opData {
 		{name: "LessEqualFloat64x2", argLength: 2, commutative: false},
 		{name: "MaskedAddFloat64x2", argLength: 3, commutative: true},
 		{name: "MaskedAndFloat64x2", argLength: 3, commutative: true},
-		{name: "MaskedAndNotFloat64x2", argLength: 3, commutative: true},
+		{name: "MaskedAndNotFloat64x2", argLength: 3, commutative: false},
 		{name: "MaskedApproximateReciprocalFloat64x2", argLength: 2, commutative: false},
 		{name: "MaskedApproximateReciprocalOfSqrtFloat64x2", argLength: 2, commutative: false},
 		{name: "MaskedDivFloat64x2", argLength: 3, commutative: false},
@@ -340,7 +340,7 @@ func simdGenericOps() []opData {
 		{name: "AddFloat64x4", argLength: 2, commutative: true},
 		{name: "AddSubFloat64x4", argLength: 2, commutative: false},
 		{name: "AndFloat64x4", argLength: 2, commutative: true},
-		{name: "AndNotFloat64x4", argLength: 2, commutative: true},
+		{name: "AndNotFloat64x4", argLength: 2, commutative: false},
 		{name: "ApproximateReciprocalFloat64x4", argLength: 1, commutative: false},
 		{name: "ApproximateReciprocalOfSqrtFloat64x4", argLength: 1, commutative: false},
 		{name: "CeilFloat64x4", argLength: 1, commutative: false},
@@ -372,7 +372,7 @@ func simdGenericOps() []opData {
 		{name: "LessEqualFloat64x4", argLength: 2, commutative: false},
 		{name: "MaskedAddFloat64x4", argLength: 3, commutative: true},
 		{name: "MaskedAndFloat64x4", argLength: 3, commutative: true},
-		{name: "MaskedAndNotFloat64x4", argLength: 3, commutative: true},
+		{name: "MaskedAndNotFloat64x4", argLength: 3, commutative: false},
 		{name: "MaskedApproximateReciprocalFloat64x4", argLength: 2, commutative: false},
 		{name: "MaskedApproximateReciprocalOfSqrtFloat64x4", argLength: 2, commutative: false},
 		{name: "MaskedDivFloat64x4", argLength: 3, commutative: false},
@@ -424,7 +424,7 @@ func simdGenericOps() []opData {
 		{name: "XorFloat64x4", argLength: 2, commutative: true},
 		{name: "AddFloat64x8", argLength: 2, commutative: true},
 		{name: "AndFloat64x8", argLength: 2, commutative: true},
-		{name: "AndNotFloat64x8", argLength: 2, commutative: true},
+		{name: "AndNotFloat64x8", argLength: 2, commutative: false},
 		{name: "ApproximateReciprocalFloat64x8", argLength: 1, commutative: false},
 		{name: "ApproximateReciprocalOfSqrtFloat64x8", argLength: 1, commutative: false},
 		{name: "DivFloat64x8", argLength: 2, commutative: false},
@@ -454,7 +454,7 @@ func simdGenericOps() []opData {
 		{name: "LessEqualFloat64x8", argLength: 2, commutative: false},
 		{name: "MaskedAddFloat64x8", argLength: 3, commutative: true},
 		{name: "MaskedAndFloat64x8", argLength: 3, commutative: true},
-		{name: "MaskedAndNotFloat64x8", argLength: 3, commutative: true},
+		{name: "MaskedAndNotFloat64x8", argLength: 3, commutative: false},
 		{name: "MaskedApproximateReciprocalFloat64x8", argLength: 2, commutative: false},
 		{name: "MaskedApproximateReciprocalOfSqrtFloat64x8", argLength: 2, commutative: false},
 		{name: "MaskedDivFloat64x8", argLength: 3, commutative: false},
@@ -503,7 +503,7 @@ func simdGenericOps() []opData {
 		{name: "AbsoluteInt16x16", argLength: 1, commutative: false},
 		{name: "AddInt16x16", argLength: 2, commutative: true},
 		{name: "AndInt16x16", argLength: 2, commutative: true},
-		{name: "AndNotInt16x16", argLength: 2, commutative: true},
+		{name: "AndNotInt16x16", argLength: 2, commutative: false},
 		{name: "EqualInt16x16", argLength: 2, commutative: true},
 		{name: "GreaterInt16x16", argLength: 2, commutative: false},
 		{name: "GreaterEqualInt16x16", argLength: 2, commutative: false},
@@ -580,7 +580,7 @@ func simdGenericOps() []opData {
 		{name: "AbsoluteInt16x8", argLength: 1, commutative: false},
 		{name: "AddInt16x8", argLength: 2, commutative: true},
 		{name: "AndInt16x8", argLength: 2, commutative: true},
-		{name: "AndNotInt16x8", argLength: 2, commutative: true},
+		{name: "AndNotInt16x8", argLength: 2, commutative: false},
 		{name: "EqualInt16x8", argLength: 2, commutative: true},
 		{name: "GreaterInt16x8", argLength: 2, commutative: false},
 		{name: "GreaterEqualInt16x8", argLength: 2, commutative: false},
@@ -623,7 +623,7 @@ func simdGenericOps() []opData {
 		{name: "AbsoluteInt32x16", argLength: 1, commutative: false},
 		{name: "AddInt32x16", argLength: 2, commutative: true},
 		{name: "AndInt32x16", argLength: 2, commutative: true},
-		{name: "AndNotInt32x16", argLength: 2, commutative: true},
+		{name: "AndNotInt32x16", argLength: 2, commutative: false},
 		{name: "EqualInt32x16", argLength: 2, commutative: true},
 		{name: "GreaterInt32x16", argLength: 2, commutative: false},
 		{name: "GreaterEqualInt32x16", argLength: 2, commutative: false},
@@ -632,7 +632,7 @@ func simdGenericOps() []opData {
 		{name: "MaskedAbsoluteInt32x16", argLength: 2, commutative: false},
 		{name: "MaskedAddInt32x16", argLength: 3, commutative: true},
 		{name: "MaskedAndInt32x16", argLength: 3, commutative: true},
-		{name: "MaskedAndNotInt32x16", argLength: 3, commutative: true},
+		{name: "MaskedAndNotInt32x16", argLength: 3, commutative: false},
 		{name: "MaskedEqualInt32x16", argLength: 3, commutative: true},
 		{name: "MaskedGreaterInt32x16", argLength: 3, commutative: false},
 		{name: "MaskedGreaterEqualInt32x16", argLength: 3, commutative: false},
@@ -665,7 +665,7 @@ func simdGenericOps() []opData {
 		{name: "AbsoluteInt32x4", argLength: 1, commutative: false},
 		{name: "AddInt32x4", argLength: 2, commutative: true},
 		{name: "AndInt32x4", argLength: 2, commutative: true},
-		{name: "AndNotInt32x4", argLength: 2, commutative: true},
+		{name: "AndNotInt32x4", argLength: 2, commutative: false},
 		{name: "EqualInt32x4", argLength: 2, commutative: true},
 		{name: "GreaterInt32x4", argLength: 2, commutative: false},
 		{name: "GreaterEqualInt32x4", argLength: 2, commutative: false},
@@ -674,7 +674,7 @@ func simdGenericOps() []opData {
 		{name: "MaskedAbsoluteInt32x4", argLength: 2, commutative: false},
 		{name: "MaskedAddInt32x4", argLength: 3, commutative: true},
 		{name: "MaskedAndInt32x4", argLength: 3, commutative: true},
-		{name: "MaskedAndNotInt32x4", argLength: 3, commutative: true},
+		{name: "MaskedAndNotInt32x4", argLength: 3, commutative: false},
 		{name: "MaskedEqualInt32x4", argLength: 3, commutative: true},
 		{name: "MaskedGreaterInt32x4", argLength: 3, commutative: false},
 		{name: "MaskedGreaterEqualInt32x4", argLength: 3, commutative: false},
@@ -711,7 +711,7 @@ func simdGenericOps() []opData {
 		{name: "AbsoluteInt32x8", argLength: 1, commutative: false},
 		{name: "AddInt32x8", argLength: 2, commutative: true},
 		{name: "AndInt32x8", argLength: 2, commutative: true},
-		{name: "AndNotInt32x8", argLength: 2, commutative: true},
+		{name: "AndNotInt32x8", argLength: 2, commutative: false},
 		{name: "EqualInt32x8", argLength: 2, commutative: true},
 		{name: "GreaterInt32x8", argLength: 2, commutative: false},
 		{name: "GreaterEqualInt32x8", argLength: 2, commutative: false},
@@ -720,7 +720,7 @@ func simdGenericOps() []opData {
 		{name: "MaskedAbsoluteInt32x8", argLength: 2, commutative: false},
 		{name: "MaskedAddInt32x8", argLength: 3, commutative: true},
 		{name: "MaskedAndInt32x8", argLength: 3, commutative: true},
-		{name: "MaskedAndNotInt32x8", argLength: 3, commutative: true},
+		{name: "MaskedAndNotInt32x8", argLength: 3, commutative: false},
 		{name: "MaskedEqualInt32x8", argLength: 3, commutative: true},
 		{name: "MaskedGreaterInt32x8", argLength: 3, commutative: false},
 		{name: "MaskedGreaterEqualInt32x8", argLength: 3, commutative: false},
@@ -757,7 +757,7 @@ func simdGenericOps() []opData {
 		{name: "AbsoluteInt64x2", argLength: 1, commutative: false},
 		{name: "AddInt64x2", argLength: 2, commutative: true},
 		{name: "AndInt64x2", argLength: 2, commutative: true},
-		{name: "AndNotInt64x2", argLength: 2, commutative: true},
+		{name: "AndNotInt64x2", argLength: 2, commutative: false},
 		{name: "EqualInt64x2", argLength: 2, commutative: true},
 		{name: "GreaterInt64x2", argLength: 2, commutative: false},
 		{name: "GreaterEqualInt64x2", argLength: 2, commutative: false},
@@ -766,7 +766,7 @@ func simdGenericOps() []opData {
 		{name: "MaskedAbsoluteInt64x2", argLength: 2, commutative: false},
 		{name: "MaskedAddInt64x2", argLength: 3, commutative: true},
 		{name: "MaskedAndInt64x2", argLength: 3, commutative: true},
-		{name: "MaskedAndNotInt64x2", argLength: 3, commutative: true},
+		{name: "MaskedAndNotInt64x2", argLength: 3, commutative: false},
 		{name: "MaskedEqualInt64x2", argLength: 3, commutative: true},
 		{name: "MaskedGreaterInt64x2", argLength: 3, commutative: false},
 		{name: "MaskedGreaterEqualInt64x2", argLength: 3, commutative: false},
@@ -793,7 +793,7 @@ func simdGenericOps() []opData {
 		{name: "AbsoluteInt64x4", argLength: 1, commutative: false},
 		{name: "AddInt64x4", argLength: 2, commutative: true},
 		{name: "AndInt64x4", argLength: 2, commutative: true},
-		{name: "AndNotInt64x4", argLength: 2, commutative: true},
+		{name: "AndNotInt64x4", argLength: 2, commutative: false},
 		{name: "EqualInt64x4", argLength: 2, commutative: true},
 		{name: "GreaterInt64x4", argLength: 2, commutative: false},
 		{name: "GreaterEqualInt64x4", argLength: 2, commutative: false},
@@ -802,7 +802,7 @@ func simdGenericOps() []opData {
 		{name: "MaskedAbsoluteInt64x4", argLength: 2, commutative: false},
 		{name: "MaskedAddInt64x4", argLength: 3, commutative: true},
 		{name: "MaskedAndInt64x4", argLength: 3, commutative: true},
-		{name: "MaskedAndNotInt64x4", argLength: 3, commutative: true},
+		{name: "MaskedAndNotInt64x4", argLength: 3, commutative: false},
 		{name: "MaskedEqualInt64x4", argLength: 3, commutative: true},
 		{name: "MaskedGreaterInt64x4", argLength: 3, commutative: false},
 		{name: "MaskedGreaterEqualInt64x4", argLength: 3, commutative: false},
@@ -829,7 +829,7 @@ func simdGenericOps() []opData {
 		{name: "AbsoluteInt64x8", argLength: 1, commutative: false},
 		{name: "AddInt64x8", argLength: 2, commutative: true},
 		{name: "AndInt64x8", argLength: 2, commutative: true},
-		{name: "AndNotInt64x8", argLength: 2, commutative: true},
+		{name: "AndNotInt64x8", argLength: 2, commutative: false},
 		{name: "EqualInt64x8", argLength: 2, commutative: true},
 		{name: "GreaterInt64x8", argLength: 2, commutative: false},
 		{name: "GreaterEqualInt64x8", argLength: 2, commutative: false},
@@ -838,7 +838,7 @@ func simdGenericOps() []opData {
 		{name: "MaskedAbsoluteInt64x8", argLength: 2, commutative: false},
 		{name: "MaskedAddInt64x8", argLength: 3, commutative: true},
 		{name: "MaskedAndInt64x8", argLength: 3, commutative: true},
-		{name: "MaskedAndNotInt64x8", argLength: 3, commutative: true},
+		{name: "MaskedAndNotInt64x8", argLength: 3, commutative: false},
 		{name: "MaskedEqualInt64x8", argLength: 3, commutative: true},
 		{name: "MaskedGreaterInt64x8", argLength: 3, commutative: false},
 		{name: "MaskedGreaterEqualInt64x8", argLength: 3, commutative: false},
@@ -865,7 +865,7 @@ func simdGenericOps() []opData {
 		{name: "AbsoluteInt8x16", argLength: 1, commutative: false},
 		{name: "AddInt8x16", argLength: 2, commutative: true},
 		{name: "AndInt8x16", argLength: 2, commutative: true},
-		{name: "AndNotInt8x16", argLength: 2, commutative: true},
+		{name: "AndNotInt8x16", argLength: 2, commutative: false},
 		{name: "EqualInt8x16", argLength: 2, commutative: true},
 		{name: "GreaterInt8x16", argLength: 2, commutative: false},
 		{name: "GreaterEqualInt8x16", argLength: 2, commutative: false},
@@ -898,7 +898,7 @@ func simdGenericOps() []opData {
 		{name: "AbsoluteInt8x32", argLength: 1, commutative: false},
 		{name: "AddInt8x32", argLength: 2, commutative: true},
 		{name: "AndInt8x32", argLength: 2, commutative: true},
-		{name: "AndNotInt8x32", argLength: 2, commutative: true},
+		{name: "AndNotInt8x32", argLength: 2, commutative: false},
 		{name: "EqualInt8x32", argLength: 2, commutative: true},
 		{name: "GreaterInt8x32", argLength: 2, commutative: false},
 		{name: "GreaterEqualInt8x32", argLength: 2, commutative: false},
@@ -958,7 +958,7 @@ func simdGenericOps() []opData {
 		{name: "SubInt8x64", argLength: 2, commutative: false},
 		{name: "AddUint16x16", argLength: 2, commutative: true},
 		{name: "AndUint16x16", argLength: 2, commutative: true},
-		{name: "AndNotUint16x16", argLength: 2, commutative: true},
+		{name: "AndNotUint16x16", argLength: 2, commutative: false},
 		{name: "AverageUint16x16", argLength: 2, commutative: true},
 		{name: "EqualUint16x16", argLength: 2, commutative: true},
 		{name: "GreaterUint16x16", argLength: 2, commutative: false},
@@ -1028,7 +1028,7 @@ func simdGenericOps() []opData {
 		{name: "SubUint16x32", argLength: 2, commutative: false},
 		{name: "AddUint16x8", argLength: 2, commutative: true},
 		{name: "AndUint16x8", argLength: 2, commutative: true},
-		{name: "AndNotUint16x8", argLength: 2, commutative: true},
+		{name: "AndNotUint16x8", argLength: 2, commutative: false},
 		{name: "AverageUint16x8", argLength: 2, commutative: true},
 		{name: "EqualUint16x8", argLength: 2, commutative: true},
 		{name: "GreaterUint16x8", argLength: 2, commutative: false},
@@ -1066,7 +1066,7 @@ func simdGenericOps() []opData {
 		{name: "XorUint16x8", argLength: 2, commutative: true},
 		{name: "AddUint32x16", argLength: 2, commutative: true},
 		{name: "AndUint32x16", argLength: 2, commutative: true},
-		{name: "AndNotUint32x16", argLength: 2, commutative: true},
+		{name: "AndNotUint32x16", argLength: 2, commutative: false},
 		{name: "EqualUint32x16", argLength: 2, commutative: true},
 		{name: "GreaterUint32x16", argLength: 2, commutative: false},
 		{name: "GreaterEqualUint32x16", argLength: 2, commutative: false},
@@ -1074,7 +1074,7 @@ func simdGenericOps() []opData {
 		{name: "LessEqualUint32x16", argLength: 2, commutative: false},
 		{name: "MaskedAddUint32x16", argLength: 3, commutative: true},
 		{name: "MaskedAndUint32x16", argLength: 3, commutative: true},
-		{name: "MaskedAndNotUint32x16", argLength: 3, commutative: true},
+		{name: "MaskedAndNotUint32x16", argLength: 3, commutative: false},
 		{name: "MaskedEqualUint32x16", argLength: 3, commutative: true},
 		{name: "MaskedGreaterUint32x16", argLength: 3, commutative: false},
 		{name: "MaskedGreaterEqualUint32x16", argLength: 3, commutative: false},
@@ -1100,7 +1100,7 @@ func simdGenericOps() []opData {
 		{name: "XorUint32x16", argLength: 2, commutative: true},
 		{name: "AddUint32x4", argLength: 2, commutative: true},
 		{name: "AndUint32x4", argLength: 2, commutative: true},
-		{name: "AndNotUint32x4", argLength: 2, commutative: true},
+		{name: "AndNotUint32x4", argLength: 2, commutative: false},
 		{name: "EqualUint32x4", argLength: 2, commutative: true},
 		{name: "GreaterUint32x4", argLength: 2, commutative: false},
 		{name: "GreaterEqualUint32x4", argLength: 2, commutative: false},
@@ -1108,7 +1108,7 @@ func simdGenericOps() []opData {
 		{name: "LessEqualUint32x4", argLength: 2, commutative: false},
 		{name: "MaskedAddUint32x4", argLength: 3, commutative: true},
 		{name: "MaskedAndUint32x4", argLength: 3, commutative: true},
-		{name: "MaskedAndNotUint32x4", argLength: 3, commutative: true},
+		{name: "MaskedAndNotUint32x4", argLength: 3, commutative: false},
 		{name: "MaskedEqualUint32x4", argLength: 3, commutative: true},
 		{name: "MaskedGreaterUint32x4", argLength: 3, commutative: false},
 		{name: "MaskedGreaterEqualUint32x4", argLength: 3, commutative: false},
@@ -1137,7 +1137,7 @@ func simdGenericOps() []opData {
 		{name: "XorUint32x4", argLength: 2, commutative: true},
 		{name: "AddUint32x8", argLength: 2, commutative: true},
 		{name: "AndUint32x8", argLength: 2, commutative: true},
-		{name: "AndNotUint32x8", argLength: 2, commutative: true},
+		{name: "AndNotUint32x8", argLength: 2, commutative: false},
 		{name: "EqualUint32x8", argLength: 2, commutative: true},
 		{name: "GreaterUint32x8", argLength: 2, commutative: false},
 		{name: "GreaterEqualUint32x8", argLength: 2, commutative: false},
@@ -1145,7 +1145,7 @@ func simdGenericOps() []opData {
 		{name: "LessEqualUint32x8", argLength: 2, commutative: false},
 		{name: "MaskedAddUint32x8", argLength: 3, commutative: true},
 		{name: "MaskedAndUint32x8", argLength: 3, commutative: true},
-		{name: "MaskedAndNotUint32x8", argLength: 3, commutative: true},
+		{name: "MaskedAndNotUint32x8", argLength: 3, commutative: false},
 		{name: "MaskedEqualUint32x8", argLength: 3, commutative: true},
 		{name: "MaskedGreaterUint32x8", argLength: 3, commutative: false},
 		{name: "MaskedGreaterEqualUint32x8", argLength: 3, commutative: false},
@@ -1174,7 +1174,7 @@ func simdGenericOps() []opData {
 		{name: "XorUint32x8", argLength: 2, commutative: true},
 		{name: "AddUint64x2", argLength: 2, commutative: true},
 		{name: "AndUint64x2", argLength: 2, commutative: true},
-		{name: "AndNotUint64x2", argLength: 2, commutative: true},
+		{name: "AndNotUint64x2", argLength: 2, commutative: false},
 		{name: "EqualUint64x2", argLength: 2, commutative: true},
 		{name: "GreaterUint64x2", argLength: 2, commutative: false},
 		{name: "GreaterEqualUint64x2", argLength: 2, commutative: false},
@@ -1182,7 +1182,7 @@ func simdGenericOps() []opData {
 		{name: "LessEqualUint64x2", argLength: 2, commutative: false},
 		{name: "MaskedAddUint64x2", argLength: 3, commutative: true},
 		{name: "MaskedAndUint64x2", argLength: 3, commutative: true},
-		{name: "MaskedAndNotUint64x2", argLength: 3, commutative: true},
+		{name: "MaskedAndNotUint64x2", argLength: 3, commutative: false},
 		{name: "MaskedEqualUint64x2", argLength: 3, commutative: true},
 		{name: "MaskedGreaterUint64x2", argLength: 3, commutative: false},
 		{name: "MaskedGreaterEqualUint64x2", argLength: 3, commutative: false},
@@ -1206,7 +1206,7 @@ func simdGenericOps() []opData {
 		{name: "XorUint64x2", argLength: 2, commutative: true},
 		{name: "AddUint64x4", argLength: 2, commutative: true},
 		{name: "AndUint64x4", argLength: 2, commutative: true},
-		{name: "AndNotUint64x4", argLength: 2, commutative: true},
+		{name: "AndNotUint64x4", argLength: 2, commutative: false},
 		{name: "EqualUint64x4", argLength: 2, commutative: true},
 		{name: "GreaterUint64x4", argLength: 2, commutative: false},
 		{name: "GreaterEqualUint64x4", argLength: 2, commutative: false},
@@ -1214,7 +1214,7 @@ func simdGenericOps() []opData {
 		{name: "LessEqualUint64x4", argLength: 2, commutative: false},
 		{name: "MaskedAddUint64x4", argLength: 3, commutative: true},
 		{name: "MaskedAndUint64x4", argLength: 3, commutative: true},
-		{name: "MaskedAndNotUint64x4", argLength: 3, commutative: true},
+		{name: "MaskedAndNotUint64x4", argLength: 3, commutative: false},
 		{name: "MaskedEqualUint64x4", argLength: 3, commutative: true},
 		{name: "MaskedGreaterUint64x4", argLength: 3, commutative: false},
 		{name: "MaskedGreaterEqualUint64x4", argLength: 3, commutative: false},
@@ -1238,7 +1238,7 @@ func simdGenericOps() []opData {
 		{name: "XorUint64x4", argLength: 2, commutative: true},
 		{name: "AddUint64x8", argLength: 2, commutative: true},
 		{name: "AndUint64x8", argLength: 2, commutative: true},
-		{name: "AndNotUint64x8", argLength: 2, commutative: true},
+		{name: "AndNotUint64x8", argLength: 2, commutative: false},
 		{name: "EqualUint64x8", argLength: 2, commutative: true},
 		{name: "GreaterUint64x8", argLength: 2, commutative: false},
 		{name: "GreaterEqualUint64x8", argLength: 2, commutative: false},
@@ -1246,7 +1246,7 @@ func simdGenericOps() []opData {
 		{name: "LessEqualUint64x8", argLength: 2, commutative: false},
 		{name: "MaskedAddUint64x8", argLength: 3, commutative: true},
 		{name: "MaskedAndUint64x8", argLength: 3, commutative: true},
-		{name: "MaskedAndNotUint64x8", argLength: 3, commutative: true},
+		{name: "MaskedAndNotUint64x8", argLength: 3, commutative: false},
 		{name: "MaskedEqualUint64x8", argLength: 3, commutative: true},
 		{name: "MaskedGreaterUint64x8", argLength: 3, commutative: false},
 		{name: "MaskedGreaterEqualUint64x8", argLength: 3, commutative: false},
@@ -1270,7 +1270,7 @@ func simdGenericOps() []opData {
 		{name: "XorUint64x8", argLength: 2, commutative: true},
 		{name: "AddUint8x16", argLength: 2, commutative: true},
 		{name: "AndUint8x16", argLength: 2, commutative: true},
-		{name: "AndNotUint8x16", argLength: 2, commutative: true},
+		{name: "AndNotUint8x16", argLength: 2, commutative: false},
 		{name: "AverageUint8x16", argLength: 2, commutative: true},
 		{name: "EqualUint8x16", argLength: 2, commutative: true},
 		{name: "GreaterUint8x16", argLength: 2, commutative: false},
@@ -1303,7 +1303,7 @@ func simdGenericOps() []opData {
 		{name: "XorUint8x16", argLength: 2, commutative: true},
 		{name: "AddUint8x32", argLength: 2, commutative: true},
 		{name: "AndUint8x32", argLength: 2, commutative: true},
-		{name: "AndNotUint8x32", argLength: 2, commutative: true},
+		{name: "AndNotUint8x32", argLength: 2, commutative: false},
 		{name: "AverageUint8x32", argLength: 2, commutative: true},
 		{name: "EqualUint8x32", argLength: 2, commutative: true},
 		{name: "GreaterUint8x32", argLength: 2, commutative: false},

src/cmd/compile/internal/ssa/opGen.go

@@ -18486,7 +18486,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:   "VANDNPS512",
 		argLen: 2,
-		commutative: true,
 		asm:    x86.AVANDNPS,
 		reg: regInfo{
 			inputs: []inputInfo{
@@ -18861,7 +18860,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:   "VANDNPSMasked512",
 		argLen: 3,
-		commutative: true,
 		asm:    x86.AVANDNPS,
 		reg: regInfo{
 			inputs: []inputInfo{
@@ -19481,7 +19479,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:   "VANDNPS128",
 		argLen: 2,
-		commutative: true,
 		asm:    x86.AVANDNPS,
 		reg: regInfo{
 			inputs: []inputInfo{
@@ -19856,7 +19853,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:   "VANDNPSMasked128",
 		argLen: 3,
-		commutative: true,
 		asm:    x86.AVANDNPS,
 		reg: regInfo{
 			inputs: []inputInfo{
@@ -20504,7 +20500,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:   "VANDNPS256",
 		argLen: 2,
-		commutative: true,
 		asm:    x86.AVANDNPS,
 		reg: regInfo{
 			inputs: []inputInfo{
@@ -20879,7 +20874,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:   "VANDNPSMasked256",
 		argLen: 3,
-		commutative: true,
 		asm:    x86.AVANDNPS,
 		reg: regInfo{
 			inputs: []inputInfo{
@@ -21527,7 +21521,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:   "VANDNPD128",
 		argLen: 2,
-		commutative: true,
 		asm:    x86.AVANDNPD,
 		reg: regInfo{
 			inputs: []inputInfo{
@@ -21902,7 +21895,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:   "VANDNPDMasked128",
 		argLen: 3,
-		commutative: true,
 		asm:    x86.AVANDNPD,
 		reg: regInfo{
 			inputs: []inputInfo{
@@ -22550,7 +22542,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:   "VANDNPD256",
 		argLen: 2,
-		commutative: true,
 		asm:    x86.AVANDNPD,
 		reg: regInfo{
 			inputs: []inputInfo{
@@ -22925,7 +22916,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:   "VANDNPDMasked256",
 		argLen: 3,
-		commutative: true,
 		asm:    x86.AVANDNPD,
 		reg: regInfo{
 			inputs: []inputInfo{
@@ -23559,7 +23549,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:   "VANDNPD512",
 		argLen: 2,
-		commutative: true,
 		asm:    x86.AVANDNPD,
 		reg: regInfo{
 			inputs: []inputInfo{
@@ -23934,7 +23923,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:   "VANDNPDMasked512",
 		argLen: 3,
-		commutative: true,
 		asm:    x86.AVANDNPD,
 		reg: regInfo{
 			inputs: []inputInfo{
@@ -24553,7 +24541,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:   "VPANDN256",
 		argLen: 2,
-		commutative: true,
 		asm:    x86.AVPANDN,
 		reg: regInfo{
 			inputs: []inputInfo{
@@ -25457,7 +25444,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:   "VPANDN128",
 		argLen: 2,
-		commutative: true,
 		asm:    x86.AVPANDN,
 		reg: regInfo{
 			inputs: []inputInfo{
@@ -25974,7 +25960,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:   "VPANDND512",
 		argLen: 2,
-		commutative: true,
 		asm:    x86.AVPANDND,
 		reg: regInfo{
 			inputs: []inputInfo{
@@ -26064,7 +26049,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:   "VPANDNDMasked512",
 		argLen: 3,
-		commutative: true,
 		asm:    x86.AVPANDND,
 		reg: regInfo{
 			inputs: []inputInfo{
@@ -26557,7 +26541,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:   "VPANDNDMasked128",
 		argLen: 3,
-		commutative: true,
 		asm:    x86.AVPANDND,
 		reg: regInfo{
 			inputs: []inputInfo{
@@ -27077,7 +27060,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:   "VPANDNDMasked256",
 		argLen: 3,
-		commutative: true,
 		asm:    x86.AVPANDND,
 		reg: regInfo{
 			inputs: []inputInfo{
@@ -27597,7 +27579,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:   "VPANDNQMasked128",
 		argLen: 3,
-		commutative: true,
 		asm:    x86.AVPANDNQ,
 		reg: regInfo{
 			inputs: []inputInfo{
@@ -27944,7 +27925,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:   "VPANDNQMasked256",
 		argLen: 3,
-		commutative: true,
 		asm:    x86.AVPANDNQ,
 		reg: regInfo{
 			inputs: []inputInfo{
@@ -28231,7 +28211,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:   "VPANDNQ512",
 		argLen: 2,
-		commutative: true,
 		asm:    x86.AVPANDNQ,
 		reg: regInfo{
 			inputs: []inputInfo{
@@ -28321,7 +28300,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:   "VPANDNQMasked512",
 		argLen: 3,
-		commutative: true,
 		asm:    x86.AVPANDNQ,
 		reg: regInfo{
 			inputs: []inputInfo{
@@ -59279,7 +59257,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "AndNotFloat32x16",
 		argLen:  2,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -59434,7 +59411,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "MaskedAndNotFloat32x16",
 		argLen:  3,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -59696,7 +59672,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "AndNotFloat32x4",
 		argLen:  2,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -59861,7 +59836,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "MaskedAndNotFloat32x4",
 		argLen:  3,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -60143,7 +60117,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "AndNotFloat32x8",
 		argLen:  2,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -60308,7 +60281,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "MaskedAndNotFloat32x8",
 		argLen:  3,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -60590,7 +60562,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "AndNotFloat64x2",
 		argLen:  2,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -60761,7 +60732,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "MaskedAndNotFloat64x2",
 		argLen:  3,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -61043,7 +61013,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "AndNotFloat64x4",
 		argLen:  2,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -61208,7 +61177,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "MaskedAndNotFloat64x4",
 		argLen:  3,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -61485,7 +61453,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "AndNotFloat64x8",
 		argLen:  2,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -61640,7 +61607,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "MaskedAndNotFloat64x8",
 		argLen:  3,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -61902,7 +61868,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "AndNotInt16x16",
 		argLen:  2,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -62323,7 +62288,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "AndNotInt16x8",
 		argLen:  2,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -62558,7 +62522,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "AndNotInt32x16",
 		argLen:  2,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -62607,7 +62570,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "MaskedAndNotInt32x16",
 		argLen:  3,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -62788,7 +62750,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "AndNotInt32x4",
 		argLen:  2,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -62837,7 +62798,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "MaskedAndNotInt32x4",
 		argLen:  3,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -63039,7 +62999,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "AndNotInt32x8",
 		argLen:  2,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -63088,7 +63047,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "MaskedAndNotInt32x8",
 		argLen:  3,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -63290,7 +63248,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "AndNotInt64x2",
 		argLen:  2,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -63339,7 +63296,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "MaskedAndNotInt64x2",
 		argLen:  3,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -63492,7 +63448,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "AndNotInt64x4",
 		argLen:  2,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -63541,7 +63496,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "MaskedAndNotInt64x4",
 		argLen:  3,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -63694,7 +63648,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "AndNotInt64x8",
 		argLen:  2,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -63743,7 +63696,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "MaskedAndNotInt64x8",
 		argLen:  3,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -63896,7 +63848,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "AndNotInt8x16",
 		argLen:  2,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -64077,7 +64028,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "AndNotInt8x32",
 		argLen:  2,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -64405,7 +64355,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "AndNotUint16x16",
 		argLen:  2,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -64791,7 +64740,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "AndNotUint16x8",
 		argLen:  2,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -65001,7 +64949,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "AndNotUint32x16",
 		argLen:  2,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -65045,7 +64992,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "MaskedAndNotUint32x16",
 		argLen:  3,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -65189,7 +65135,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "AndNotUint32x4",
 		argLen:  2,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -65233,7 +65178,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "MaskedAndNotUint32x4",
 		argLen:  3,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -65393,7 +65337,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "AndNotUint32x8",
 		argLen:  2,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -65437,7 +65380,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "MaskedAndNotUint32x8",
 		argLen:  3,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -65597,7 +65539,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "AndNotUint64x2",
 		argLen:  2,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -65641,7 +65582,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "MaskedAndNotUint64x2",
 		argLen:  3,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -65777,7 +65717,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "AndNotUint64x4",
 		argLen:  2,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -65821,7 +65760,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "MaskedAndNotUint64x4",
 		argLen:  3,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -65957,7 +65895,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "AndNotUint64x8",
 		argLen:  2,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -66001,7 +65938,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "MaskedAndNotUint64x8",
 		argLen:  3,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -66137,7 +66073,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "AndNotUint8x16",
 		argLen:  2,
-		commutative: true,
 		generic: true,
 	},
 	{
@@ -66320,7 +66255,6 @@ var opcodeTable = [...]opInfo{
 	{
 		name:    "AndNotUint8x32",
 		argLen:  2,
-		commutative: true,
 		generic: true,
 	},
 	{