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cmd/internal/obj/loong64: add LDPTR.{W/D} and STPTR.{W/D} instructions support
Go asm syntax: MOVWP 4(R4), R5 MOVVP 8(R4), R5 MOVWP R4, 12(R5) MOVVP R4, 16(R5) Equivalent platform assembler syntax: ldptr.w r5, r4, $1 ldptr.d r5, r4, $2 stptr.w r4, r5, $3 stptr.d r4, r5, $4 Change-Id: I50a341cee2d875cb7c5da9db08b23799c9dc6c64 Reviewed-on: https://go-review.googlesource.com/c/go/+/699055 Reviewed-by: abner chenc <chenguoqi@loongson.cn> Reviewed-by: Meidan Li <limeidan@loongson.cn> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Carlos Amedee <carlos@golang.org> Reviewed-by: Cherry Mui <cherryyz@google.com>
This commit is contained in:
Xiaolin Zhao
abner chenc
parent
d4b17f5869
commit
882335e2cb
5 changed files with 89 additions and 0 deletions
22
src/cmd/asm/internal/asm/testdata/loong64enc1.s
vendored
22
src/cmd/asm/internal/asm/testdata/loong64enc1.s
vendored
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@ -260,6 +260,28 @@ lable2:
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MOVV FCC0, R4 // 04dc1401
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MOVV R4, FCC0 // 80d81401
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// LDPTR.{W/D} and STPTR.{W/D} instructions
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MOVWP R5, -32768(R4) // 85008025
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MOVWP R5, 32764(R4) // 85fc7f25
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MOVWP R5, 32(R4) // 85200025
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MOVWP R5, 4(R4) // 85040025
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MOVWP R5, (R4) // 85000025
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MOVVP R5, -32768(R4) // 85008027
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MOVVP R5, 32764(R4) // 85fc7f27
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MOVVP R5, 32(R4) // 85200027
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MOVVP R5, 4(R4) // 85040027
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MOVVP R5, (R4) // 85000027
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MOVWP -32768(R5), R4 // a4008024
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MOVWP 32764(R5), R4 // a4fc7f24
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MOVWP 32(R5), R4 // a4200024
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MOVWP 4(R5), R4 // a4040024
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MOVWP (R5), R4 // a4000024
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MOVVP -32768(R5), R4 // a4008026
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MOVVP 32764(R5), R4 // a4fc7f26
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MOVVP 32(R5), R4 // a4200026
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MOVVP 4(R5), R4 // a4040026
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MOVVP (R5), R4 // a4000026
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// Loong64 atomic memory access instructions
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AMSWAPB R14, (R13), R12 // ac395c38
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AMSWAPH R14, (R13), R12 // acb95c38
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@ -666,6 +666,10 @@ const (
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ABSTRPICKW
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ABSTRPICKV
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// 2.2.5.3
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AMOVWP
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AMOVVP
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// 2.2.5.4. Prefetch Instructions
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APRELD
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APRELDX
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@ -202,6 +202,8 @@ var Anames = []string{
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"BSTRINSV",
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"BSTRPICKW",
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"BSTRPICKV",
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"MOVWP",
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"MOVVP",
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"PRELD",
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"PRELDX",
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"CRCWBW",
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@ -212,6 +212,8 @@ var optab = []Optab{
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{AMOVV, C_REG, C_NONE, C_NONE, C_TLS_LE, C_NONE, 53, 16, 0, 0},
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{AMOVB, C_REG, C_NONE, C_NONE, C_TLS_LE, C_NONE, 53, 16, 0, 0},
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{AMOVBU, C_REG, C_NONE, C_NONE, C_TLS_LE, C_NONE, 53, 16, 0, 0},
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{AMOVWP, C_REG, C_NONE, C_NONE, C_SOREG, C_NONE, 73, 4, 0, 0},
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{AMOVWP, C_REG, C_NONE, C_NONE, C_LOREG, C_NONE, 73, 4, 0, 0},
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{AMOVW, C_LAUTO, C_NONE, C_NONE, C_REG, C_NONE, 36, 12, REGSP, 0},
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{AMOVWU, C_LAUTO, C_NONE, C_NONE, C_REG, C_NONE, 36, 12, REGSP, 0},
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@ -233,6 +235,8 @@ var optab = []Optab{
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{AMOVV, C_TLS_LE, C_NONE, C_NONE, C_REG, C_NONE, 54, 16, 0, 0},
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{AMOVB, C_TLS_LE, C_NONE, C_NONE, C_REG, C_NONE, 54, 16, 0, 0},
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{AMOVBU, C_TLS_LE, C_NONE, C_NONE, C_REG, C_NONE, 54, 16, 0, 0},
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{AMOVWP, C_SOREG, C_NONE, C_NONE, C_REG, C_NONE, 74, 4, 0, 0},
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{AMOVWP, C_LOREG, C_NONE, C_NONE, C_REG, C_NONE, 74, 4, 0, 0},
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{AMOVW, C_SACON, C_NONE, C_NONE, C_REG, C_NONE, 3, 4, REGSP, 0},
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{AMOVV, C_SACON, C_NONE, C_NONE, C_REG, C_NONE, 3, 4, REGSP, 0},
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@ -1437,6 +1441,9 @@ func buildop(ctxt *obj.Link) {
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case AMOVBU:
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opset(AMOVHU, r0)
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case AMOVWP:
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opset(AMOVVP, r0)
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case AMUL:
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opset(AMULU, r0)
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opset(AMULH, r0)
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@ -1964,6 +1971,10 @@ func OP_16IRR(op uint32, i uint32, r2 uint32, r3 uint32) uint32 {
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return op | (i&0xFFFF)<<10 | (r2&0x1F)<<5 | (r3&0x1F)<<0
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}
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func OP_14IRR(op uint32, i uint32, r2 uint32, r3 uint32) uint32 {
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return op | (i&0x3FFF)<<10 | (r2&0x1F)<<5 | (r3&0x1F)<<0
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}
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func OP_12IR_5I(op uint32, i1 uint32, r2 uint32, i2 uint32) uint32 {
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return op | (i1&0xFFF)<<10 | (r2&0x1F)<<5 | (i2&0x1F)<<0
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}
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@ -2893,6 +2904,20 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) {
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o3 = OP_12IRR(c.opirr(ALU52ID), uint32(v>>52), uint32(REGTMP), uint32(REGTMP))
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}
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o4 = OP_RRR(c.oprrr(p.As), uint32(REGTMP), uint32(r), uint32(p.To.Reg))
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case 73:
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v := c.regoff(&p.To)
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if v&3 != 0 {
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c.ctxt.Diag("%v: offset must be a multiple of 4.\n", p)
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}
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o1 = OP_14IRR(c.opirr(p.As), uint32(v>>2), uint32(p.To.Reg), uint32(p.From.Reg))
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case 74:
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v := c.regoff(&p.From)
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if v&3 != 0 {
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c.ctxt.Diag("%v: offset must be a multiple of 4.\n", p)
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}
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o1 = OP_14IRR(c.opirr(-p.As), uint32(v>>2), uint32(p.From.Reg), uint32(p.To.Reg))
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}
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out[0] = o1
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@ -4026,6 +4051,10 @@ func (c *ctxt0) opirr(a obj.As) uint32 {
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return 0x0ad << 22
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case AMOVD:
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return 0x0af << 22
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case AMOVVP:
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return 0x27 << 24 // stptr.d
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case AMOVWP:
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return 0x25 << 24 // stptr.w
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case -AMOVB:
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return 0x0a0 << 22
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case -AMOVBU:
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@ -4044,6 +4073,10 @@ func (c *ctxt0) opirr(a obj.As) uint32 {
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return 0x0ac << 22
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case -AMOVD:
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return 0x0ae << 22
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case -AMOVVP:
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return 0x26 << 24 // ldptr.d
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case -AMOVWP:
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return 0x24 << 24 // ldptr.w
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case -AVMOVQ:
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return 0x0b0 << 22 // vld
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case -AXVMOVQ:
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@ -289,6 +289,34 @@ Note: In the following sections 3.1 to 3.6, "ui4" (4-bit unsigned int immediate)
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Go assembly | instruction Encoding
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ALSLV $4, r4, r5, R6 | 002d9486
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5. Note of special memory access instructions
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Instruction format:
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MOVWP offset(Rj), Rd
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MOVVP offset(Rj), Rd
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MOVWP Rd, offset(Rj)
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MOVVP Rd, offset(Rj)
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Mapping between Go and platform assembly:
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Go assembly | platform assembly
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MOVWP offset(Rj), Rd | ldptr.w rd, rj, si14
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MOVVP offset(Rj), Rd | ldptr.d rd, rj, si14
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MOVWP Rd, offset(Rj) | stptr.w rd, rj, si14
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MOVVP Rd, offset(Rj) | stptr.d rd, rj, si14
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note: In Go assembly, for ease of understanding, offset is a 16-bit immediate number representing
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the actual address offset, but in platform assembly, it need a 14-bit immediate number.
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si14 = offset>>2
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The addressing calculation for the above instruction involves logically left-shifting the 14-bit
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immediate number si14 by 2 bits, then sign-extending it, and finally adding it to the value in the
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general-purpose register rj to obtain the sum.
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For example:
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Go assembly | platform assembly
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MOVWP 8(R4), R5 | ldptr.w r5, r4, $2
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*/
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package loong64
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