diff --git a/src/cmd/compile/internal/amd64/simdssa.go b/src/cmd/compile/internal/amd64/simdssa.go index 466e6c9cc74..1ab4c88cba7 100644 --- a/src/cmd/compile/internal/amd64/simdssa.go +++ b/src/cmd/compile/internal/amd64/simdssa.go @@ -1654,10 +1654,6 @@ func ssaGenSIMDValue(s *ssagen.State, v *ssa.Value) bool { ssa.OpAMD64VPXORQMasked128, ssa.OpAMD64VPXORQMasked256, ssa.OpAMD64VPXORQMasked512, - ssa.OpAMD64VPBLENDMBMasked512, - ssa.OpAMD64VPBLENDMWMasked512, - ssa.OpAMD64VPBLENDMDMasked512, - ssa.OpAMD64VPBLENDMQMasked512, ssa.OpAMD64VPSLLWMasked128const, ssa.OpAMD64VPSLLWMasked256const, ssa.OpAMD64VPSLLWMasked512const, diff --git a/src/simd/_gen/simdgen/ops/Moves/go.yaml b/src/simd/_gen/simdgen/ops/Moves/go.yaml index 0e5997deebb..d4d1b4b9bd3 100644 --- a/src/simd/_gen/simdgen/ops/Moves/go.yaml +++ b/src/simd/_gen/simdgen/ops/Moves/go.yaml @@ -253,6 +253,7 @@ # That means the signature is wrong. - go: blend asm: VPBLENDVB + zeroing: false in: - &v go: $t @@ -269,6 +270,7 @@ # For AVX512 - go: blend asm: VPBLENDM[BWDQ] + zeroing: false in: - &v go: $t diff --git a/src/simd/simd_test.go b/src/simd/simd_test.go index 831dc4f268b..ce982409ea9 100644 --- a/src/simd/simd_test.go +++ b/src/simd/simd_test.go @@ -397,6 +397,28 @@ func TestMergeFloat(t *testing.T) { checkSlices[float64](t, s, []float64{4, 2, 3, 4}) } +func TestMergeFloat512(t *testing.T) { + if !simd.HasAVX512() { + t.Skip("Test requires HasAVX512, not available on this hardware") + return + } + a := simd.LoadFloat64x8Slice([]float64{1, 2, 3, 4, 5, 6, 7, 8}) + b := simd.LoadFloat64x8Slice([]float64{8, 7, 6, 5, 4, 2, 3, 1}) + g := a.Greater(b) + k := make([]int64, 8, 8) + g.AsInt64x8().StoreSlice(k) + checkSlices[int64](t, k, []int64{0, 0, 0, 0, -1, -1, -1, -1}) + c := a.Merge(b, g) + d := a.Masked(g) + + s := make([]float64, 8, 8) + c.StoreSlice(s) + checkSlices[float64](t, s, []float64{8, 7, 6, 5, 5, 6, 7, 8}) + + d.StoreSlice(s) + checkSlices[float64](t, s, []float64{0, 0, 0, 0, 5, 6, 7, 8}) +} + var ro uint8 = 2 func TestRotateAllVariable(t *testing.T) {