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test/codegen: simplify asmcheck pattern matching
Separate patterns in asmcheck by spaces instead of commas. Many patterns end in comma (like "MOV [$]123,") so separating patterns by comma is not great; they're already quoted, so spaces are fine. Also replace all tabs in the assembly lines with spaces before matching. Finally, replace \$ or \\$ with [$] as the matching idiom. The effect of all these is to make the patterns look like: // amd64:"BSFQ" "ORQ [$]256" instead of the old: // amd64:"BSFQ","ORQ\t\\$256" Update all tests as well. Change-Id: Ia39febe5d7f67ba115846422789e11b185d5c807 Reviewed-on: https://go-review.googlesource.com/c/go/+/716060 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Alan Donovan <adonovan@google.com> Reviewed-by: Jorropo <jorropo.pgm@gmail.com>
This commit is contained in:
Russ Cox
parent
32ee3f3f73
commit
915c1839fe
48 changed files with 2035 additions and 2032 deletions
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@ -13,57 +13,57 @@ package codegen
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func lshConst64x64(v int64) int64 {
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// loong64:"SLLV"
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// ppc64x:"SLD"
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// riscv64:"SLLI",-"AND",-"SLTIU"
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// riscv64:"SLLI" -"AND" -"SLTIU"
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return v << uint64(33)
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}
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func rshConst64Ux64(v uint64) uint64 {
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// loong64:"SRLV"
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// ppc64x:"SRD"
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// riscv64:"SRLI\t",-"AND",-"SLTIU"
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// riscv64:"SRLI " -"AND" -"SLTIU"
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return v >> uint64(33)
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}
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func rshConst64Ux64Overflow32(v uint32) uint64 {
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// loong64:"MOVV\tR0,",-"SRL\t"
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// riscv64:"MOV\t\\$0,",-"SRL"
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// loong64:"MOVV R0," -"SRL "
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// riscv64:"MOV [$]0," -"SRL"
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return uint64(v) >> 32
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}
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func rshConst64Ux64Overflow16(v uint16) uint64 {
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// loong64:"MOVV\tR0,",-"SRLV"
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// riscv64:"MOV\t\\$0,",-"SRL"
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// loong64:"MOVV R0," -"SRLV"
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// riscv64:"MOV [$]0," -"SRL"
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return uint64(v) >> 16
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}
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func rshConst64Ux64Overflow8(v uint8) uint64 {
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// loong64:"MOVV\tR0,",-"SRLV"
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// riscv64:"MOV\t\\$0,",-"SRL"
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// loong64:"MOVV R0," -"SRLV"
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// riscv64:"MOV [$]0," -"SRL"
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return uint64(v) >> 8
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}
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func rshConst64x64(v int64) int64 {
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// loong64:"SRAV"
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// ppc64x:"SRAD"
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// riscv64:"SRAI\t",-"OR",-"SLTIU"
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// riscv64:"SRAI " -"OR" -"SLTIU"
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return v >> uint64(33)
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}
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func rshConst64x64Overflow32(v int32) int64 {
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// loong64:"SRA\t\\$31"
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// riscv64:"SRAIW",-"SLLI",-"SRAI\t"
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// loong64:"SRA [$]31"
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// riscv64:"SRAIW" -"SLLI" -"SRAI "
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return int64(v) >> 32
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}
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func rshConst64x64Overflow16(v int16) int64 {
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// loong64:"SLLV\t\\$48","SRAV\t\\$63"
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// riscv64:"SLLI","SRAI",-"SRAIW"
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// loong64:"SLLV [$]48" "SRAV [$]63"
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// riscv64:"SLLI" "SRAI" -"SRAIW"
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return int64(v) >> 16
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}
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func rshConst64x64Overflow8(v int8) int64 {
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// loong64:"SLLV\t\\$56","SRAV\t\\$63"
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// riscv64:"SLLI","SRAI",-"SRAIW"
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// loong64:"SLLV [$]56" "SRAV [$]63"
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// riscv64:"SLLI" "SRAI" -"SRAIW"
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return int64(v) >> 8
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}
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@ -78,84 +78,84 @@ func lshConst64x1(v int64) int64 {
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}
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func lshConst32x64(v int32) int32 {
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// loong64:"SLL\t"
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// loong64:"SLL "
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// ppc64x:"SLW"
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// riscv64:"SLLI",-"AND",-"SLTIU", -"MOVW"
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// riscv64:"SLLI" -"AND" -"SLTIU", -"MOVW"
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return v << uint64(29)
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}
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func rshConst32Ux64(v uint32) uint32 {
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// loong64:"SRL\t"
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// loong64:"SRL "
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// ppc64x:"SRW"
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// riscv64:"SRLIW",-"AND",-"SLTIU", -"MOVW"
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// riscv64:"SRLIW" -"AND" -"SLTIU", -"MOVW"
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return v >> uint64(29)
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}
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func rshConst32x64(v int32) int32 {
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// loong64:"SRA\t"
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// loong64:"SRA "
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// ppc64x:"SRAW"
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// riscv64:"SRAIW",-"OR",-"SLTIU", -"MOVW"
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// riscv64:"SRAIW" -"OR" -"SLTIU", -"MOVW"
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return v >> uint64(29)
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}
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func lshConst64x32(v int64) int64 {
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// loong64:"SLLV"
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// ppc64x:"SLD"
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// riscv64:"SLLI",-"AND",-"SLTIU"
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// riscv64:"SLLI" -"AND" -"SLTIU"
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return v << uint32(33)
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}
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func rshConst64Ux32(v uint64) uint64 {
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// loong64:"SRLV"
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// ppc64x:"SRD"
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// riscv64:"SRLI\t",-"AND",-"SLTIU"
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// riscv64:"SRLI " -"AND" -"SLTIU"
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return v >> uint32(33)
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}
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func rshConst64x32(v int64) int64 {
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// loong64:"SRAV"
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// ppc64x:"SRAD"
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// riscv64:"SRAI\t",-"OR",-"SLTIU"
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// riscv64:"SRAI " -"OR" -"SLTIU"
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return v >> uint32(33)
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}
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func lshConst32x1Add(x int32) int32 {
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// amd64:"SHLL\t[$]2"
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// loong64:"SLL\t[$]2"
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// riscv64:"SLLI\t[$]2"
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// amd64:"SHLL [$]2"
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// loong64:"SLL [$]2"
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// riscv64:"SLLI [$]2"
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return (x + x) << 1
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}
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func lshConst64x1Add(x int64) int64 {
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// amd64:"SHLQ\t[$]2"
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// loong64:"SLLV\t[$]2"
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// riscv64:"SLLI\t[$]2"
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// amd64:"SHLQ [$]2"
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// loong64:"SLLV [$]2"
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// riscv64:"SLLI [$]2"
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return (x + x) << 1
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}
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func lshConst32x2Add(x int32) int32 {
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// amd64:"SHLL\t[$]3"
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// loong64:"SLL\t[$]3"
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// riscv64:"SLLI\t[$]3"
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// amd64:"SHLL [$]3"
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// loong64:"SLL [$]3"
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// riscv64:"SLLI [$]3"
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return (x + x) << 2
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}
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func lshConst64x2Add(x int64) int64 {
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// amd64:"SHLQ\t[$]3"
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// loong64:"SLLV\t[$]3"
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// riscv64:"SLLI\t[$]3"
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// amd64:"SHLQ [$]3"
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// loong64:"SLLV [$]3"
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// riscv64:"SLLI [$]3"
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return (x + x) << 2
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}
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func lshConst32x31Add(x int32) int32 {
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// loong64:-"SLL\t","MOVV\tR0"
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// riscv64:-"SLLI","MOV\t[$]0"
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// loong64:-"SLL " "MOVV R0"
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// riscv64:-"SLLI" "MOV [$]0"
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return (x + x) << 31
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}
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func lshConst64x63Add(x int64) int64 {
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// loong64:-"SLLV","MOVV\tR0"
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// riscv64:-"SLLI","MOV\t[$]0"
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// loong64:-"SLLV" "MOVV R0"
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// riscv64:-"SLLI" "MOV [$]0"
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return (x + x) << 63
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}
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@ -164,121 +164,121 @@ func lshConst64x63Add(x int64) int64 {
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// ------------------ //
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func lshMask64x64(v int64, s uint64) int64 {
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// arm64:"LSL",-"AND"
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// loong64:"SLLV",-"AND"
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// ppc64x:"RLDICL",-"ORN",-"ISEL"
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// riscv64:"SLL",-"AND\t",-"SLTIU"
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// s390x:-"RISBGZ",-"AND",-"LOCGR"
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// arm64:"LSL" -"AND"
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// loong64:"SLLV" -"AND"
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// ppc64x:"RLDICL" -"ORN" -"ISEL"
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// riscv64:"SLL" -"AND " -"SLTIU"
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// s390x:-"RISBGZ" -"AND" -"LOCGR"
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return v << (s & 63)
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}
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func rshMask64Ux64(v uint64, s uint64) uint64 {
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// arm64:"LSR",-"AND",-"CSEL"
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// loong64:"SRLV",-"AND"
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// ppc64x:"RLDICL",-"ORN",-"ISEL"
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// riscv64:"SRL\t",-"AND\t",-"SLTIU"
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// s390x:-"RISBGZ",-"AND",-"LOCGR"
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// arm64:"LSR" -"AND" -"CSEL"
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// loong64:"SRLV" -"AND"
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// ppc64x:"RLDICL" -"ORN" -"ISEL"
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// riscv64:"SRL " -"AND " -"SLTIU"
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// s390x:-"RISBGZ" -"AND" -"LOCGR"
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return v >> (s & 63)
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}
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func rshMask64x64(v int64, s uint64) int64 {
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// arm64:"ASR",-"AND",-"CSEL"
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// loong64:"SRAV",-"AND"
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// ppc64x:"RLDICL",-"ORN",-"ISEL"
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// riscv64:"SRA\t",-"OR",-"SLTIU"
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// s390x:-"RISBGZ",-"AND",-"LOCGR"
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// arm64:"ASR" -"AND" -"CSEL"
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// loong64:"SRAV" -"AND"
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// ppc64x:"RLDICL" -"ORN" -"ISEL"
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// riscv64:"SRA " -"OR" -"SLTIU"
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// s390x:-"RISBGZ" -"AND" -"LOCGR"
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return v >> (s & 63)
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}
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func lshMask32x64(v int32, s uint64) int32 {
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// arm64:"LSL",-"AND"
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// loong64:"SLL\t","AND","SGTU","MASKEQZ"
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// ppc64x:"ISEL",-"ORN"
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// riscv64:"SLL",-"AND\t",-"SLTIU"
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// s390x:-"RISBGZ",-"AND",-"LOCGR"
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// arm64:"LSL" -"AND"
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// loong64:"SLL " "AND" "SGTU" "MASKEQZ"
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// ppc64x:"ISEL" -"ORN"
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// riscv64:"SLL" -"AND " -"SLTIU"
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// s390x:-"RISBGZ" -"AND" -"LOCGR"
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return v << (s & 63)
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}
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func lsh5Mask32x64(v int32, s uint64) int32 {
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// loong64:"SLL\t",-"AND"
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// loong64:"SLL " -"AND"
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return v << (s & 31)
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}
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func rshMask32Ux64(v uint32, s uint64) uint32 {
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// arm64:"LSR",-"AND"
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// loong64:"SRL\t","AND","SGTU","MASKEQZ"
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// ppc64x:"ISEL",-"ORN"
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// riscv64:"SRLW","SLTIU","NEG","AND\t",-"SRL\t"
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// s390x:-"RISBGZ",-"AND",-"LOCGR"
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// arm64:"LSR" -"AND"
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// loong64:"SRL " "AND" "SGTU" "MASKEQZ"
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// ppc64x:"ISEL" -"ORN"
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// riscv64:"SRLW" "SLTIU" "NEG" "AND " -"SRL "
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// s390x:-"RISBGZ" -"AND" -"LOCGR"
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return v >> (s & 63)
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}
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func rsh5Mask32Ux64(v uint32, s uint64) uint32 {
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// loong64:"SRL\t",-"AND"
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// riscv64:"SRLW",-"AND\t",-"SLTIU",-"SRL\t"
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// loong64:"SRL " -"AND"
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// riscv64:"SRLW" -"AND " -"SLTIU" -"SRL "
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return v >> (s & 31)
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}
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func rshMask32x64(v int32, s uint64) int32 {
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// arm64:"ASR",-"AND"
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// loong64:"SRA\t","AND","SGTU","SUBVU","OR"
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// ppc64x:"ISEL",-"ORN"
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// riscv64:"SRAW","OR","SLTIU"
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// s390x:-"RISBGZ",-"AND",-"LOCGR"
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// arm64:"ASR" -"AND"
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// loong64:"SRA " "AND" "SGTU" "SUBVU" "OR"
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// ppc64x:"ISEL" -"ORN"
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// riscv64:"SRAW" "OR" "SLTIU"
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// s390x:-"RISBGZ" -"AND" -"LOCGR"
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return v >> (s & 63)
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}
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func rsh5Mask32x64(v int32, s uint64) int32 {
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// loong64:"SRA\t",-"AND"
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// riscv64:"SRAW",-"OR",-"SLTIU"
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// loong64:"SRA " -"AND"
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// riscv64:"SRAW" -"OR" -"SLTIU"
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return v >> (s & 31)
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}
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func lshMask64x32(v int64, s uint32) int64 {
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// arm64:"LSL",-"AND"
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// loong64:"SLLV",-"AND"
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// ppc64x:"RLDICL",-"ORN"
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// riscv64:"SLL",-"AND\t",-"SLTIU"
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// s390x:-"RISBGZ",-"AND",-"LOCGR"
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// arm64:"LSL" -"AND"
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// loong64:"SLLV" -"AND"
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// ppc64x:"RLDICL" -"ORN"
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// riscv64:"SLL" -"AND " -"SLTIU"
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// s390x:-"RISBGZ" -"AND" -"LOCGR"
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return v << (s & 63)
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}
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func rshMask64Ux32(v uint64, s uint32) uint64 {
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// arm64:"LSR",-"AND",-"CSEL"
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// loong64:"SRLV",-"AND"
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// ppc64x:"RLDICL",-"ORN"
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// riscv64:"SRL\t",-"AND\t",-"SLTIU"
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// s390x:-"RISBGZ",-"AND",-"LOCGR"
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// arm64:"LSR" -"AND" -"CSEL"
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// loong64:"SRLV" -"AND"
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// ppc64x:"RLDICL" -"ORN"
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// riscv64:"SRL " -"AND " -"SLTIU"
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// s390x:-"RISBGZ" -"AND" -"LOCGR"
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return v >> (s & 63)
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}
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func rshMask64x32(v int64, s uint32) int64 {
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// arm64:"ASR",-"AND",-"CSEL"
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// loong64:"SRAV",-"AND"
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// ppc64x:"RLDICL",-"ORN",-"ISEL"
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// riscv64:"SRA\t",-"OR",-"SLTIU"
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// s390x:-"RISBGZ",-"AND",-"LOCGR"
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// arm64:"ASR" -"AND" -"CSEL"
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// loong64:"SRAV" -"AND"
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// ppc64x:"RLDICL" -"ORN" -"ISEL"
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// riscv64:"SRA " -"OR" -"SLTIU"
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// s390x:-"RISBGZ" -"AND" -"LOCGR"
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return v >> (s & 63)
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}
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func lshMask64x32Ext(v int64, s int32) int64 {
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// ppc64x:"RLDICL",-"ORN",-"ISEL"
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// riscv64:"SLL",-"AND\t",-"SLTIU"
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// s390x:-"RISBGZ",-"AND",-"LOCGR"
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// ppc64x:"RLDICL" -"ORN" -"ISEL"
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// riscv64:"SLL" -"AND " -"SLTIU"
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// s390x:-"RISBGZ" -"AND" -"LOCGR"
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return v << uint(s&63)
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}
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func rshMask64Ux32Ext(v uint64, s int32) uint64 {
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// ppc64x:"RLDICL",-"ORN",-"ISEL"
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// riscv64:"SRL\t",-"AND\t",-"SLTIU"
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// s390x:-"RISBGZ",-"AND",-"LOCGR"
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// ppc64x:"RLDICL" -"ORN" -"ISEL"
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// riscv64:"SRL " -"AND " -"SLTIU"
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// s390x:-"RISBGZ" -"AND" -"LOCGR"
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return v >> uint(s&63)
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}
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func rshMask64x32Ext(v int64, s int32) int64 {
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// ppc64x:"RLDICL",-"ORN",-"ISEL"
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// riscv64:"SRA\t",-"OR",-"SLTIU"
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// s390x:-"RISBGZ",-"AND",-"LOCGR"
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// ppc64x:"RLDICL" -"ORN" -"ISEL"
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// riscv64:"SRA " -"OR" -"SLTIU"
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// s390x:-"RISBGZ" -"AND" -"LOCGR"
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return v >> uint(s&63)
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}
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@ -316,10 +316,10 @@ func lshSignedMasked(v8 int8, v16 int16, v32 int32, v64 int64, x int) {
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func lshGuarded64(v int64, s uint) int64 {
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if s < 64 {
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// riscv64:"SLL",-"AND",-"SLTIU"
|
||||
// s390x:-"RISBGZ",-"AND",-"LOCGR"
|
||||
// wasm:-"Select",-".*LtU"
|
||||
// arm64:"LSL",-"CSEL"
|
||||
// riscv64:"SLL" -"AND" -"SLTIU"
|
||||
// s390x:-"RISBGZ" -"AND" -"LOCGR"
|
||||
// wasm:-"Select" -".*LtU"
|
||||
// arm64:"LSL" -"CSEL"
|
||||
return v << s
|
||||
}
|
||||
panic("shift too large")
|
||||
|
|
@ -327,10 +327,10 @@ func lshGuarded64(v int64, s uint) int64 {
|
|||
|
||||
func rshGuarded64U(v uint64, s uint) uint64 {
|
||||
if s < 64 {
|
||||
// riscv64:"SRL\t",-"AND",-"SLTIU"
|
||||
// s390x:-"RISBGZ",-"AND",-"LOCGR"
|
||||
// wasm:-"Select",-".*LtU"
|
||||
// arm64:"LSR",-"CSEL"
|
||||
// riscv64:"SRL " -"AND" -"SLTIU"
|
||||
// s390x:-"RISBGZ" -"AND" -"LOCGR"
|
||||
// wasm:-"Select" -".*LtU"
|
||||
// arm64:"LSR" -"CSEL"
|
||||
return v >> s
|
||||
}
|
||||
panic("shift too large")
|
||||
|
|
@ -338,10 +338,10 @@ func rshGuarded64U(v uint64, s uint) uint64 {
|
|||
|
||||
func rshGuarded64(v int64, s uint) int64 {
|
||||
if s < 64 {
|
||||
// riscv64:"SRA\t",-"OR",-"SLTIU"
|
||||
// s390x:-"RISBGZ",-"AND",-"LOCGR"
|
||||
// wasm:-"Select",-".*LtU"
|
||||
// arm64:"ASR",-"CSEL"
|
||||
// riscv64:"SRA " -"OR" -"SLTIU"
|
||||
// s390x:-"RISBGZ" -"AND" -"LOCGR"
|
||||
// wasm:-"Select" -".*LtU"
|
||||
// arm64:"ASR" -"CSEL"
|
||||
return v >> s
|
||||
}
|
||||
panic("shift too large")
|
||||
|
|
@ -349,19 +349,19 @@ func rshGuarded64(v int64, s uint) int64 {
|
|||
|
||||
func provedUnsignedShiftLeft(val64 uint64, val32 uint32, val16 uint16, val8 uint8, shift int) (r1 uint64, r2 uint32, r3 uint16, r4 uint8) {
|
||||
if shift >= 0 && shift < 64 {
|
||||
// arm64:"LSL",-"CSEL"
|
||||
// arm64:"LSL" -"CSEL"
|
||||
r1 = val64 << shift
|
||||
}
|
||||
if shift >= 0 && shift < 32 {
|
||||
// arm64:"LSL",-"CSEL"
|
||||
// arm64:"LSL" -"CSEL"
|
||||
r2 = val32 << shift
|
||||
}
|
||||
if shift >= 0 && shift < 16 {
|
||||
// arm64:"LSL",-"CSEL"
|
||||
// arm64:"LSL" -"CSEL"
|
||||
r3 = val16 << shift
|
||||
}
|
||||
if shift >= 0 && shift < 8 {
|
||||
// arm64:"LSL",-"CSEL"
|
||||
// arm64:"LSL" -"CSEL"
|
||||
r4 = val8 << shift
|
||||
}
|
||||
return r1, r2, r3, r4
|
||||
|
|
@ -369,19 +369,19 @@ func provedUnsignedShiftLeft(val64 uint64, val32 uint32, val16 uint16, val8 uint
|
|||
|
||||
func provedSignedShiftLeft(val64 int64, val32 int32, val16 int16, val8 int8, shift int) (r1 int64, r2 int32, r3 int16, r4 int8) {
|
||||
if shift >= 0 && shift < 64 {
|
||||
// arm64:"LSL",-"CSEL"
|
||||
// arm64:"LSL" -"CSEL"
|
||||
r1 = val64 << shift
|
||||
}
|
||||
if shift >= 0 && shift < 32 {
|
||||
// arm64:"LSL",-"CSEL"
|
||||
// arm64:"LSL" -"CSEL"
|
||||
r2 = val32 << shift
|
||||
}
|
||||
if shift >= 0 && shift < 16 {
|
||||
// arm64:"LSL",-"CSEL"
|
||||
// arm64:"LSL" -"CSEL"
|
||||
r3 = val16 << shift
|
||||
}
|
||||
if shift >= 0 && shift < 8 {
|
||||
// arm64:"LSL",-"CSEL"
|
||||
// arm64:"LSL" -"CSEL"
|
||||
r4 = val8 << shift
|
||||
}
|
||||
return r1, r2, r3, r4
|
||||
|
|
@ -389,19 +389,19 @@ func provedSignedShiftLeft(val64 int64, val32 int32, val16 int16, val8 int8, shi
|
|||
|
||||
func provedUnsignedShiftRight(val64 uint64, val32 uint32, val16 uint16, val8 uint8, shift int) (r1 uint64, r2 uint32, r3 uint16, r4 uint8) {
|
||||
if shift >= 0 && shift < 64 {
|
||||
// arm64:"LSR",-"CSEL"
|
||||
// arm64:"LSR" -"CSEL"
|
||||
r1 = val64 >> shift
|
||||
}
|
||||
if shift >= 0 && shift < 32 {
|
||||
// arm64:"LSR",-"CSEL"
|
||||
// arm64:"LSR" -"CSEL"
|
||||
r2 = val32 >> shift
|
||||
}
|
||||
if shift >= 0 && shift < 16 {
|
||||
// arm64:"LSR",-"CSEL"
|
||||
// arm64:"LSR" -"CSEL"
|
||||
r3 = val16 >> shift
|
||||
}
|
||||
if shift >= 0 && shift < 8 {
|
||||
// arm64:"LSR",-"CSEL"
|
||||
// arm64:"LSR" -"CSEL"
|
||||
r4 = val8 >> shift
|
||||
}
|
||||
return r1, r2, r3, r4
|
||||
|
|
@ -409,19 +409,19 @@ func provedUnsignedShiftRight(val64 uint64, val32 uint32, val16 uint16, val8 uin
|
|||
|
||||
func provedSignedShiftRight(val64 int64, val32 int32, val16 int16, val8 int8, shift int) (r1 int64, r2 int32, r3 int16, r4 int8) {
|
||||
if shift >= 0 && shift < 64 {
|
||||
// arm64:"ASR",-"CSEL"
|
||||
// arm64:"ASR" -"CSEL"
|
||||
r1 = val64 >> shift
|
||||
}
|
||||
if shift >= 0 && shift < 32 {
|
||||
// arm64:"ASR",-"CSEL"
|
||||
// arm64:"ASR" -"CSEL"
|
||||
r2 = val32 >> shift
|
||||
}
|
||||
if shift >= 0 && shift < 16 {
|
||||
// arm64:"ASR",-"CSEL"
|
||||
// arm64:"ASR" -"CSEL"
|
||||
r3 = val16 >> shift
|
||||
}
|
||||
if shift >= 0 && shift < 8 {
|
||||
// arm64:"ASR",-"CSEL"
|
||||
// arm64:"ASR" -"CSEL"
|
||||
r4 = val8 >> shift
|
||||
}
|
||||
return r1, r2, r3, r4
|
||||
|
|
@ -429,36 +429,36 @@ func provedSignedShiftRight(val64 int64, val32 int32, val16 int16, val8 int8, sh
|
|||
|
||||
func checkUnneededTrunc(tab *[100000]uint32, d uint64, v uint32, h uint16, b byte) (uint32, uint64) {
|
||||
|
||||
// ppc64x:-".*RLWINM",-".*RLDICR",".*CLRLSLDI"
|
||||
// ppc64x:-".*RLWINM" -".*RLDICR" ".*CLRLSLDI"
|
||||
f := tab[byte(v)^b]
|
||||
// ppc64x:-".*RLWINM",-".*RLDICR",".*CLRLSLDI"
|
||||
// ppc64x:-".*RLWINM" -".*RLDICR" ".*CLRLSLDI"
|
||||
f += tab[byte(v)&b]
|
||||
// ppc64x:-".*RLWINM",-".*RLDICR",".*CLRLSLDI"
|
||||
// ppc64x:-".*RLWINM" -".*RLDICR" ".*CLRLSLDI"
|
||||
f += tab[byte(v)|b]
|
||||
// ppc64x:-".*RLWINM",-".*RLDICR",".*CLRLSLDI"
|
||||
// ppc64x:-".*RLWINM" -".*RLDICR" ".*CLRLSLDI"
|
||||
f += tab[uint16(v)&h]
|
||||
// ppc64x:-".*RLWINM",-".*RLDICR",".*CLRLSLDI"
|
||||
// ppc64x:-".*RLWINM" -".*RLDICR" ".*CLRLSLDI"
|
||||
f += tab[uint16(v)^h]
|
||||
// ppc64x:-".*RLWINM",-".*RLDICR",".*CLRLSLDI"
|
||||
// ppc64x:-".*RLWINM" -".*RLDICR" ".*CLRLSLDI"
|
||||
f += tab[uint16(v)|h]
|
||||
// ppc64x:-".*AND",-"RLDICR",".*CLRLSLDI"
|
||||
// ppc64x:-".*AND" -"RLDICR" ".*CLRLSLDI"
|
||||
f += tab[v&0xff]
|
||||
// ppc64x:-".*AND",".*CLRLSLWI"
|
||||
// ppc64x:-".*AND" ".*CLRLSLWI"
|
||||
f += 2 * uint32(uint16(d))
|
||||
// ppc64x:-".*AND",-"RLDICR",".*CLRLSLDI"
|
||||
// ppc64x:-".*AND" -"RLDICR" ".*CLRLSLDI"
|
||||
g := 2 * uint64(uint32(d))
|
||||
return f, g
|
||||
}
|
||||
|
||||
func checkCombinedShifts(v8 uint8, v16 uint16, v32 uint32, x32 int32, v64 uint64) (uint8, uint16, uint32, uint64, int64) {
|
||||
|
||||
// ppc64x:-"AND","CLRLSLWI"
|
||||
// ppc64x:-"AND" "CLRLSLWI"
|
||||
f := (v8 & 0xF) << 2
|
||||
// ppc64x:"CLRLSLWI"
|
||||
f += byte(v16) << 3
|
||||
// ppc64x:-"AND","CLRLSLWI"
|
||||
// ppc64x:-"AND" "CLRLSLWI"
|
||||
g := (v16 & 0xFF) << 3
|
||||
// ppc64x:-"AND","CLRLSLWI"
|
||||
// ppc64x:-"AND" "CLRLSLWI"
|
||||
h := (v32 & 0xFFFFF) << 2
|
||||
// ppc64x:"CLRLSLDI"
|
||||
i := (v64 & 0xFFFFFFFF) << 5
|
||||
|
|
@ -466,7 +466,7 @@ func checkCombinedShifts(v8 uint8, v16 uint16, v32 uint32, x32 int32, v64 uint64
|
|||
i += (v64 & 0xFFFFFFF) << 38
|
||||
// ppc64x/power9:-"CLRLSLDI"
|
||||
i += (v64 & 0xFFFF00) << 10
|
||||
// ppc64x/power9:-"SLD","EXTSWSLI"
|
||||
// ppc64x/power9:-"SLD" "EXTSWSLI"
|
||||
j := int64(x32+32) * 8
|
||||
return f, g, h, i, j
|
||||
}
|
||||
|
|
@ -497,71 +497,71 @@ func checkWidenAfterShift(v int64, u uint64) (int64, uint64) {
|
|||
func checkShiftAndMask32(v []uint32) {
|
||||
i := 0
|
||||
|
||||
// ppc64x: "RLWNM\t[$]24, R[0-9]+, [$]12, [$]19, R[0-9]+"
|
||||
// ppc64x: "RLWNM [$]24, R[0-9]+, [$]12, [$]19, R[0-9]+"
|
||||
v[i] = (v[i] & 0xFF00000) >> 8
|
||||
i++
|
||||
// ppc64x: "RLWNM\t[$]26, R[0-9]+, [$]22, [$]29, R[0-9]+"
|
||||
// ppc64x: "RLWNM [$]26, R[0-9]+, [$]22, [$]29, R[0-9]+"
|
||||
v[i] = (v[i] & 0xFF00) >> 6
|
||||
i++
|
||||
// ppc64x: "MOVW\tR0"
|
||||
// ppc64x: "MOVW R0"
|
||||
v[i] = (v[i] & 0xFF) >> 8
|
||||
i++
|
||||
// ppc64x: "MOVW\tR0"
|
||||
// ppc64x: "MOVW R0"
|
||||
v[i] = (v[i] & 0xF000000) >> 28
|
||||
i++
|
||||
// ppc64x: "RLWNM\t[$]26, R[0-9]+, [$]24, [$]31, R[0-9]+"
|
||||
// ppc64x: "RLWNM [$]26, R[0-9]+, [$]24, [$]31, R[0-9]+"
|
||||
v[i] = (v[i] >> 6) & 0xFF
|
||||
i++
|
||||
// ppc64x: "RLWNM\t[$]26, R[0-9]+, [$]12, [$]19, R[0-9]+"
|
||||
// ppc64x: "RLWNM [$]26, R[0-9]+, [$]12, [$]19, R[0-9]+"
|
||||
v[i] = (v[i] >> 6) & 0xFF000
|
||||
i++
|
||||
// ppc64x: "MOVW\tR0"
|
||||
// ppc64x: "MOVW R0"
|
||||
v[i] = (v[i] >> 20) & 0xFF000
|
||||
i++
|
||||
// ppc64x: "MOVW\tR0"
|
||||
// ppc64x: "MOVW R0"
|
||||
v[i] = (v[i] >> 24) & 0xFF00
|
||||
i++
|
||||
}
|
||||
|
||||
func checkMergedShifts32(a [256]uint32, b [256]uint64, u uint32, v uint32) {
|
||||
// ppc64x: -"CLRLSLDI", "RLWNM\t[$]10, R[0-9]+, [$]22, [$]29, R[0-9]+"
|
||||
// ppc64x: -"CLRLSLDI", "RLWNM [$]10, R[0-9]+, [$]22, [$]29, R[0-9]+"
|
||||
a[0] = a[uint8(v>>24)]
|
||||
// ppc64x: -"CLRLSLDI", "RLWNM\t[$]11, R[0-9]+, [$]21, [$]28, R[0-9]+"
|
||||
// ppc64x: -"CLRLSLDI", "RLWNM [$]11, R[0-9]+, [$]21, [$]28, R[0-9]+"
|
||||
b[0] = b[uint8(v>>24)]
|
||||
// ppc64x: -"CLRLSLDI", "RLWNM\t[$]15, R[0-9]+, [$]21, [$]28, R[0-9]+"
|
||||
// ppc64x: -"CLRLSLDI", "RLWNM [$]15, R[0-9]+, [$]21, [$]28, R[0-9]+"
|
||||
b[1] = b[(v>>20)&0xFF]
|
||||
// ppc64x: -"SLD", "RLWNM\t[$]10, R[0-9]+, [$]22, [$]28, R[0-9]+"
|
||||
// ppc64x: -"SLD", "RLWNM [$]10, R[0-9]+, [$]22, [$]28, R[0-9]+"
|
||||
b[2] = b[v>>25]
|
||||
}
|
||||
|
||||
func checkMergedShifts64(a [256]uint32, b [256]uint64, c [256]byte, v uint64) {
|
||||
// ppc64x: -"CLRLSLDI", "RLWNM\t[$]10, R[0-9]+, [$]22, [$]29, R[0-9]+"
|
||||
// ppc64x: -"CLRLSLDI", "RLWNM [$]10, R[0-9]+, [$]22, [$]29, R[0-9]+"
|
||||
a[0] = a[uint8(v>>24)]
|
||||
// ppc64x: "SRD", "CLRLSLDI", -"RLWNM"
|
||||
a[1] = a[uint8(v>>25)]
|
||||
// ppc64x: -"CLRLSLDI", "RLWNM\t[$]9, R[0-9]+, [$]23, [$]29, R[0-9]+"
|
||||
// ppc64x: -"CLRLSLDI", "RLWNM [$]9, R[0-9]+, [$]23, [$]29, R[0-9]+"
|
||||
a[2] = a[v>>25&0x7F]
|
||||
// ppc64x: -"CLRLSLDI", "RLWNM\t[$]3, R[0-9]+, [$]29, [$]29, R[0-9]+"
|
||||
// ppc64x: -"CLRLSLDI", "RLWNM [$]3, R[0-9]+, [$]29, [$]29, R[0-9]+"
|
||||
a[3] = a[(v>>31)&0x01]
|
||||
// ppc64x: -"CLRLSLDI", "RLWNM\t[$]12, R[0-9]+, [$]21, [$]28, R[0-9]+"
|
||||
// ppc64x: -"CLRLSLDI", "RLWNM [$]12, R[0-9]+, [$]21, [$]28, R[0-9]+"
|
||||
b[0] = b[uint8(v>>23)]
|
||||
// ppc64x: -"CLRLSLDI", "RLWNM\t[$]15, R[0-9]+, [$]21, [$]28, R[0-9]+"
|
||||
// ppc64x: -"CLRLSLDI", "RLWNM [$]15, R[0-9]+, [$]21, [$]28, R[0-9]+"
|
||||
b[1] = b[(v>>20)&0xFF]
|
||||
// ppc64x: "RLWNM", -"SLD"
|
||||
b[2] = b[((uint64((uint32(v) >> 21)) & 0x3f) << 4)]
|
||||
// ppc64x: -"RLWNM"
|
||||
b[3] = (b[3] << 24) & 0xFFFFFF000000
|
||||
// ppc64x: "RLWNM\t[$]24, R[0-9]+, [$]0, [$]7,"
|
||||
// ppc64x: "RLWNM [$]24, R[0-9]+, [$]0, [$]7,"
|
||||
b[4] = (b[4] << 24) & 0xFF000000
|
||||
// ppc64x: "RLWNM\t[$]24, R[0-9]+, [$]0, [$]7,"
|
||||
// ppc64x: "RLWNM [$]24, R[0-9]+, [$]0, [$]7,"
|
||||
b[5] = (b[5] << 24) & 0xFF00000F
|
||||
// ppc64x: -"RLWNM"
|
||||
b[6] = (b[6] << 0) & 0xFF00000F
|
||||
// ppc64x: "RLWNM\t[$]4, R[0-9]+, [$]28, [$]31,"
|
||||
// ppc64x: "RLWNM [$]4, R[0-9]+, [$]28, [$]31,"
|
||||
b[7] = (b[7] >> 28) & 0xF
|
||||
// ppc64x: "RLWNM\t[$]11, R[0-9]+, [$]10, [$]15"
|
||||
// ppc64x: "RLWNM [$]11, R[0-9]+, [$]10, [$]15"
|
||||
c[0] = c[((v>>5)&0x3F)<<16]
|
||||
// ppc64x: "ANDCC\t[$]8064,"
|
||||
// ppc64x: "ANDCC [$]8064,"
|
||||
c[1] = c[((v>>7)&0x3F)<<7]
|
||||
}
|
||||
|
||||
|
|
@ -572,7 +572,7 @@ func checkShiftMask(a uint32, b uint64, z []uint32, y []uint64) {
|
|||
z[0] = uint32(uint8(a >> 5))
|
||||
// ppc64x: -"MOVBZ", -"SRW", "RLWNM"
|
||||
z[1] = uint32(uint8((a >> 4) & 0x7e))
|
||||
// ppc64x: "RLWNM\t[$]25, R[0-9]+, [$]27, [$]29, R[0-9]+"
|
||||
// ppc64x: "RLWNM [$]25, R[0-9]+, [$]27, [$]29, R[0-9]+"
|
||||
z[2] = uint32(uint8(a>>7)) & 0x1c
|
||||
// ppc64x: -"MOVWZ"
|
||||
y[0] = uint64((a >> 6) & 0x1c)
|
||||
|
|
@ -598,11 +598,11 @@ func check128bitShifts(x, y uint64, bits uint) (uint64, uint64) {
|
|||
}
|
||||
|
||||
func checkShiftToMask(u []uint64, s []int64) {
|
||||
// amd64:-"SHR",-"SHL","ANDQ"
|
||||
// amd64:-"SHR" -"SHL" "ANDQ"
|
||||
u[0] = u[0] >> 5 << 5
|
||||
// amd64:-"SAR",-"SHL","ANDQ"
|
||||
// amd64:-"SAR" -"SHL" "ANDQ"
|
||||
s[0] = s[0] >> 5 << 5
|
||||
// amd64:-"SHR",-"SHL","ANDQ"
|
||||
// amd64:-"SHR" -"SHL" "ANDQ"
|
||||
u[1] = u[1] << 5 >> 5
|
||||
}
|
||||
|
||||
|
|
@ -611,13 +611,13 @@ func checkShiftToMask(u []uint64, s []int64) {
|
|||
//
|
||||
|
||||
func checkLeftShiftWithAddition(a int64, b int64) int64 {
|
||||
// riscv64/rva20u64: "SLLI","ADD"
|
||||
// riscv64/rva20u64: "SLLI" "ADD"
|
||||
// riscv64/rva22u64,riscv64/rva23u64: "SH1ADD"
|
||||
a = a + b<<1
|
||||
// riscv64/rva20u64: "SLLI","ADD"
|
||||
// riscv64/rva20u64: "SLLI" "ADD"
|
||||
// riscv64/rva22u64,riscv64/rva23u64: "SH2ADD"
|
||||
a = a + b<<2
|
||||
// riscv64/rva20u64: "SLLI","ADD"
|
||||
// riscv64/rva20u64: "SLLI" "ADD"
|
||||
// riscv64/rva22u64,riscv64/rva23u64: "SH3ADD"
|
||||
a = a + b<<3
|
||||
return a
|
||||
|
|
@ -631,7 +631,7 @@ func rsh64Uto32U(v uint64) uint32 {
|
|||
x := uint32(v)
|
||||
// riscv64:"MOVWU"
|
||||
if x > 8 {
|
||||
// riscv64:"SRLIW",-"MOVWU",-"SLLI"
|
||||
// riscv64:"SRLIW" -"MOVWU" -"SLLI"
|
||||
x >>= 2
|
||||
}
|
||||
return x
|
||||
|
|
@ -641,7 +641,7 @@ func rsh64Uto16U(v uint64) uint16 {
|
|||
x := uint16(v)
|
||||
// riscv64:"MOVHU"
|
||||
if x > 8 {
|
||||
// riscv64:"SLLI","SRLI"
|
||||
// riscv64:"SLLI" "SRLI"
|
||||
x >>= 2
|
||||
}
|
||||
return x
|
||||
|
|
@ -651,7 +651,7 @@ func rsh64Uto8U(v uint64) uint8 {
|
|||
x := uint8(v)
|
||||
// riscv64:"MOVBU"
|
||||
if x > 8 {
|
||||
// riscv64:"SLLI","SRLI"
|
||||
// riscv64:"SLLI" "SRLI"
|
||||
x >>= 2
|
||||
}
|
||||
return x
|
||||
|
|
@ -661,7 +661,7 @@ func rsh64to32(v int64) int32 {
|
|||
x := int32(v)
|
||||
// riscv64:"MOVW"
|
||||
if x > 8 {
|
||||
// riscv64:"SRAIW",-"MOVW",-"SLLI"
|
||||
// riscv64:"SRAIW" -"MOVW" -"SLLI"
|
||||
x >>= 2
|
||||
}
|
||||
return x
|
||||
|
|
@ -671,7 +671,7 @@ func rsh64to16(v int64) int16 {
|
|||
x := int16(v)
|
||||
// riscv64:"MOVH"
|
||||
if x > 8 {
|
||||
// riscv64:"SLLI","SRAI"
|
||||
// riscv64:"SLLI" "SRAI"
|
||||
x >>= 2
|
||||
}
|
||||
return x
|
||||
|
|
@ -681,7 +681,7 @@ func rsh64to8(v int64) int8 {
|
|||
x := int8(v)
|
||||
// riscv64:"MOVB"
|
||||
if x > 8 {
|
||||
// riscv64:"SLLI","SRAI"
|
||||
// riscv64:"SLLI" "SRAI"
|
||||
x >>= 2
|
||||
}
|
||||
return x
|
||||
|
|
@ -692,6 +692,6 @@ func rsh64to8(v int64) int8 {
|
|||
// (There is still a negative shift test, but
|
||||
// no shift-too-big test.)
|
||||
func signedModShift(i int) int64 {
|
||||
// arm64:-"CMP",-"CSEL"
|
||||
// arm64:-"CMP" -"CSEL"
|
||||
return 1 << (i % 64)
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue