cmd/compile: implement compiler for riscv64

Based on riscv-go port.

Updates #27532

Change-Id: Ia329daa243db63ff334053b8807ea96b97ce3acf
Reviewed-on: https://go-review.googlesource.com/c/go/+/204631
Run-TryBot: Joel Sing <joel@sing.id.au>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Keith Randall <khr@golang.org>
This commit is contained in:
Joel Sing 2019-11-04 04:40:47 +11:00
parent 91d75f4e4c
commit 98d2717499
17 changed files with 8511 additions and 12 deletions

View file

@ -487,8 +487,8 @@ func rewriteMOV(ctxt *obj.Link, newprog obj.ProgAlloc, p *obj.Prog) {
}
}
// invertBranch inverts the condition of a conditional branch.
func invertBranch(i obj.As) obj.As {
// InvertBranch inverts the condition of a conditional branch.
func InvertBranch(i obj.As) obj.As {
switch i {
case ABEQ:
return ABNE
@ -503,7 +503,7 @@ func invertBranch(i obj.As) obj.As {
case ABGEU:
return ABLTU
default:
panic("invertBranch: not a branch")
panic("InvertBranch: not a branch")
}
}
@ -800,7 +800,7 @@ func preprocess(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) {
jmp.To = obj.Addr{Type: obj.TYPE_BRANCH}
jmp.Pcond = p.Pcond
p.As = invertBranch(p.As)
p.As = InvertBranch(p.As)
p.Pcond = jmp.Link
// We may have made previous branches too long,
@ -1005,7 +1005,7 @@ func wantImmU(p *obj.Prog, pos string, a obj.Addr, nbits uint) {
func wantReg(p *obj.Prog, pos string, descr string, r, min, max int16) {
if r < min || r > max {
p.Ctxt.Diag("%v\texpected %s register in %s position but got non-%s register %s", p, descr, pos, descr, regName(int(r)))
p.Ctxt.Diag("%v\texpected %s register in %s position but got non-%s register %s", p, descr, pos, descr, RegName(int(r)))
}
}