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cmd/internal/obj: add Prog.SetFrom3{Reg,Const}
These are the the most common uses, and they reduce line noise. I don't love adding new deprecated APIs, but since they're trivial wrappers, it'll be very easy to update them along with the rest. No functional changes; passes toolstash-check. Change-Id: I691a8175cfef9081180e463c63f326376af3f3a6 Reviewed-on: https://go-review.googlesource.com/c/go/+/296009 Trust: Josh Bleecher Snyder <josharian@gmail.com> Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com> TryBot-Result: Go Bot <gobot@golang.org> Reviewed-by: Keith Randall <khr@golang.org>
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5f15af111c
commit
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8 changed files with 41 additions and 30 deletions
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@ -811,10 +811,7 @@ func (p *Parser) asmInstruction(op obj.As, cond string, a []obj.Addr) {
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} else {
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mask = (^uint32(0) >> uint(mask2+1)) & (^uint32(0) << uint(31-(mask1-1)))
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}
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prog.SetFrom3(obj.Addr{
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Type: obj.TYPE_CONST,
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Offset: int64(mask),
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})
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prog.SetFrom3Const(int64(mask))
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prog.To = a[4]
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break
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}
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@ -201,7 +201,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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p := s.Prog(v.Op.Asm())
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p.From = obj.Addr{Type: obj.TYPE_REG, Reg: v.Args[2].Reg()}
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p.To = obj.Addr{Type: obj.TYPE_REG, Reg: v.Reg()}
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p.SetFrom3(obj.Addr{Type: obj.TYPE_REG, Reg: v.Args[1].Reg()})
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p.SetFrom3Reg(v.Args[1].Reg())
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case ssa.OpAMD64ADDQ, ssa.OpAMD64ADDL:
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r := v.Reg()
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r1 := v.Args[0].Reg()
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@ -588,7 +588,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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p.From.Offset = v.AuxInt
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p.To.Type = obj.TYPE_REG
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p.To.Reg = r
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p.SetFrom3(obj.Addr{Type: obj.TYPE_REG, Reg: v.Args[0].Reg()})
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p.SetFrom3Reg(v.Args[0].Reg())
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case ssa.OpAMD64SUBQconst, ssa.OpAMD64SUBLconst,
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ssa.OpAMD64ANDQconst, ssa.OpAMD64ANDLconst,
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@ -1073,7 +1073,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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}
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p.From.Offset = val
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p.From.Type = obj.TYPE_CONST
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p.SetFrom3(obj.Addr{Type: obj.TYPE_REG, Reg: v.Args[0].Reg()})
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p.SetFrom3Reg(v.Args[0].Reg())
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p.To.Type = obj.TYPE_REG
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p.To.Reg = v.Reg()
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case ssa.OpAMD64POPCNTQ, ssa.OpAMD64POPCNTL:
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@ -279,7 +279,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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p := s.Prog(v.Op.Asm())
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p.From.Type = obj.TYPE_CONST
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p.From.Offset = v.AuxInt >> 8
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p.SetFrom3(obj.Addr{Type: obj.TYPE_CONST, Offset: v.AuxInt & 0xff})
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p.SetFrom3Const(v.AuxInt & 0xff)
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p.Reg = v.Args[0].Reg()
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p.To.Type = obj.TYPE_REG
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p.To.Reg = v.Reg()
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@ -299,7 +299,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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p := s.Prog(arm.ABFC)
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p.From.Type = obj.TYPE_CONST
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p.From.Offset = int64(width)
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p.SetFrom3(obj.Addr{Type: obj.TYPE_CONST, Offset: int64(lsb)})
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p.SetFrom3Const(int64(lsb))
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p.To.Type = obj.TYPE_REG
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p.To.Reg = v.Reg()
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break
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@ -229,7 +229,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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p.Reg = ra
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p.From.Type = obj.TYPE_REG
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p.From.Reg = rm
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p.SetFrom3(obj.Addr{Type: obj.TYPE_REG, Reg: rn})
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p.SetFrom3Reg(rn)
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p.To.Type = obj.TYPE_REG
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p.To.Reg = rt
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case ssa.OpARM64ADDconst,
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@ -292,7 +292,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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p := s.Prog(v.Op.Asm())
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p.From.Type = obj.TYPE_CONST
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p.From.Offset = v.AuxInt
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p.SetFrom3(obj.Addr{Type: obj.TYPE_REG, Reg: v.Args[0].Reg()})
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p.SetFrom3Reg(v.Args[0].Reg())
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p.Reg = v.Args[1].Reg()
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p.To.Type = obj.TYPE_REG
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p.To.Reg = v.Reg()
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@ -522,7 +522,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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p := s.Prog(v.Op.Asm())
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p.From.Type = obj.TYPE_CONST
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p.From.Offset = v.AuxInt >> 8
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p.SetFrom3(obj.Addr{Type: obj.TYPE_CONST, Offset: v.AuxInt & 0xff})
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p.SetFrom3Const(v.AuxInt & 0xff)
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p.Reg = v.Args[1].Reg()
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p.To.Type = obj.TYPE_REG
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p.To.Reg = v.Reg()
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@ -533,7 +533,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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p := s.Prog(v.Op.Asm())
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p.From.Type = obj.TYPE_CONST
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p.From.Offset = v.AuxInt >> 8
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p.SetFrom3(obj.Addr{Type: obj.TYPE_CONST, Offset: v.AuxInt & 0xff})
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p.SetFrom3Const(v.AuxInt & 0xff)
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p.Reg = v.Args[0].Reg()
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p.To.Type = obj.TYPE_REG
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p.To.Reg = v.Reg()
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@ -952,7 +952,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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p.From.Type = obj.TYPE_REG // assembler encodes conditional bits in Reg
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p.From.Reg = condBits[ssa.Op(v.AuxInt)]
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p.Reg = v.Args[0].Reg()
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p.SetFrom3(obj.Addr{Type: obj.TYPE_REG, Reg: r1})
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p.SetFrom3Reg(r1)
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p.To.Type = obj.TYPE_REG
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p.To.Reg = v.Reg()
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case ssa.OpARM64DUFFZERO:
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@ -419,7 +419,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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// If it is a Compare-and-Swap-Release operation, set the EH field with
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// the release hint.
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if v.AuxInt == 0 {
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p.SetFrom3(obj.Addr{Type: obj.TYPE_CONST, Offset: 0})
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p.SetFrom3Const(0)
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}
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// CMP reg1,reg2
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p1 := s.Prog(cmp)
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@ -586,7 +586,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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p := s.Prog(v.Op.Asm())
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// clrlslwi ra,rs,mb,sh will become rlwinm ra,rs,sh,mb-sh,31-sh as described in ISA
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p.From = obj.Addr{Type: obj.TYPE_CONST, Offset: ssa.GetPPC64Shiftmb(shifts)}
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p.SetFrom3(obj.Addr{Type: obj.TYPE_CONST, Offset: ssa.GetPPC64Shiftsh(shifts)})
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p.SetFrom3Const(ssa.GetPPC64Shiftsh(shifts))
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p.Reg = r1
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p.To.Type = obj.TYPE_REG
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p.To.Reg = r
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@ -598,7 +598,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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p := s.Prog(v.Op.Asm())
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// clrlsldi ra,rs,mb,sh will become rldic ra,rs,sh,mb-sh
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p.From = obj.Addr{Type: obj.TYPE_CONST, Offset: ssa.GetPPC64Shiftmb(shifts)}
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p.SetFrom3(obj.Addr{Type: obj.TYPE_CONST, Offset: ssa.GetPPC64Shiftsh(shifts)})
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p.SetFrom3Const(ssa.GetPPC64Shiftsh(shifts))
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p.Reg = r1
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p.To.Type = obj.TYPE_REG
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p.To.Reg = r
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@ -610,7 +610,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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shifts := v.AuxInt
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p := s.Prog(v.Op.Asm())
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p.From = obj.Addr{Type: obj.TYPE_CONST, Offset: ssa.GetPPC64Shiftsh(shifts)}
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p.SetFrom3(obj.Addr{Type: obj.TYPE_CONST, Offset: ssa.GetPPC64Shiftmb(shifts)})
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p.SetFrom3Const(ssa.GetPPC64Shiftmb(shifts))
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p.Reg = r1
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p.To.Type = obj.TYPE_REG
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p.To.Reg = r
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@ -658,7 +658,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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p.To = obj.Addr{Type: obj.TYPE_REG, Reg: v.Reg()}
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p.Reg = v.Args[0].Reg()
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p.From = obj.Addr{Type: obj.TYPE_CONST, Offset: int64(rot)}
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p.SetFrom3(obj.Addr{Type: obj.TYPE_CONST, Offset: int64(mask)})
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p.SetFrom3Const(int64(mask))
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// Auxint holds mask
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case ssa.OpPPC64RLWNM:
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@ -667,7 +667,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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p.To = obj.Addr{Type: obj.TYPE_REG, Reg: v.Reg()}
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p.Reg = v.Args[0].Reg()
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p.From = obj.Addr{Type: obj.TYPE_REG, Reg: v.Args[1].Reg()}
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p.SetFrom3(obj.Addr{Type: obj.TYPE_CONST, Offset: int64(mask)})
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p.SetFrom3Const(int64(mask))
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case ssa.OpPPC64MADDLD:
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r := v.Reg()
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@ -679,7 +679,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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p.From.Type = obj.TYPE_REG
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p.From.Reg = r1
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p.Reg = r2
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p.SetFrom3(obj.Addr{Type: obj.TYPE_REG, Reg: r3})
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p.SetFrom3Reg(r3)
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p.To.Type = obj.TYPE_REG
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p.To.Reg = r
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@ -693,7 +693,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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p.From.Type = obj.TYPE_REG
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p.From.Reg = r1
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p.Reg = r3
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p.SetFrom3(obj.Addr{Type: obj.TYPE_REG, Reg: r2})
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p.SetFrom3Reg(r2)
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p.To.Type = obj.TYPE_REG
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p.To.Reg = r
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@ -720,7 +720,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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case ssa.OpPPC64SUBFCconst:
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p := s.Prog(v.Op.Asm())
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p.SetFrom3(obj.Addr{Type: obj.TYPE_CONST, Offset: v.AuxInt})
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p.SetFrom3Const(v.AuxInt)
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p.From.Type = obj.TYPE_REG
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p.From.Reg = v.Args[0].Reg()
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p.To.Type = obj.TYPE_REG
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@ -910,7 +910,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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// AuxInt values 4,5,6 implemented with reverse operand order from 0,1,2
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if v.AuxInt > 3 {
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p.Reg = r.Reg
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p.SetFrom3(obj.Addr{Type: obj.TYPE_REG, Reg: v.Args[0].Reg()})
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p.SetFrom3Reg(v.Args[0].Reg())
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} else {
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p.Reg = v.Args[0].Reg()
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p.SetFrom3(r)
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@ -1784,7 +1784,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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pp.To.Reg = ppc64.REG_LR
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// Insert a hint this is not a subroutine return.
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pp.SetFrom3(obj.Addr{Type: obj.TYPE_CONST, Offset: 1})
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pp.SetFrom3Const(1)
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if base.Ctxt.Flag_shared {
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// When compiling Go into PIC, the function we just
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@ -894,7 +894,7 @@ func ssaGenBlock(s *ssagen.State, b, next *ssa.Block) {
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p.From.Type = obj.TYPE_CONST
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p.From.Offset = int64(s390x.NotEqual & s390x.NotUnordered) // unordered is not possible
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p.Reg = s390x.REG_R3
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p.SetFrom3(obj.Addr{Type: obj.TYPE_CONST, Offset: 0})
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p.SetFrom3Const(0)
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if b.Succs[0].Block() != next {
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s.Br(s390x.ABR, b.Succs[0].Block())
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}
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@ -937,17 +937,17 @@ func ssaGenBlock(s *ssagen.State, b, next *ssa.Block) {
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p.From.Type = obj.TYPE_CONST
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p.From.Offset = int64(mask & s390x.NotUnordered) // unordered is not possible
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p.Reg = b.Controls[0].Reg()
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p.SetFrom3(obj.Addr{Type: obj.TYPE_REG, Reg: b.Controls[1].Reg()})
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p.SetFrom3Reg(b.Controls[1].Reg())
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case ssa.BlockS390XCGIJ, ssa.BlockS390XCIJ:
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p.From.Type = obj.TYPE_CONST
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p.From.Offset = int64(mask & s390x.NotUnordered) // unordered is not possible
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p.Reg = b.Controls[0].Reg()
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p.SetFrom3(obj.Addr{Type: obj.TYPE_CONST, Offset: int64(int8(b.AuxInt))})
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p.SetFrom3Const(int64(int8(b.AuxInt)))
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case ssa.BlockS390XCLGIJ, ssa.BlockS390XCLIJ:
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p.From.Type = obj.TYPE_CONST
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p.From.Offset = int64(mask & s390x.NotUnordered) // unordered is not possible
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p.Reg = b.Controls[0].Reg()
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p.SetFrom3(obj.Addr{Type: obj.TYPE_CONST, Offset: int64(uint8(b.AuxInt))})
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p.SetFrom3Const(int64(uint8(b.AuxInt)))
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default:
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b.Fatalf("branch not implemented: %s", b.LongString())
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}
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@ -342,7 +342,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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p.From.Offset = v.AuxInt
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p.To.Type = obj.TYPE_REG
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p.To.Reg = r
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p.SetFrom3(obj.Addr{Type: obj.TYPE_REG, Reg: v.Args[0].Reg()})
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p.SetFrom3Reg(v.Args[0].Reg())
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case ssa.Op386SUBLconst,
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ssa.Op386ADCLconst,
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@ -360,6 +360,20 @@ func (p *Prog) SetFrom3(a Addr) {
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p.RestArgs = []AddrPos{{a, Source}}
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}
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// SetFrom3Reg calls p.SetFrom3 with a register Addr containing reg.
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//
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// Deprecated: for the same reasons as Prog.GetFrom3.
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func (p *Prog) SetFrom3Reg(reg int16) {
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p.SetFrom3(Addr{Type: TYPE_REG, Reg: reg})
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}
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// SetFrom3Const calls p.SetFrom3 with a const Addr containing x.
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//
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// Deprecated: for the same reasons as Prog.GetFrom3.
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func (p *Prog) SetFrom3Const(off int64) {
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p.SetFrom3(Addr{Type: TYPE_CONST, Offset: off})
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}
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// SetTo2 assigns []Args{{a, 1}} to p.RestArgs when the second destination
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// operand does not fit into prog.RegTo2.
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func (p *Prog) SetTo2(a Addr) {
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