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cmd/internal/obj/loong64: add {V,XV}MUL{B/H/W/V} and {V,XV}MUH{B/H/W/V}[U] instructions support

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Go asm syntax:
	 VMUL{B/H/W/V}		VK, VJ, VD
	 VMUH{B/H/W/V}[U]	VK, VJ, VD
	XVMUL{B/H/W/V}		XK, XJ, XD
	XVMUH{B/H/W/V}[U]	XK, XJ, XD

Equivalent platform assembler syntax:
	 vmul.{b/h/w/d}		vd, vj, vk
	 vmuh.{b/h/w/d}[u]	vd, vj, vk
	xvmul.{b/h/w/d}		xd, xj, xk
	xvmuh.{b/h/w/d}[u]	xd, xj, xk

Change-Id: I2f15a5b4b6303a0f82cb85114477f58e1b5fd950
Reviewed-on: https://go-review.googlesource.com/c/go/+/636375
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Auto-Submit: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: David Chase <drchase@google.com>
Reviewed-by: Junyang Shao <shaojunyang@google.com>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
This commit is contained in:
Xiaolin Zhao 2024-12-16 09:51:29 +08:00 • committed by Gopher Robot
parent 6c70f2b960
commit b0e2f185c5
4 changed files with 148 additions and 0 deletions
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26
src/cmd/asm/internal/asm/testdata/loong64enc1.s vendored
View file

@ -775,3 +775,29 @@ lable2:
XVILVHH X3, X2, X1 // 418c1c75
XVILVHW X3, X2, X1 // 410c1d75
XVILVHV X3, X2, X1 // 418c1d75
// [X]VMUL{B/H/W/V} and [X]VMUH{B/H/W/V}[U] instructions
VMULB V1, V2, V3 // 43048470
VMULH V1, V2, V3 // 43848470
VMULW V1, V2, V3 // 43048570
VMULV V1, V2, V3 // 43848570
VMUHB V1, V2, V3 // 43048670
VMUHH V1, V2, V3 // 43848670
VMUHW V1, V2, V3 // 43048770
VMUHV V1, V2, V3 // 43848770
VMUHBU V1, V2, V3 // 43048870
VMUHHU V1, V2, V3 // 43848870
VMUHWU V1, V2, V3 // 43048970
VMUHVU V1, V2, V3 // 43848970
XVMULB X3, X2, X1 // 410c8474
XVMULH X3, X2, X1 // 418c8474
XVMULW X3, X2, X1 // 410c8574
XVMULV X3, X2, X1 // 418c8574
XVMUHB X3, X2, X1 // 410c8674
XVMUHH X3, X2, X1 // 418c8674
XVMUHW X3, X2, X1 // 410c8774
XVMUHV X3, X2, X1 // 418c8774
XVMUHBU X3, X2, X1 // 410c8874
XVMUHHU X3, X2, X1 // 418c8874
XVMUHWU X3, X2, X1 // 410c8974
XVMUHVU X3, X2, X1 // 418c8974

26
src/cmd/internal/obj/loong64/a.out.go
View file

@ -876,6 +876,32 @@ const (
AXVILVHW
AXVILVHV
// LSX and LASX integer mul instructions
AVMULB
AVMULH
AVMULW
AVMULV
AVMUHB
AVMUHH
AVMUHW
AVMUHV
AVMUHBU
AVMUHHU
AVMUHWU
AVMUHVU
AXVMULB
AXVMULH
AXVMULW
AXVMULV
AXVMUHB
AXVMUHH
AXVMUHW
AXVMUHV
AXVMUHBU
AXVMUHHU
AXVMUHWU
AXVMUHVU
ALAST
// aliases

24
src/cmd/internal/obj/loong64/anames.go
View file

@ -381,5 +381,29 @@ var Anames = []string{
"XVILVHH",
"XVILVHW",
"XVILVHV",
"VMULB",
"VMULH",
"VMULW",
"VMULV",
"VMUHB",
"VMUHH",
"VMUHW",
"VMUHV",
"VMUHBU",
"VMUHHU",
"VMUHWU",
"VMUHVU",
"XVMULB",
"XVMULH",
"XVMULW",
"XVMULV",
"XVMUHB",
"XVMUHH",
"XVMUHW",
"XVMUHV",
"XVMUHBU",
"XVMUHHU",
"XVMUHWU",
"XVMUHVU",
"LAST",
}

72
src/cmd/internal/obj/loong64/asm.go
View file

@ -1555,6 +1555,18 @@ func buildop(ctxt *obj.Link) {
opset(AVILVHH, r0)
opset(AVILVHW, r0)
opset(AVILVHV, r0)
opset(AVMULB, r0)
opset(AVMULH, r0)
opset(AVMULW, r0)
opset(AVMULV, r0)
opset(AVMUHB, r0)
opset(AVMUHH, r0)
opset(AVMUHW, r0)
opset(AVMUHV, r0)
opset(AVMUHBU, r0)
opset(AVMUHHU, r0)
opset(AVMUHWU, r0)
opset(AVMUHVU, r0)
case AXVSEQB:
opset(AXVSEQH, r0)
@ -1568,6 +1580,18 @@ func buildop(ctxt *obj.Link) {
opset(AXVILVHH, r0)
opset(AXVILVHW, r0)
opset(AXVILVHV, r0)
opset(AXVMULB, r0)
opset(AXVMULH, r0)
opset(AXVMULW, r0)
opset(AXVMULV, r0)
opset(AXVMUHB, r0)
opset(AXVMUHH, r0)
opset(AXVMUHW, r0)
opset(AXVMUHV, r0)
opset(AXVMUHBU, r0)
opset(AXVMUHHU, r0)
opset(AXVMUHWU, r0)
opset(AXVMUHVU, r0)
case AVANDB:
opset(AVORB, r0)
@ -2986,6 +3010,54 @@ func (c *ctxt0) oprrr(a obj.As) uint32 {
return 0xea3a << 15 // xvilvh.w
case AXVILVHV:
return 0xea3b << 15 // xvilvh.d
case AVMULB:
return 0xe108 << 15 // vmul.b
case AVMULH:
return 0xe109 << 15 // vmul.h
case AVMULW:
return 0xe10a << 15 // vmul.w
case AVMULV:
return 0xe10b << 15 // vmul.d
case AVMUHB:
return 0xe10c << 15 // vmuh.b
case AVMUHH:
return 0xe10d << 15 // vmuh.h
case AVMUHW:
return 0xe10e << 15 // vmuh.w
case AVMUHV:
return 0xe10f << 15 // vmuh.d
case AVMUHBU:
return 0xe110 << 15 // vmuh.bu
case AVMUHHU:
return 0xe111 << 15 // vmuh.hu
case AVMUHWU:
return 0xe112 << 15 // vmuh.wu
case AVMUHVU:
return 0xe113 << 15 // vmuh.du
case AXVMULB:
return 0xe908 << 15 // xvmul.b
case AXVMULH:
return 0xe909 << 15 // xvmul.h
case AXVMULW:
return 0xe90a << 15 // xvmul.w
case AXVMULV:
return 0xe90b << 15 // xvmul.d
case AXVMUHB:
return 0xe90c << 15 // xvmuh.b
case AXVMUHH:
return 0xe90d << 15 // xvmuh.h
case AXVMUHW:
return 0xe90e << 15 // xvmuh.w
case AXVMUHV:
return 0xe90f << 15 // xvmuh.d
case AXVMUHBU:
return 0xe910 << 15 // xvmuh.bu
case AXVMUHHU:
return 0xe911 << 15 // xvmuh.hu
case AXVMUHWU:
return 0xe912 << 15 // xvmuh.wu
case AXVMUHVU:
return 0xe913 << 15 // xvmuh.du
}
if a < 0 {