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cmd/internal/obj/mips: add support of LLV, SCV, NOOP instructions
LLV and SCV are 64-bit load-linked and store-conditional. They were used in runtime as #define WORD. Change them to normal instruction form. NOOP is hardware no-op. It was written as WORD $0. Make a name for it for better disassembly output. Fixes #12561. Fixes #18238. Change-Id: I82c667ce756fa83ef37b034b641e8c4366335e83 Reviewed-on: https://go-review.googlesource.com/40297 Reviewed-by: Minux Ma <minux@golang.org> Run-TryBot: Minux Ma <minux@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
This commit is contained in:
parent
84a51432a8
commit
b53acd89db
7 changed files with 61 additions and 56 deletions
22
src/cmd/asm/internal/asm/testdata/mips64.s
vendored
22
src/cmd/asm/internal/asm/testdata/mips64.s
vendored
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@ -39,6 +39,9 @@ TEXT foo(SB),DUPOK|NOSPLIT,$0
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MOVV 16(R1), R2
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MOVV (R1), R2
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LL (R1), R2 // c0220000
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LLV (R1), R2 // d0220000
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// LMOVB rreg ',' rreg
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// {
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// outcode(int($1), &$2, 0, &$4);
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@ -98,6 +101,9 @@ TEXT foo(SB),DUPOK|NOSPLIT,$0
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MOVV R1, 16(R2)
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MOVV R1, (R2)
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SC R1, (R2) // e0410000
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SCV R1, (R2) // f0410000
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// LMOVB rreg ',' addr
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// {
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// outcode(int($1), &$2, 0, &$4);
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@ -238,11 +244,11 @@ TEXT foo(SB),DUPOK|NOSPLIT,$0
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label0:
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JMP 1(PC)
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BEQ R1, 2(PC)
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JMP label0+0 // JMP 64
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JMP label0+0 // JMP 68
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BEQ R1, 2(PC)
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JAL 1(PC) // CALL 1(PC)
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BEQ R1, 2(PC)
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JAL label0+0 // CALL 64
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JAL label0+0 // CALL 68
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// LBRA addr
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// {
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@ -266,7 +272,7 @@ label0:
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// }
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label1:
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BEQ R1, 1(PC)
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BEQ R1, label1 // BEQ R1, 79
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BEQ R1, label1 // BEQ R1, 83
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// LBRA rreg ',' sreg ',' rel
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// {
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@ -274,7 +280,7 @@ label1:
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// }
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label2:
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BEQ R1, R2, 1(PC)
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BEQ R1, R2, label2 // BEQ R1, R2, 81
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BEQ R1, R2, label2 // BEQ R1, R2, 85
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//
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// other integer conditional branch
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@ -285,7 +291,7 @@ label2:
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// }
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label3:
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BLTZ R1, 1(PC)
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BLTZ R1, label3 // BLTZ R1, 83
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BLTZ R1, label3 // BLTZ R1, 87
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//
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// floating point conditional branch
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@ -293,7 +299,7 @@ label3:
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// LBRA rel
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label4:
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BFPT 1(PC)
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BFPT label4 // BFPT 85
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BFPT label4 // BFPT 89
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//
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@ -327,7 +333,9 @@ label4:
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//
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// WORD
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//
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WORD $1
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WORD $1 // 00000001
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NOOP // 00000000
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SYNC // 0000000f
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//
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// NOP
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@ -299,6 +299,7 @@ const (
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ADIVW
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AGOK
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ALL
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ALLV
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ALUI
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AMOVB
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AMOVBU
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@ -323,12 +324,14 @@ const (
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ANEGD
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ANEGF
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ANEGW
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ANOOP // hardware nop
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ANOR
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AOR
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AREM
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AREMU
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ARFE
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ASC
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ASCV
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ASGT
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ASGTU
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ASLL
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@ -45,6 +45,7 @@ var Anames = []string{
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"DIVW",
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"GOK",
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"LL",
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"LLV",
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"LUI",
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"MOVB",
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"MOVBU",
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@ -69,12 +70,14 @@ var Anames = []string{
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"NEGD",
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"NEGF",
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"NEGW",
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"NOOP",
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"NOR",
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"OR",
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"REM",
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"REMU",
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"RFE",
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"SC",
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"SCV",
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"SGT",
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"SGTU",
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"SLL",
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@ -129,6 +129,7 @@ var optab = []Optab{
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{AMOVWL, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO, 0},
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{AMOVVL, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO, sys.MIPS64},
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{ASC, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO, 0},
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{ASCV, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO, sys.MIPS64},
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{AMOVW, C_SEXT, C_NONE, C_REG, 8, 4, REGSB, sys.MIPS64},
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{AMOVWU, C_SEXT, C_NONE, C_REG, 8, 4, REGSB, sys.MIPS64},
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@ -152,6 +153,7 @@ var optab = []Optab{
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{AMOVWL, C_SOREG, C_NONE, C_REG, 8, 4, REGZERO, 0},
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{AMOVVL, C_SOREG, C_NONE, C_REG, 8, 4, REGZERO, sys.MIPS64},
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{ALL, C_SOREG, C_NONE, C_REG, 8, 4, REGZERO, 0},
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{ALLV, C_SOREG, C_NONE, C_REG, 8, 4, REGZERO, sys.MIPS64},
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{AMOVW, C_REG, C_NONE, C_LEXT, 35, 12, REGSB, sys.MIPS64},
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{AMOVWU, C_REG, C_NONE, C_LEXT, 35, 12, REGSB, sys.MIPS64},
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@ -963,6 +965,7 @@ func buildop(ctxt *obj.Link) {
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case ASYSCALL:
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opset(ASYNC, r0)
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opset(ANOOP, r0)
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opset(ATLBP, r0)
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opset(ATLBR, r0)
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opset(ATLBWI, r0)
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@ -994,7 +997,9 @@ func buildop(ctxt *obj.Link) {
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AJMP,
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AMOVWU,
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ALL,
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ALLV,
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ASC,
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ASCV,
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AWORD,
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obj.ANOP,
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obj.ATEXT,
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@ -1741,6 +1746,8 @@ func (c *ctxt0) oprrr(a obj.As) uint32 {
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case ASYNC:
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return OP(1, 7)
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case ANOOP:
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return 0
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case ACMOVN:
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return OP(1, 3)
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@ -1913,8 +1920,12 @@ func (c *ctxt0) opirr(a obj.As) uint32 {
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return OP(6, 6)
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case -ALL:
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return SP(6, 0)
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case -ALLV:
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return SP(6, 4)
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case ASC:
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return SP(7, 0)
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case ASCV:
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return SP(7, 4)
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}
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if a < 0 {
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@ -786,16 +786,8 @@ func (c *ctxt0) stacksplit(p *obj.Prog, framesize int32) *obj.Prog {
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func (c *ctxt0) addnop(p *obj.Prog) {
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q := c.newprog()
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// we want to use the canonical NOP (SLL $0,R0,R0) here,
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// however, as the assembler will always replace $0
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// as R0, we have to resort to manually encode the SLL
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// instruction as WORD $0.
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q.As = AWORD
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q.As = ANOOP
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q.Pos = p.Pos
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q.From.Type = obj.TYPE_CONST
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q.From.Name = obj.NAME_NONE
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q.From.Offset = 0
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q.Link = p.Link
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p.Link = q
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}
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@ -6,12 +6,6 @@
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#include "textflag.h"
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#define LL(base, rt) WORD $((060<<26)|((base)<<21)|((rt)<<16))
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#define LLV(base, rt) WORD $((064<<26)|((base)<<21)|((rt)<<16))
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#define SC(base, rt) WORD $((070<<26)|((base)<<21)|((rt)<<16))
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#define SCV(base, rt) WORD $((074<<26)|((base)<<21)|((rt)<<16))
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#define SYNC WORD $0xf
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// bool cas(uint32 *ptr, uint32 old, uint32 new)
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// Atomically:
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// if(*val == old){
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@ -26,9 +20,9 @@ TEXT ·Cas(SB), NOSPLIT, $0-17
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SYNC
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cas_again:
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MOVV R5, R3
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LL(1, 4) // R4 = *R1
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LL (R1), R4
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BNE R2, R4, cas_fail
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SC(1, 3) // *R1 = R3
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SC R3, (R1)
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BEQ R3, cas_again
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MOVV $1, R1
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MOVB R1, ret+16(FP)
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@ -53,9 +47,9 @@ TEXT ·Cas64(SB), NOSPLIT, $0-25
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SYNC
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cas64_again:
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MOVV R5, R3
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LLV(1, 4) // R4 = *R1
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LLV (R1), R4
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BNE R2, R4, cas64_fail
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SCV(1, 3) // *R1 = R3
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SCV R3, (R1)
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BEQ R3, cas64_again
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MOVV $1, R1
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MOVB R1, ret+24(FP)
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@ -104,10 +98,10 @@ TEXT ·Xadd(SB), NOSPLIT, $0-20
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MOVV ptr+0(FP), R2
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MOVW delta+8(FP), R3
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SYNC
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LL(2, 1) // R1 = *R2
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LL (R2), R1
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ADDU R1, R3, R4
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MOVV R4, R1
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SC(2, 4) // *R2 = R4
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SC R4, (R2)
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BEQ R4, -4(PC)
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MOVW R1, ret+16(FP)
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SYNC
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@ -117,10 +111,10 @@ TEXT ·Xadd64(SB), NOSPLIT, $0-24
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MOVV ptr+0(FP), R2
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MOVV delta+8(FP), R3
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SYNC
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LLV(2, 1) // R1 = *R2
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LLV (R2), R1
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ADDVU R1, R3, R4
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MOVV R4, R1
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SCV(2, 4) // *R2 = R4
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SCV R4, (R2)
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BEQ R4, -4(PC)
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MOVV R1, ret+16(FP)
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SYNC
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@ -132,8 +126,8 @@ TEXT ·Xchg(SB), NOSPLIT, $0-20
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SYNC
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MOVV R5, R3
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LL(2, 1) // R1 = *R2
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SC(2, 3) // *R2 = R3
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LL (R2), R1
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SC R3, (R2)
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BEQ R3, -3(PC)
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MOVW R1, ret+16(FP)
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SYNC
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@ -145,8 +139,8 @@ TEXT ·Xchg64(SB), NOSPLIT, $0-24
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SYNC
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MOVV R5, R3
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LLV(2, 1) // R1 = *R2
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SCV(2, 3) // *R2 = R3
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LLV (R2), R1
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SCV R3, (R2)
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BEQ R3, -3(PC)
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MOVV R1, ret+16(FP)
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SYNC
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@ -193,9 +187,9 @@ TEXT ·Or8(SB), NOSPLIT, $0-9
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SLLV R4, R2
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SYNC
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LL(3, 4) // R4 = *R3
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LL (R3), R4
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OR R2, R4
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SC(3, 4) // *R3 = R4
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SC R4, (R3)
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BEQ R4, -4(PC)
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SYNC
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RET
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@ -223,9 +217,9 @@ TEXT ·And8(SB), NOSPLIT, $0-9
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OR R5, R2
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SYNC
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LL(3, 4) // R4 = *R3
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LL (R3), R4
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AND R2, R4
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SC(3, 4) // *R3 = R4
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SC R4, (R3)
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BEQ R4, -4(PC)
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SYNC
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RET
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@ -6,12 +6,6 @@
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#include "textflag.h"
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#define LL(base, rt) WORD $((060<<26)|((base)<<21)|((rt)<<16))
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#define LLV(base, rt) WORD $((064<<26)|((base)<<21)|((rt)<<16))
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#define SC(base, rt) WORD $((070<<26)|((base)<<21)|((rt)<<16))
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#define SCV(base, rt) WORD $((074<<26)|((base)<<21)|((rt)<<16))
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#define SYNC WORD $0xf
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TEXT ·SwapInt32(SB),NOSPLIT,$0-20
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JMP ·SwapUint32(SB)
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@ -20,8 +14,8 @@ TEXT ·SwapUint32(SB),NOSPLIT,$0-20
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MOVW new+8(FP), R5
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SYNC
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MOVV R5, R3
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LL(2, 1) // R1 = *R2
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SC(2, 3) // *R2 = R3
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LL (R2), R1
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SC R3, (R2)
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BEQ R3, -3(PC)
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MOVW R1, old+16(FP)
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SYNC
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@ -35,8 +29,8 @@ TEXT ·SwapUint64(SB),NOSPLIT,$0-24
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MOVV new+8(FP), R5
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SYNC
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MOVV R5, R3
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LLV(2, 1) // R1 = *R2
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SCV(2, 3) // *R2 = R3
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LLV (R2), R1
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SCV R3, (R2)
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BEQ R3, -3(PC)
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MOVV R1, old+16(FP)
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SYNC
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@ -55,9 +49,9 @@ TEXT ·CompareAndSwapUint32(SB),NOSPLIT,$0-17
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SYNC
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cas_again:
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MOVV R5, R3
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LL(1, 4) // R4 = *R1
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LL (R1), R4
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BNE R2, R4, cas_fail
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SC(1, 3) // *R1 = R3
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SC R3, (R1)
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BEQ R3, cas_again
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MOVV $1, R1
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MOVB R1, swapped+16(FP)
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@ -80,9 +74,9 @@ TEXT ·CompareAndSwapUint64(SB),NOSPLIT,$0-25
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SYNC
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cas64_again:
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MOVV R5, R3
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LLV(1, 4) // R4 = *R1
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LLV (R1), R4
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BNE R2, R4, cas64_fail
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SCV(1, 3) // *R1 = R3
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SCV R3, (R1)
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BEQ R3, cas64_again
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MOVV $1, R1
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MOVB R1, swapped+24(FP)
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@ -99,10 +93,10 @@ TEXT ·AddUint32(SB),NOSPLIT,$0-20
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MOVV addr+0(FP), R2
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MOVW delta+8(FP), R3
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SYNC
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LL(2, 1) // R1 = *R2
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LL (R2), R1
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ADDU R1, R3, R4
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MOVV R4, R1
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SC(2, 4) // *R2 = R4
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SC R4, (R2)
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BEQ R4, -4(PC)
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MOVW R1, new+16(FP)
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SYNC
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@ -118,10 +112,10 @@ TEXT ·AddUint64(SB),NOSPLIT,$0-24
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MOVV addr+0(FP), R2
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MOVV delta+8(FP), R3
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SYNC
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LLV(2, 1) // R1 = *R2
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LLV (R2), R1
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ADDVU R1, R3, R4
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MOVV R4, R1
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SCV(2, 4) // *R2 = R4
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SCV R4, (R2)
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BEQ R4, -4(PC)
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MOVV R1, new+16(FP)
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SYNC
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