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cmd/internal/obj/loong64: remove the incorrect unsigned instructions

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The loong64 ISA does not support the 32-bit unsigned arithmetic
instructions ADDU, SUBU and MULU.

Change-Id: Ifa67de9c59aa12d08844189ed23e6daad0cc11ea
Reviewed-on: https://go-review.googlesource.com/c/go/+/722760
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
This commit is contained in:
Xiaolin Zhao 2025-11-21 17:22:05 +08:00 • committed by abner chenc
parent c048a9a11f
commit c6d64f8556
7 changed files with 5 additions and 38 deletions
Download patch file Download diff file Expand all files Collapse all files

2
src/cmd/asm/internal/asm/testdata/loong64enc1.s vendored
View file

@ -199,8 +199,6 @@ lable2:
MOVHU R4, 1(R5) // a4044029
MOVHU y+8(FP), R4 // 6440402a
MOVHU 1(R5), R4 // a404402a
MULU R4, R5 // a5101c00
MULU R4, R5, R6 // a6101c00
MULH R4, R5 // a5901c00
MULH R4, R5, R6 // a6901c00
MULHU R4, R5 // a5101d00

4
src/cmd/asm/internal/asm/testdata/loong64enc2.s vendored
View file

@ -41,10 +41,6 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$0
SGTU $4096, R4, R5 // 3e00001485f81200
SGTU $65536, R4 // 1e02001484f81200
SGTU $4096, R4 // 3e00001484f81200
ADDU $65536, R4, R5 // 1e02001485781000
ADDU $4096, R4, R5 // 3e00001485781000
ADDU $65536, R4 // 1e02001484781000
ADDU $4096, R4 // 3e00001484781000
ADDVU $65536, R4, R5 // 1e02001485f81000
ADDVU $4096, R4, R5 // 3e00001485f81000
ADDVU $65536, R4 // 1e02001484f81000

4
src/cmd/asm/internal/asm/testdata/loong64enc3.s vendored
View file

@ -111,10 +111,6 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$0
SGTU $74565, R4, R5 // 5e020014de178d0385f81200
SGTU $4097, R4 // 3e000014de07800384f81200
SGTU $4097, R4, R5 // 3e000014de07800385f81200
ADDU $74565, R4 // 5e020014de178d0384781000
ADDU $74565, R4, R5 // 5e020014de178d0385781000
ADDU $4097, R4 // 3e000014de07800384781000
ADDU $4097, R4, R5 // 3e000014de07800385781000
ADDVU $4097, R4 // 3e000014de07800384f81000
ADDVU $4097, R4, R5 // 3e000014de07800385f81000
ADDVU $74565, R4 // 5e020014de178d0384f81000

3
src/cmd/internal/obj/loong64/a.out.go
View file

@ -429,7 +429,6 @@ const (
AADD
AADDD
AADDF
AADDU
AADDW
AAND
@ -495,7 +494,6 @@ const (
AMUL
AMULD
AMULF
AMULU
AMULH
AMULHU
AMULW
@ -531,7 +529,6 @@ const (
ASUBD
ASUBF
ASUBU
ASUBW
ADBAR
ASYSCALL

3
src/cmd/internal/obj/loong64/anames.go
View file

@ -10,7 +10,6 @@ var Anames = []string{
"ADD",
"ADDD",
"ADDF",
"ADDU",
"ADDW",
"AND",
"BEQ",
@ -63,7 +62,6 @@ var Anames = []string{
"MUL",
"MULD",
"MULF",
"MULU",
"MULH",
"MULHU",
"MULW",
@ -92,7 +90,6 @@ var Anames = []string{
"SUB",
"SUBD",
"SUBF",
"SUBU",
"SUBW",
"DBAR",
"SYSCALL",

20
src/cmd/internal/obj/loong64/asm.go
View file

@ -1431,7 +1431,6 @@ func buildop(ctxt *obj.Link) {
opset(AADDW, r0)
opset(ASGT, r0)
opset(ASGTU, r0)
opset(AADDU, r0)
case AADDV:
opset(AADDVU, r0)
@ -1514,13 +1513,11 @@ func buildop(ctxt *obj.Link) {
case ASUB:
opset(ASUBW, r0)
opset(ASUBU, r0)
opset(ANOR, r0)
opset(ASUBV, r0)
opset(ASUBVU, r0)
opset(AMUL, r0)
opset(AMULW, r0)
opset(AMULU, r0)
opset(AMULH, r0)
opset(AMULHU, r0)
opset(AREM, r0)
@ -2296,8 +2293,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) {
o5 := uint32(0)
o6 := uint32(0)
add := AADDU
add = AADDVU
add := AADDVU
switch o.type_ {
default:
@ -2428,7 +2424,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) {
v := c.regoff(&p.From)
a := AOR
if v < 0 {
a = AADDU
a = AADD
}
o1 = OP_12IRR(c.opirr(a), uint32(v), uint32(0), uint32(REGTMP))
r := int(p.Reg)
@ -2687,7 +2683,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) {
case 34: // mov $con,fr
v := c.regoff(&p.From)
a := AADDU
a := AADD
if v > 0 {
a = AOR
}
@ -3317,8 +3313,6 @@ func (c *ctxt0) oprrr(a obj.As) uint32 {
switch a {
case AADD, AADDW:
return 0x20 << 15
case AADDU:
return 0x20 << 15
case ASGT:
return 0x24 << 15 // SLT
case ASGTU:
@ -3337,9 +3331,7 @@ func (c *ctxt0) oprrr(a obj.As) uint32 {
return 0x2c << 15 // orn
case AANDN:
return 0x2d << 15 // andn
case ASUB, ASUBW:
return 0x22 << 15
case ASUBU, ANEGW:
case ASUB, ASUBW, ANEGW:
return 0x22 << 15
case ANOR:
return 0x28 << 15
@ -3370,8 +3362,6 @@ func (c *ctxt0) oprrr(a obj.As) uint32 {
case AMUL, AMULW:
return 0x38 << 15 // mul.w
case AMULU:
return 0x38 << 15 // mul.w
case AMULH:
return 0x39 << 15 // mulh.w
case AMULHU:
@ -4684,7 +4674,7 @@ func (c *ctxt0) opir(a obj.As) uint32 {
func (c *ctxt0) opirr(a obj.As) uint32 {
switch a {
case AADD, AADDW, AADDU:
case AADD, AADDW:
return 0x00a << 22
case ASGT:
return 0x008 << 22

7
src/cmd/internal/obj/loong64/obj.go
View file

@ -64,12 +64,6 @@ func progedit(ctxt *obj.Link, p *obj.Prog, newprog obj.ProgAlloc) {
p.As = AADD
}
case ASUBU:
if p.From.Type == obj.TYPE_CONST {
p.From.Offset = -p.From.Offset
p.As = AADDU
}
case ASUBV:
if p.From.Type == obj.TYPE_CONST {
p.From.Offset = -p.From.Offset
@ -453,7 +447,6 @@ func preprocess(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) {
q.Link = q1
case AADD,
AADDU,
AADDV,
AADDVU:
if p.To.Type == obj.TYPE_REG && p.To.Reg == REGSP && p.From.Type == obj.TYPE_CONST {