cmd/asm,cmd/internal/obj/riscv: implement vector configuration setting instructions

Implement vector configuration setting instructions (VSETVLI,
VSETIVLI, VSETL).  These allow the vector length (vl) and vector
type (vtype) CSRs to be configured via a single instruction.
Unfortunately each instruction has its own dedicated encoding.

In the case of VSETVLI/VSETIVLI, the vector type is specified via
a series of special operands, which specify the selected element
width (E8, E16, E32, E64), the vector register group multiplier
(M1, M2, M4, M8, MF2, MF4, MF8), the vector tail policy (TU, TA)
and vector mask policy (MU, MA). Note that the order of these
special operands matches non-Go assemblers.

Partially based on work by Pengcheng Wang <wangpengcheng.pp@bytedance.com>.

Cq-Include-Trybots: luci.golang.try:gotip-linux-riscv64
Change-Id: I431f59c1e048a3e84754f0643a963da473a741fe
Reviewed-on: https://go-review.googlesource.com/c/go/+/631936
Reviewed-by: Mark Ryan <markdryan@rivosinc.com>
Reviewed-by: Meng Zhuo <mengzhuo1203@gmail.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
This commit is contained in:
Joel Sing 2024-11-24 12:39:20 +11:00
parent b16c04f439
commit c8545439b5
12 changed files with 327 additions and 26 deletions

View file

@ -98,7 +98,8 @@ import (
// val = string
//
// <symbolic constant name>
// Special symbolic constants for ARM64, such as conditional flags, tlbi_op and so on.
// Special symbolic constants for ARM64 (such as conditional flags, tlbi_op and so on)
// and RISCV64 (such as names for vector configuration instruction arguments).
// Encoding:
// type = TYPE_SPECIAL
// offset = The constant value corresponding to this symbol