diff --git a/src/cmd/asm/internal/asm/testdata/loong64enc1.s b/src/cmd/asm/internal/asm/testdata/loong64enc1.s index 277396bf27c..b3fcf7db15e 100644 --- a/src/cmd/asm/internal/asm/testdata/loong64enc1.s +++ b/src/cmd/asm/internal/asm/testdata/loong64enc1.s @@ -597,6 +597,42 @@ lable2: XVSEQV $15, X2, X4 // 44bc8176 XVSEQV $-15, X2, X4 // 44c48176 + // VSLTB{B,H,W,V}, XVSLTB{B,H,W,V} instruction + VSLTB V1, V2, V3 // 43040670 + VSLTH V1, V2, V3 // 43840670 + VSLTW V1, V2, V3 // 43040770 + VSLTV V1, V2, V3 // 43840770 + XVSLTB X1, X2, X3 // 43040674 + XVSLTH X1, X2, X3 // 43840674 + XVSLTW X1, X2, X3 // 43040774 + XVSLTV X1, X2, X3 // 43840774 + VSLTB $1, V2, V3 // 43048672 + VSLTH $16, V2, V3 // 43c08672 + VSLTW $-16, V2, V3 // 43408772 + VSLTV $-15, V2, V3 // 43c48772 + XVSLTB $1, X2, X3 // 43048676 + XVSLTH $16, X2, X3 // 43c08676 + XVSLTW $-16, X2, X3 // 43408776 + XVSLTV $-16, X2, X3 // 43c08776 + + // VSLTB{B,H,W,V}U, XVSLTB{B,H,W,V}U instruction + VSLTBU V1, V2, V3 // 43040870 + VSLTHU V1, V2, V3 // 43840870 + VSLTWU V1, V2, V3 // 43040970 + VSLTVU V1, V2, V3 // 43840970 + XVSLTBU X1, X2, X3 // 43040874 + XVSLTHU X1, X2, X3 // 43840874 + XVSLTWU X1, X2, X3 // 43040974 + XVSLTVU X1, X2, X3 // 43840974 + VSLTBU $0, V2, V3 // 43008872 + VSLTHU $31, V2, V3 // 43fc8872 + VSLTWU $16, V2, V3 // 43408972 + VSLTVU $1, V2, V3 // 43848972 + XVSLTBU $0, X2, X3 // 43008876 + XVSLTHU $31, X2, X3 // 43fc8876 + XVSLTWU $8, X2, X3 // 43208976 + XVSLTVU $0, X2, X3 // 43808976 + // VPCNT{B,H,W,V}, XVPCNT{B,H,W,V} instruction VPCNTB V1, V2 // 22209c72 VPCNTH V1, V2 // 22249c72 diff --git a/src/cmd/internal/obj/loong64/a.out.go b/src/cmd/internal/obj/loong64/a.out.go index 5b8bffc9f1e..2eabe9bda8a 100644 --- a/src/cmd/internal/obj/loong64/a.out.go +++ b/src/cmd/internal/obj/loong64/a.out.go @@ -912,6 +912,23 @@ const ( AVSEQV AXVSEQV + AVSLTB + AVSLTH + AVSLTW + AVSLTV + AVSLTBU + AVSLTHU + AVSLTWU + AVSLTVU + AXVSLTB + AXVSLTH + AXVSLTW + AXVSLTV + AXVSLTBU + AXVSLTHU + AXVSLTWU + AXVSLTVU + // LSX and LASX integer div and mod instructions AVDIVB AVDIVH diff --git a/src/cmd/internal/obj/loong64/anames.go b/src/cmd/internal/obj/loong64/anames.go index 1749b43bf64..92e3cab950f 100644 --- a/src/cmd/internal/obj/loong64/anames.go +++ b/src/cmd/internal/obj/loong64/anames.go @@ -400,6 +400,22 @@ var Anames = []string{ "XVSEQW", "VSEQV", "XVSEQV", + "VSLTB", + "VSLTH", + "VSLTW", + "VSLTV", + "VSLTBU", + "VSLTHU", + "VSLTWU", + "VSLTVU", + "XVSLTB", + "XVSLTH", + "XVSLTW", + "XVSLTV", + "XVSLTBU", + "XVSLTHU", + "XVSLTWU", + "XVSLTVU", "VDIVB", "VDIVH", "VDIVW", diff --git a/src/cmd/internal/obj/loong64/asm.go b/src/cmd/internal/obj/loong64/asm.go index b35e49a1b6e..a39a6683160 100644 --- a/src/cmd/internal/obj/loong64/asm.go +++ b/src/cmd/internal/obj/loong64/asm.go @@ -93,6 +93,14 @@ var optab = []Optab{ {AXVSEQB, C_XREG, C_XREG, C_NONE, C_XREG, C_NONE, 2, 4, 0, 0}, {AVSEQB, C_S5CON, C_VREG, C_NONE, C_VREG, C_NONE, 22, 4, 0, 0}, {AXVSEQB, C_S5CON, C_XREG, C_NONE, C_XREG, C_NONE, 22, 4, 0, 0}, + + {AVSLTB, C_VREG, C_VREG, C_NONE, C_VREG, C_NONE, 2, 4, 0, 0}, + {AXVSLTB, C_XREG, C_XREG, C_NONE, C_XREG, C_NONE, 2, 4, 0, 0}, + {AVSLTB, C_S5CON, C_VREG, C_NONE, C_VREG, C_NONE, 22, 4, 0, 0}, + {AXVSLTB, C_S5CON, C_XREG, C_NONE, C_XREG, C_NONE, 22, 4, 0, 0}, + {AVSLTB, C_U5CON, C_VREG, C_NONE, C_VREG, C_NONE, 31, 4, 0, 0}, + {AXVSLTB, C_U5CON, C_XREG, C_NONE, C_XREG, C_NONE, 31, 4, 0, 0}, + {AVANDV, C_VREG, C_VREG, C_NONE, C_VREG, C_NONE, 2, 4, 0, 0}, {AVANDV, C_VREG, C_NONE, C_NONE, C_VREG, C_NONE, 2, 4, 0, 0}, {AXVANDV, C_XREG, C_XREG, C_NONE, C_XREG, C_NONE, 2, 4, 0, 0}, @@ -1784,6 +1792,24 @@ func buildop(ctxt *obj.Link) { opset(AXVSHUFW, r0) opset(AXVSHUFV, r0) + case AVSLTB: + opset(AVSLTH, r0) + opset(AVSLTW, r0) + opset(AVSLTV, r0) + opset(AVSLTBU, r0) + opset(AVSLTHU, r0) + opset(AVSLTWU, r0) + opset(AVSLTVU, r0) + + case AXVSLTB: + opset(AXVSLTH, r0) + opset(AXVSLTW, r0) + opset(AXVSLTV, r0) + opset(AXVSLTBU, r0) + opset(AXVSLTHU, r0) + opset(AXVSLTWU, r0) + opset(AXVSLTVU, r0) + case AVANDB: opset(AVORB, r0) opset(AVXORB, r0) @@ -3379,6 +3405,38 @@ func (c *ctxt0) oprrr(a obj.As) uint32 { return 0x0e003 << 15 // vseq.d case AXVSEQV: return 0x0e803 << 15 // xvseq.d + case AVSLTB: + return 0x0E00C << 15 // vslt.b + case AVSLTH: + return 0x0E00D << 15 // vslt.h + case AVSLTW: + return 0x0E00E << 15 // vslt.w + case AVSLTV: + return 0x0E00F << 15 // vslt.d + case AVSLTBU: + return 0x0E010 << 15 // vslt.bu + case AVSLTHU: + return 0x0E011 << 15 // vslt.hu + case AVSLTWU: + return 0x0E012 << 15 // vslt.wu + case AVSLTVU: + return 0x0E013 << 15 // vslt.du + case AXVSLTB: + return 0x0E80C << 15 // xvslt.b + case AXVSLTH: + return 0x0E80D << 15 // xvslt.h + case AXVSLTW: + return 0x0E80E << 15 // xvslt.w + case AXVSLTV: + return 0x0E80F << 15 // xvslt.d + case AXVSLTBU: + return 0x0E810 << 15 // xvslt.bu + case AXVSLTHU: + return 0x0E811 << 15 // xvslt.hu + case AXVSLTWU: + return 0x0E812 << 15 // xvslt.wu + case AXVSLTVU: + return 0x0E813 << 15 // xvslt.du case AVANDV: return 0x0E24C << 15 // vand.v case AVORV: @@ -4399,6 +4457,38 @@ func (c *ctxt0) opirr(a obj.As) uint32 { return 0x0ED02 << 15 // xvseqi.w case AXVSEQV: return 0x0ED03 << 15 // xvseqi.d + case AVSLTB: + return 0x0E50C << 15 // vslti.b + case AVSLTH: + return 0x0E50D << 15 // vslti.h + case AVSLTW: + return 0x0E50E << 15 // vslti.w + case AVSLTV: + return 0x0E50F << 15 // vslti.d + case AVSLTBU: + return 0x0E510 << 15 // vslti.bu + case AVSLTHU: + return 0x0E511 << 15 // vslti.hu + case AVSLTWU: + return 0x0E512 << 15 // vslti.wu + case AVSLTVU: + return 0x0E513 << 15 // vslti.du + case AXVSLTB: + return 0x0ED0C << 15 // xvslti.b + case AXVSLTH: + return 0x0ED0D << 15 // xvslti.h + case AXVSLTW: + return 0x0ED0E << 15 // xvslti.w + case AXVSLTV: + return 0x0ED0F << 15 // xvslti.d + case AXVSLTBU: + return 0x0ED10 << 15 // xvslti.bu + case AXVSLTHU: + return 0x0ED11 << 15 // xvslti.hu + case AXVSLTWU: + return 0x0ED12 << 15 // xvslti.wu + case AXVSLTVU: + return 0x0ED13 << 15 // xvslti.du case AVROTRB: return 0x1ca8<<18 | 0x1<<13 // vrotri.b case AVROTRH: