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[dev.ssa] cmd/compile/internal/ssa: fix sign extension + load combo

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Load-and-sign-extend opcodes were being generated in the
wrong block, leading to having more than one memory variable
live at once.  Fix the rules + add a test.

Change-Id: Iadf80e55ea901549c15c628ae295c2d0f1f64525
Reviewed-on: https://go-review.googlesource.com/14591
Reviewed-by: Todd Neal <todd@tneal.org>
Run-TryBot: Todd Neal <todd@tneal.org>
This commit is contained in:
Keith Randall 2015-09-15 09:02:07 -07:00
parent e3869a6b65
commit cde977c23c
4 changed files with 71 additions and 10 deletions
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28
src/cmd/compile/internal/ssa/regalloc.go
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@ -1046,5 +1046,33 @@ func (f *Func) live() [][][]ID {
break
}
}
// Make sure that there is only one live memory variable in each set.
// Ideally we should check this at every instructiom, but at every
// edge seems good enough for now.
isMem := make([]bool, f.NumValues())
for _, b := range f.Blocks {
for _, v := range b.Values {
isMem[v.ID] = v.Type.IsMemory()
}
}
for _, b := range f.Blocks {
for i, c := range b.Succs {
nmem := 0
for _, id := range live[b.ID][i] {
if isMem[id] {
nmem++
}
}
if nmem > 1 {
f.Fatalf("more than one mem live on edge %v->%v: %v", b, c, live[b.ID][i])
}
// TODO: figure out why we get nmem==0 occasionally.
//if nmem == 0 {
// f.Fatalf("no mem live on edge %v->%v: %v", b, c, live[b.ID][i])
//}
}
}
return live
}