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cmd/internal/obj/loong64: add [X]VLDREPL.{B/H/W/D} instructions support

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Go asm syntax:
	 VMOVQ	offset(Rj), Vd.<T>
	XVMOVQ	offset(Rj), Xd.<T>

<T> can have the following values:
B16, H8, W4, V2, B32, H16, W8, V4

Change-Id: I44af51d58bb62649d3fe360b3abb771565e78a8a
Reviewed-on: https://go-review.googlesource.com/c/go/+/682895
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
Reviewed-by: Meidan Li <limeidan@loongson.cn>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Mark Freeman <mark@golang.org>
This commit is contained in:
Xiaolin Zhao 2025-06-19 20:32:10 +08:00 • committed by abner chenc
parent d6beda863e
commit d44749b65b
3 changed files with 104 additions and 34 deletions
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111
src/cmd/internal/obj/loong64/asm.go
View file

@ -416,8 +416,11 @@ var optab = []Optab{
{AVMOVQ, C_ELEM, C_NONE, C_NONE, C_ARNG, C_NONE, 45, 4, 0, 0},
{APRELD, C_SOREG, C_U5CON, C_NONE, C_NONE, C_NONE, 46, 4, 0, 0},
{APRELDX, C_SOREG, C_DCON, C_U5CON, C_NONE, C_NONE, 47, 20, 0, 0},
{AVMOVQ, C_SOREG, C_NONE, C_NONE, C_ARNG, C_NONE, 46, 4, 0, 0},
{AXVMOVQ, C_SOREG, C_NONE, C_NONE, C_ARNG, C_NONE, 46, 4, 0, 0},
{APRELD, C_SOREG, C_U5CON, C_NONE, C_NONE, C_NONE, 47, 4, 0, 0},
{APRELDX, C_SOREG, C_DCON, C_U5CON, C_NONE, C_NONE, 48, 20, 0, 0},
{obj.APCALIGN, C_U12CON, C_NONE, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0},
{obj.APCDATA, C_32CON, C_NONE, C_NONE, C_32CON, C_NONE, 0, 0, 0, 0},
@ -2395,7 +2398,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) {
o1 = uint32(c.regoff(&p.From))
case 39: // vmov Rn, Vd.<T>[index]
v, m := c.specialLsxMovInst(p.As, p.From.Reg, p.To.Reg)
v, m := c.specialLsxMovInst(p.As, p.From.Reg, p.To.Reg, false)
if v == 0 {
c.ctxt.Diag("illegal arng type combination: %v\n", p)
}
@ -2407,7 +2410,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) {
o1 = v | (index << 10) | (Rj << 5) | Vd
case 40: // vmov Vd.<T>[index], Rn
v, m := c.specialLsxMovInst(p.As, p.From.Reg, p.To.Reg)
v, m := c.specialLsxMovInst(p.As, p.From.Reg, p.To.Reg, false)
if v == 0 {
c.ctxt.Diag("illegal arng type combination: %v\n", p)
}
@ -2419,7 +2422,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) {
o1 = v | (index << 10) | (Vj << 5) | Rd
case 41: // vmov Rn, Vd.<T>
v, _ := c.specialLsxMovInst(p.As, p.From.Reg, p.To.Reg)
v, _ := c.specialLsxMovInst(p.As, p.From.Reg, p.To.Reg, false)
if v == 0 {
c.ctxt.Diag("illegal arng type combination: %v\n", p)
}
@ -2429,7 +2432,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) {
o1 = v | (Rj << 5) | Vd
case 42: // vmov xj, xd.<T>
v, _ := c.specialLsxMovInst(p.As, p.From.Reg, p.To.Reg)
v, _ := c.specialLsxMovInst(p.As, p.From.Reg, p.To.Reg, false)
if v == 0 {
c.ctxt.Diag("illegal arng type combination: %v\n", p)
}
@ -2439,7 +2442,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) {
o1 = v | (Xj << 5) | Xd
case 43: // vmov xj, xd.<T>[index]
v, m := c.specialLsxMovInst(p.As, p.From.Reg, p.To.Reg)
v, m := c.specialLsxMovInst(p.As, p.From.Reg, p.To.Reg, false)
if v == 0 {
c.ctxt.Diag("illegal arng type combination: %v\n", p)
}
@ -2451,7 +2454,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) {
o1 = v | (index << 10) | (Xj << 5) | Xd
case 44: // vmov xj.<T>[index], xd
v, m := c.specialLsxMovInst(p.As, p.From.Reg, p.To.Reg)
v, m := c.specialLsxMovInst(p.As, p.From.Reg, p.To.Reg, false)
if v == 0 {
c.ctxt.Diag("illegal arng type combination: %v\n", p)
}
@ -2463,7 +2466,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) {
o1 = v | (index << 10) | (Xj << 5) | Xd
case 45: // vmov vj.<T>[index], vd.<T>
v, m := c.specialLsxMovInst(p.As, p.From.Reg, p.To.Reg)
v, m := c.specialLsxMovInst(p.As, p.From.Reg, p.To.Reg, false)
if v == 0 {
c.ctxt.Diag("illegal arng type combination: %v\n", p)
}
@ -2474,12 +2477,23 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) {
c.checkindex(p, index, m)
o1 = v | (index << 10) | (vj << 5) | vd
case 46: // preld offset(Rbase), $hint
case 46: // vmov offset(vj), vd.<T>
v, _ := c.specialLsxMovInst(p.As, p.From.Reg, p.To.Reg, true)
if v == 0 {
c.ctxt.Diag("illegal arng type combination: %v\n", p)
}
si := c.regoff(&p.From)
Rj := uint32(p.From.Reg & EXT_REG_MASK)
Vd := uint32(p.To.Reg & EXT_REG_MASK)
o1 = v | uint32(si<<10) | (Rj << 5) | Vd
case 47: // preld offset(Rbase), $hint
offs := c.regoff(&p.From)
hint := p.GetFrom3().Offset
o1 = OP_12IR_5I(c.opiir(p.As), uint32(offs), uint32(p.From.Reg), uint32(hint))
case 47: // preldx offset(Rbase), $n, $hint
case 48: // preldx offset(Rbase), $n, $hint
offs := c.regoff(&p.From)
hint := p.RestArgs[1].Offset
n := uint64(p.GetFrom3().Offset)
@ -4192,7 +4206,7 @@ func (c *ctxt0) specialFpMovInst(a obj.As, fclass int, tclass int) uint32 {
return 0
}
func (c *ctxt0) specialLsxMovInst(a obj.As, fReg, tReg int16) (op_code, index_mask uint32) {
func (c *ctxt0) specialLsxMovInst(a obj.As, fReg, tReg int16, offset_flag bool) (op_code, index_mask uint32) {
farng := (fReg >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK
tarng := (tReg >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK
fclass := c.rclass(fReg)
@ -4258,29 +4272,58 @@ func (c *ctxt0) specialLsxMovInst(a obj.As, fReg, tReg int16) (op_code, index_ma
}
case C_REG | (C_ARNG << 16):
// vmov Rn, Vd.<T>
switch a {
case AVMOVQ:
switch tarng {
case ARNG_16B:
return (0x1CA7C0 << 10), 0x0 // vreplgr2vr.b
case ARNG_8H:
return (0x1CA7C1 << 10), 0x0 // vreplgr2vr.h
case ARNG_4W:
return (0x1CA7C2 << 10), 0x0 // vreplgr2vr.w
case ARNG_2V:
return (0x1CA7C3 << 10), 0x0 // vreplgr2vr.d
switch {
case offset_flag:
// vmov offset(vj), vd.<T>
switch a {
case AVMOVQ:
switch tarng {
case ARNG_16B:
return (0xC2 << 22), 0x0 // vldrepl.b
case ARNG_8H:
return (0x182 << 21), 0x0 // vldrepl.h
case ARNG_4W:
return (0x302 << 20), 0x0 // vldrepl.w
case ARNG_2V:
return (0x602 << 19), 0x0 // vldrepl.d
}
case AXVMOVQ:
switch tarng {
case ARNG_32B:
return (0xCA << 22), 0x0 // xvldrepl.b
case ARNG_16H:
return (0x192 << 21), 0x0 // xvldrepl.h
case ARNG_8W:
return (0x322 << 20), 0x0 // xvldrepl.w
case ARNG_4V:
return (0x642 << 19), 0x0 // xvldrepl.d
}
}
case AXVMOVQ:
switch tarng {
case ARNG_32B:
return (0x1DA7C0 << 10), 0x0 // xvreplgr2vr.b
case ARNG_16H:
return (0x1DA7C1 << 10), 0x0 // xvreplgr2vr.h
case ARNG_8W:
return (0x1DA7C2 << 10), 0x0 // xvreplgr2vr.w
case ARNG_4V:
return (0x1DA7C3 << 10), 0x0 // xvreplgr2vr.d
default:
// vmov Rn, Vd.<T>
switch a {
case AVMOVQ:
switch tarng {
case ARNG_16B:
return (0x1CA7C0 << 10), 0x0 // vreplgr2vr.b
case ARNG_8H:
return (0x1CA7C1 << 10), 0x0 // vreplgr2vr.h
case ARNG_4W:
return (0x1CA7C2 << 10), 0x0 // vreplgr2vr.w
case ARNG_2V:
return (0x1CA7C3 << 10), 0x0 // vreplgr2vr.d
}
case AXVMOVQ:
switch tarng {
case ARNG_32B:
return (0x1DA7C0 << 10), 0x0 // xvreplgr2vr.b
case ARNG_16H:
return (0x1DA7C1 << 10), 0x0 // xvreplgr2vr.h
case ARNG_8W:
return (0x1DA7C2 << 10), 0x0 // xvreplgr2vr.w
case ARNG_4V:
return (0x1DA7C3 << 10), 0x0 // xvreplgr2vr.d
}
}
}