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cmd/internal/obj, cmd/asm: reclassify 32-bit immediate value of loong64

Browse source 
Change-Id: If9fd257ca0837a8c8597889c4f5ed3d4edc602c1
Reviewed-on: https://go-review.googlesource.com/c/go/+/636995
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Junyang Shao <shaojunyang@google.com>
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
Reviewed-by: Michael Pratt <mpratt@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
This commit is contained in:
limeidan 2024-12-16 16:31:37 +08:00 • committed by abner chenc
parent 6894904974
commit f24d2e175e
5 changed files with 180 additions and 161 deletions
Download patch file Download diff file Expand all files Collapse all files

4
src/cmd/asm/internal/asm/testdata/loong64enc1.s vendored
View file

@ -107,8 +107,8 @@ lable2:
MOVV $4(R4), R5 // 8510c002
MOVW $-1, R4 // 04fcff02
MOVV $-1, R4 // 04fcff02
MOVW $1, R4 // 0404c002
MOVV $1, R4 // 0404c002
MOVW $1, R4 // 04048003
MOVV $1, R4 // 04048003
ADD $-1, R4, R5 // 85fcbf02
ADD $-1, R4 // 84fcbf02
ADDV $-1, R4, R5 // 85fcff02

2
src/cmd/asm/internal/asm/testdata/loong64enc2.s vendored
View file

@ -12,7 +12,7 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$0
AND $-1, R4, R5 // 1efcbf0285f81400
AND $-1, R4 // 1efcbf0284f81400
MOVW $-1, F4 // 1efcbf02c4a71401
MOVW $1, F4 // 1e048002c4a71401
MOVW $1, F4 // 1e048003c4a71401
TEQ $4, R4, R5 // 8508005c04002a00
TEQ $4, R4 // 0408005c04002a00
TNE $4, R4, R5 // 8508005804002a00

36
src/cmd/internal/obj/loong64/a.out.go
View file

@ -327,19 +327,31 @@ const (
C_XREG
C_ARNG // Vn.<T>
C_ELEM // Vn.<T>[index]
C_ZCON
C_SCON // 12 bit signed
C_UCON // 32 bit signed, low 12 bits 0
// When the immediate value is SCON, it can choose either the ADDCON implementation
// or the ANDCON implementation, using ADD0CON/AND0CON to distinguish them, so that
// the program can choose the implementation with fewer instructions.
C_ADD0CON
C_AND0CON
C_ADDCON // -0x800 <= v < 0
C_ANDCON // 0 < v <= 0xFFF
C_LCON // other 32
C_U1CON // 1 bit unsigned constant
C_U2CON // 2 bit unsigned constant
C_U3CON // 3 bit unsigned constant
C_U4CON // 4 bit unsigned constant
C_U5CON // 5 bit unsigned constant
C_U6CON // 6 bit unsigned constant
C_U7CON // 7 bit unsigned constant
C_U8CON // 8 bit unsigned constant
C_S5CON // 5 bit signed constant
C_US12CON // same as C_S12CON, increase the priority of C_S12CON in special cases.
C_UU12CON // same as C_U12CON, increase the priority of C_U12CON in special cases.
C_S12CON // 12 bit signed constant, -0x800 < v <= 0x7ff
C_U12CON // 12 bit unsigned constant, 0 < v <= 0xfff
C_12CON // 12 bit signed constant, or 12 bit unsigned constant
C_S13CON20_0 // 13 bit signed constant, low 12 bits 0
C_S13CON // 13 bit signed constant
C_U13CON20_0 // 13 bit unsigned constant, low 12 bits 0
C_U13CON // 13 bit unsigned constant
C_13CON // 13 bit signed constant, or 13 bit unsigned constant
C_U15CON // 15 bit unsigned constant
C_U15CON20_0 // 15 bit unsigned constant, low 12 bits 0
C_32CON20_0 // 32 bit signed, low 12 bits 0
C_32CON // other 32 bit signed
// 64 bit signed, lo32 bits 0, hi20 bits are not 0, hi12 bits can
// be obtained by sign extension of the hi20 bits.

269
src/cmd/internal/obj/loong64/asm.go
View file

@ -184,48 +184,46 @@ var optab = []Optab{
{AMOVW, C_LACON, C_NONE, C_NONE, C_REG, C_NONE, 26, 12, REGSP, 0},
{AMOVV, C_LACON, C_NONE, C_NONE, C_REG, C_NONE, 26, 12, REGSP, 0},
{AMOVW, C_ADDCON, C_NONE, C_NONE, C_REG, C_NONE, 3, 4, REGZERO, 0},
{AMOVV, C_ADDCON, C_NONE, C_NONE, C_REG, C_NONE, 3, 4, REGZERO, 0},
{AMOVW, C_ANDCON, C_NONE, C_NONE, C_REG, C_NONE, 3, 4, REGZERO, 0},
{AMOVV, C_ANDCON, C_NONE, C_NONE, C_REG, C_NONE, 3, 4, REGZERO, 0},
{AMOVW, C_12CON, C_NONE, C_NONE, C_REG, C_NONE, 3, 4, REGZERO, 0},
{AMOVV, C_12CON, C_NONE, C_NONE, C_REG, C_NONE, 3, 4, REGZERO, 0},
{AMOVW, C_UCON, C_NONE, C_NONE, C_REG, C_NONE, 24, 4, 0, 0},
{AMOVV, C_UCON, C_NONE, C_NONE, C_REG, C_NONE, 24, 4, 0, 0},
{AMOVW, C_LCON, C_NONE, C_NONE, C_REG, C_NONE, 19, 8, 0, NOTUSETMP},
{AMOVV, C_LCON, C_NONE, C_NONE, C_REG, C_NONE, 19, 8, 0, NOTUSETMP},
{AMOVW, C_32CON20_0, C_NONE, C_NONE, C_REG, C_NONE, 24, 4, 0, 0},
{AMOVV, C_32CON20_0, C_NONE, C_NONE, C_REG, C_NONE, 24, 4, 0, 0},
{AMOVW, C_32CON, C_NONE, C_NONE, C_REG, C_NONE, 19, 8, 0, NOTUSETMP},
{AMOVV, C_32CON, C_NONE, C_NONE, C_REG, C_NONE, 19, 8, 0, NOTUSETMP},
{AMOVV, C_DCON12_0, C_NONE, C_NONE, C_REG, C_NONE, 67, 4, 0, NOTUSETMP},
{AMOVV, C_DCON12_20S, C_NONE, C_NONE, C_REG, C_NONE, 68, 8, 0, NOTUSETMP},
{AMOVV, C_DCON32_12S, C_NONE, C_NONE, C_REG, C_NONE, 69, 12, 0, NOTUSETMP},
{AMOVV, C_DCON, C_NONE, C_NONE, C_REG, C_NONE, 59, 16, 0, NOTUSETMP},
{AADD, C_ADD0CON, C_REG, C_NONE, C_REG, C_NONE, 4, 4, 0, 0},
{AADD, C_ADD0CON, C_NONE, C_NONE, C_REG, C_NONE, 4, 4, 0, 0},
{AADD, C_ANDCON, C_REG, C_NONE, C_REG, C_NONE, 10, 8, 0, 0},
{AADD, C_ANDCON, C_NONE, C_NONE, C_REG, C_NONE, 10, 8, 0, 0},
{AADD, C_US12CON, C_REG, C_NONE, C_REG, C_NONE, 4, 4, 0, 0},
{AADD, C_US12CON, C_NONE, C_NONE, C_REG, C_NONE, 4, 4, 0, 0},
{AADD, C_U12CON, C_REG, C_NONE, C_REG, C_NONE, 10, 8, 0, 0},
{AADD, C_U12CON, C_NONE, C_NONE, C_REG, C_NONE, 10, 8, 0, 0},
{AADDV, C_ADD0CON, C_REG, C_NONE, C_REG, C_NONE, 4, 4, 0, 0},
{AADDV, C_ADD0CON, C_NONE, C_NONE, C_REG, C_NONE, 4, 4, 0, 0},
{AADDV, C_ANDCON, C_REG, C_NONE, C_REG, C_NONE, 10, 8, 0, 0},
{AADDV, C_ANDCON, C_NONE, C_NONE, C_REG, C_NONE, 10, 8, 0, 0},
{AADDV, C_US12CON, C_REG, C_NONE, C_REG, C_NONE, 4, 4, 0, 0},
{AADDV, C_US12CON, C_NONE, C_NONE, C_REG, C_NONE, 4, 4, 0, 0},
{AADDV, C_U12CON, C_REG, C_NONE, C_REG, C_NONE, 10, 8, 0, 0},
{AADDV, C_U12CON, C_NONE, C_NONE, C_REG, C_NONE, 10, 8, 0, 0},
{AAND, C_AND0CON, C_REG, C_NONE, C_REG, C_NONE, 4, 4, 0, 0},
{AAND, C_AND0CON, C_NONE, C_NONE, C_REG, C_NONE, 4, 4, 0, 0},
{AAND, C_ADDCON, C_REG, C_NONE, C_REG, C_NONE, 10, 8, 0, 0},
{AAND, C_ADDCON, C_NONE, C_NONE, C_REG, C_NONE, 10, 8, 0, 0},
{AAND, C_UU12CON, C_REG, C_NONE, C_REG, C_NONE, 4, 4, 0, 0},
{AAND, C_UU12CON, C_NONE, C_NONE, C_REG, C_NONE, 4, 4, 0, 0},
{AAND, C_S12CON, C_REG, C_NONE, C_REG, C_NONE, 10, 8, 0, 0},
{AAND, C_S12CON, C_NONE, C_NONE, C_REG, C_NONE, 10, 8, 0, 0},
{AADD, C_UCON, C_REG, C_NONE, C_REG, C_NONE, 25, 8, 0, 0},
{AADD, C_UCON, C_NONE, C_NONE, C_REG, C_NONE, 25, 8, 0, 0},
{AADDV, C_UCON, C_REG, C_NONE, C_REG, C_NONE, 25, 8, 0, 0},
{AADDV, C_UCON, C_NONE, C_NONE, C_REG, C_NONE, 25, 8, 0, 0},
{AAND, C_UCON, C_REG, C_NONE, C_REG, C_NONE, 25, 8, 0, 0},
{AAND, C_UCON, C_NONE, C_NONE, C_REG, C_NONE, 25, 8, 0, 0},
{AADD, C_32CON20_0, C_REG, C_NONE, C_REG, C_NONE, 25, 8, 0, 0},
{AADD, C_32CON20_0, C_NONE, C_NONE, C_REG, C_NONE, 25, 8, 0, 0},
{AADDV, C_32CON20_0, C_REG, C_NONE, C_REG, C_NONE, 25, 8, 0, 0},
{AADDV, C_32CON20_0, C_NONE, C_NONE, C_REG, C_NONE, 25, 8, 0, 0},
{AAND, C_32CON20_0, C_REG, C_NONE, C_REG, C_NONE, 25, 8, 0, 0},
{AAND, C_32CON20_0, C_NONE, C_NONE, C_REG, C_NONE, 25, 8, 0, 0},
{AADD, C_LCON, C_NONE, C_NONE, C_REG, C_NONE, 23, 12, 0, 0},
{AADDV, C_LCON, C_NONE, C_NONE, C_REG, C_NONE, 23, 12, 0, 0},
{AAND, C_LCON, C_NONE, C_NONE, C_REG, C_NONE, 23, 12, 0, 0},
{AADD, C_LCON, C_REG, C_NONE, C_REG, C_NONE, 23, 12, 0, 0},
{AADDV, C_LCON, C_REG, C_NONE, C_REG, C_NONE, 23, 12, 0, 0},
{AAND, C_LCON, C_REG, C_NONE, C_REG, C_NONE, 23, 12, 0, 0},
{AADD, C_32CON, C_NONE, C_NONE, C_REG, C_NONE, 23, 12, 0, 0},
{AADDV, C_32CON, C_NONE, C_NONE, C_REG, C_NONE, 23, 12, 0, 0},
{AAND, C_32CON, C_NONE, C_NONE, C_REG, C_NONE, 23, 12, 0, 0},
{AADD, C_32CON, C_REG, C_NONE, C_REG, C_NONE, 23, 12, 0, 0},
{AADDV, C_32CON, C_REG, C_NONE, C_REG, C_NONE, 23, 12, 0, 0},
{AAND, C_32CON, C_REG, C_NONE, C_REG, C_NONE, 23, 12, 0, 0},
{AADDV, C_DCON, C_NONE, C_NONE, C_REG, C_NONE, 60, 20, 0, 0},
{AADDV, C_DCON, C_REG, C_NONE, C_REG, C_NONE, 60, 20, 0, 0},
@ -244,18 +242,18 @@ var optab = []Optab{
{AAND, C_DCON32_12S, C_NONE, C_NONE, C_REG, C_NONE, 72, 16, 0, 0},
{AAND, C_DCON32_12S, C_REG, C_NONE, C_REG, C_NONE, 72, 16, 0, 0},
{ASLL, C_SCON, C_REG, C_NONE, C_REG, C_NONE, 16, 4, 0, 0},
{ASLL, C_SCON, C_NONE, C_NONE, C_REG, C_NONE, 16, 4, 0, 0},
{ASLL, C_U5CON, C_REG, C_NONE, C_REG, C_NONE, 16, 4, 0, 0},
{ASLL, C_U5CON, C_NONE, C_NONE, C_REG, C_NONE, 16, 4, 0, 0},
{ASLLV, C_SCON, C_REG, C_NONE, C_REG, C_NONE, 16, 4, 0, 0},
{ASLLV, C_SCON, C_NONE, C_NONE, C_REG, C_NONE, 16, 4, 0, 0},
{ASLLV, C_U6CON, C_REG, C_NONE, C_REG, C_NONE, 16, 4, 0, 0},
{ASLLV, C_U6CON, C_NONE, C_NONE, C_REG, C_NONE, 16, 4, 0, 0},
{ABSTRPICKW, C_SCON, C_REG, C_SCON, C_REG, C_NONE, 17, 4, 0, 0},
{ABSTRPICKW, C_SCON, C_REG, C_ZCON, C_REG, C_NONE, 17, 4, 0, 0},
{ABSTRPICKW, C_U6CON, C_REG, C_U6CON, C_REG, C_NONE, 17, 4, 0, 0},
{ABSTRPICKW, C_U6CON, C_REG, C_ZCON, C_REG, C_NONE, 17, 4, 0, 0},
{ABSTRPICKW, C_ZCON, C_REG, C_ZCON, C_REG, C_NONE, 17, 4, 0, 0},
{ASYSCALL, C_NONE, C_NONE, C_NONE, C_NONE, C_NONE, 5, 4, 0, 0},
{ASYSCALL, C_ANDCON, C_NONE, C_NONE, C_NONE, C_NONE, 5, 4, 0, 0},
{ASYSCALL, C_U15CON, C_NONE, C_NONE, C_NONE, C_NONE, 5, 4, 0, 0},
{ABEQ, C_REG, C_REG, C_NONE, C_BRAN, C_NONE, 6, 4, 0, 0},
{ABEQ, C_REG, C_NONE, C_NONE, C_BRAN, C_NONE, 6, 4, 0, 0},
@ -303,8 +301,7 @@ var optab = []Optab{
{AMOVV, C_FREG, C_NONE, C_NONE, C_FCCREG, C_NONE, 30, 4, 0, 0},
{AMOVV, C_FCCREG, C_NONE, C_NONE, C_FREG, C_NONE, 30, 4, 0, 0},
{AMOVW, C_ADDCON, C_NONE, C_NONE, C_FREG, C_NONE, 34, 8, 0, 0},
{AMOVW, C_ANDCON, C_NONE, C_NONE, C_FREG, C_NONE, 34, 8, 0, 0},
{AMOVW, C_12CON, C_NONE, C_NONE, C_FREG, C_NONE, 34, 8, 0, 0},
{AMOVB, C_REG, C_NONE, C_NONE, C_TLS_IE, C_NONE, 56, 16, 0, 0},
{AMOVW, C_REG, C_NONE, C_NONE, C_TLS_IE, C_NONE, 56, 16, 0, 0},
@ -318,13 +315,13 @@ var optab = []Optab{
{AMOVBU, C_TLS_IE, C_NONE, C_NONE, C_REG, C_NONE, 57, 16, 0, 0},
{AMOVWU, C_TLS_IE, C_NONE, C_NONE, C_REG, C_NONE, 57, 16, 0, 0},
{AWORD, C_LCON, C_NONE, C_NONE, C_NONE, C_NONE, 38, 4, 0, 0},
{AWORD, C_32CON, C_NONE, C_NONE, C_NONE, C_NONE, 38, 4, 0, 0},
{AWORD, C_DCON, C_NONE, C_NONE, C_NONE, C_NONE, 61, 4, 0, 0},
{AMOVV, C_GOTADDR, C_NONE, C_NONE, C_REG, C_NONE, 65, 8, 0, 0},
{ATEQ, C_SCON, C_REG, C_NONE, C_REG, C_NONE, 15, 8, 0, 0},
{ATEQ, C_SCON, C_NONE, C_NONE, C_REG, C_NONE, 15, 8, 0, 0},
{ATEQ, C_US12CON, C_REG, C_NONE, C_REG, C_NONE, 15, 8, 0, 0},
{ATEQ, C_US12CON, C_NONE, C_NONE, C_REG, C_NONE, 15, 8, 0, 0},
{ARDTIMELW, C_NONE, C_NONE, C_NONE, C_REG, C_REG, 62, 4, 0, 0},
{AAMSWAPW, C_REG, C_NONE, C_NONE, C_ZOREG, C_REG, 66, 4, 0, 0},
@ -364,13 +361,13 @@ var optab = []Optab{
{AVMOVQ, C_ELEM, C_NONE, C_NONE, C_ARNG, C_NONE, 45, 4, 0, 0},
{obj.APCALIGN, C_SCON, C_NONE, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0},
{obj.APCDATA, C_LCON, C_NONE, C_NONE, C_LCON, C_NONE, 0, 0, 0, 0},
{obj.APCALIGN, C_U12CON, C_NONE, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0},
{obj.APCDATA, C_32CON, C_NONE, C_NONE, C_32CON, C_NONE, 0, 0, 0, 0},
{obj.APCDATA, C_DCON, C_NONE, C_NONE, C_DCON, C_NONE, 0, 0, 0, 0},
{obj.AFUNCDATA, C_SCON, C_NONE, C_NONE, C_ADDR, C_NONE, 0, 0, 0, 0},
{obj.AFUNCDATA, C_U12CON, C_NONE, C_NONE, C_ADDR, C_NONE, 0, 0, 0, 0},
{obj.ANOP, C_NONE, C_NONE, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0},
{obj.ANOP, C_LCON, C_NONE, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0}, // nop variants, see #40689
{obj.ANOP, C_DCON, C_NONE, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0}, // nop variants, see #40689
{obj.ANOP, C_32CON, C_NONE, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0}, // nop variants, see #40689
{obj.ANOP, C_DCON, C_NONE, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0}, // nop variants, see #40689
{obj.ANOP, C_REG, C_NONE, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0},
{obj.ANOP, C_FREG, C_NONE, C_NONE, C_NONE, C_NONE, 0, 0, 0, 0},
{obj.ADUFFZERO, C_NONE, C_NONE, C_NONE, C_BRAN, C_NONE, 11, 4, 0, 0}, // same as AJMP
@ -812,34 +809,45 @@ func (c *ctxt0) aclass(a *obj.Addr) int {
}
if c.instoffset >= 0 {
if c.instoffset == 0 {
return C_ZCON
sbits := bits.Len64(uint64(c.instoffset))
switch {
case sbits <= 8:
return C_ZCON + sbits
case sbits <= 12:
if c.instoffset <= 0x7ff {
return C_US12CON
}
return C_U12CON
case sbits <= 13:
if c.instoffset&0xfff == 0 {
return C_U13CON20_0
}
return C_U13CON
case sbits <= 15:
if c.instoffset&0xfff == 0 {
return C_U15CON20_0
}
return C_U15CON
}
if c.instoffset <= 0x7ff {
return C_SCON
} else {
sbits := bits.Len64(uint64(^c.instoffset))
switch {
case sbits < 5:
return C_S5CON
case sbits < 12:
return C_S12CON
case sbits < 13:
if c.instoffset&0xfff == 0 {
return C_S13CON20_0
}
return C_S13CON
}
if c.instoffset <= 0xfff {
return C_ANDCON
}
if c.instoffset&0xfff == 0 && isuint32(uint64(c.instoffset)) { // && ((instoffset & (1<<31)) == 0)
return C_UCON
}
if isint32(c.instoffset) || isuint32(uint64(c.instoffset)) {
return C_LCON
}
return C_LCON
}
if c.instoffset >= -0x800 {
return C_ADDCON
if c.instoffset&0xfff == 0 {
return C_32CON20_0
}
if c.instoffset&0xfff == 0 && isint32(c.instoffset) {
return C_UCON
}
if isint32(c.instoffset) {
return C_LCON
}
return C_LCON
return C_32CON
case obj.TYPE_BRANCH:
return C_BRAN
@ -1085,10 +1093,11 @@ func (c *ctxt0) oplook(p *obj.Prog) *Optab {
ops := oprange[p.As&obj.AMask]
c1 := &xcmp[a1]
c3 := &xcmp[a3]
c4 := &xcmp[a4]
for i := range ops {
op := &ops[i]
if (int(op.reg) == a2) && int(op.from3) == a3 && c1[op.from1] && c4[op.to1] && (int(op.to2) == a5) {
if (int(op.reg) == a2) && c3[op.from3] && c1[op.from1] && c4[op.to1] && (int(op.to2) == a5) {
p.Optab = uint16(cap(optab) - cap(ops) + i + 1)
return op
}
@ -1106,23 +1115,47 @@ func cmp(a int, b int) bool {
}
switch a {
case C_DCON:
if b == C_LCON || b == C_DCON32_0 ||
b == C_DCON12_0 || b == C_DCON20S_0 ||
b == C_DCON12_20S || b == C_DCON12_12S ||
b == C_DCON20S_20 || b == C_DCON32_20 ||
b == C_DCON20S_12S || b == C_DCON32_12S ||
b == C_DCON12_32S || b == C_DCON20S_32 ||
b == C_DCON12_12U || b == C_DCON20S_12U ||
b == C_DCON32_12U {
return true
}
fallthrough
case C_LCON:
if b == C_ZCON || b == C_SCON || b == C_UCON || b == C_ADDCON || b == C_ANDCON {
return true
}
case C_DCON12_0:
return cmp(C_32CON, b) || cmp(C_DCON12_20S, b) || cmp(C_DCON32_12S, b) || b == C_DCON12_0
case C_32CON:
return cmp(C_32CON20_0, b) || cmp(C_U15CON, b) || cmp(C_13CON, b) || cmp(C_12CON, b)
case C_32CON20_0:
return b == C_U15CON20_0 || b == C_U13CON20_0 || b == C_S13CON20_0 || b == C_ZCON
case C_U15CON:
return cmp(C_U12CON, b) || b == C_U15CON20_0 || b == C_U13CON20_0 || b == C_U13CON
case C_13CON:
return cmp(C_U13CON, b) || cmp(C_S13CON, b)
case C_U13CON:
return cmp(C_12CON, b) || b == C_U13CON20_0
case C_S13CON:
return cmp(C_12CON, b) || b == C_S13CON20_0
case C_12CON:
return cmp(C_U12CON, b) || cmp(C_S12CON, b)
case C_UU12CON:
return cmp(C_U12CON, b)
case C_U12CON:
return cmp(C_U8CON, b) || b == C_US12CON
case C_U8CON:
return cmp(C_U7CON, b)
case C_U7CON:
return cmp(C_U6CON, b)
case C_U6CON:
return cmp(C_U5CON, b)
case C_U5CON:
return cmp(C_U4CON, b)
case C_U4CON:
return cmp(C_U3CON, b)
case C_U3CON:
return cmp(C_U2CON, b)
case C_U2CON:
return cmp(C_U1CON, b)
case C_U1CON:
return cmp(C_ZCON, b)
case C_US12CON:
return cmp(C_S12CON, b)
case C_S12CON:
return cmp(C_S5CON, b) || cmp(C_U8CON, b) || b == C_US12CON
case C_S5CON:
return cmp(C_ZCON, b) || cmp(C_U4CON, b)
case C_DCON12_20S:
if b == C_DCON20S_20 || b == C_DCON12_12S ||
@ -1138,62 +1171,20 @@ func cmp(a int, b int) bool {
return true
}
case C_ADD0CON:
if b == C_ADDCON {
return true
}
fallthrough
case C_ADDCON:
if b == C_ZCON || b == C_SCON {
return true
}
case C_AND0CON:
if b == C_ANDCON {
return true
}
fallthrough
case C_ANDCON:
if b == C_ZCON || b == C_SCON {
return true
}
case C_UCON:
if b == C_ZCON {
return true
}
case C_SCON:
if b == C_ZCON {
return true
}
case C_LACON:
if b == C_SACON {
return true
}
return b == C_SACON
case C_LAUTO:
if b == C_SAUTO {
return true
}
return b == C_SAUTO
case C_REG:
if b == C_ZCON {
return true
}
return b == C_ZCON
case C_LOREG:
if b == C_ZOREG || b == C_SOREG {
return true
}
return b == C_ZOREG || b == C_SOREG
case C_SOREG:
if b == C_ZOREG {
return true
}
return b == C_ZOREG
}
return false
@ -1615,7 +1606,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) {
r = int(o.param)
}
a := add
if o.from1 == C_ANDCON {
if o.from1 == C_12CON && v > 0 {
a = AOR
}
@ -1891,7 +1882,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) {
case 34: // mov $con,fr
v := c.regoff(&p.From)
a := AADDU
if o.from1 == C_ANDCON {
if v > 0 {
a = AOR
}
a2 := c.specialFpMovInst(p.As, C_REG, oclass(&p.To))

30
src/cmd/internal/obj/loong64/cnames.go
View file

@ -14,13 +14,29 @@ var cnames0 = []string{
"ARNG",
"ELEM",
"ZCON",
"SCON",
"UCON",
"ADD0CON",
"AND0CON",
"ADDCON",
"ANDCON",
"LCON",
"U1CON",
"U2CON",
"U3CON",
"U4CON",
"U5CON",
"U6CON",
"U7CON",
"U8CON",
"S5CON",
"US12CON",
"UU12CON",
"S12CON",
"U12CON",
"12CON",
"S13CON20_0",
"S13CON",
"U13CON20_0",
"U13CON",
"13CON",
"U15CON",
"U15CON20_0",
"32CON20_0",
"32CON",
"DCON20S_0",
"DCON12_0",
"DCON32_0",