cmd/asm: refactor some operands that are not special registers on arm64

The previous code treats some operands such as EQ, LT, etc. as special
registers. However, they are not. This CL adds a new AddrType TYPE_SPOPD
and a new class C_SPOPD to support this kind of special operands, and
refactors the relevant code.

This patch is a copy of CL 260861, contributed by Junchen Li(junchen.li@arm.com).

Co-authored-by: Junchen Li(junchen.li@arm.com)
Change-Id: I57b28da458ee3332f610602632e7eda03af435f5
Reviewed-on: https://go-review.googlesource.com/c/go/+/302849
Reviewed-by: Cherry Mui <cherryyz@google.com>
Trust: Eric Fang <eric.fang@arm.com>
Run-TryBot: Eric Fang <eric.fang@arm.com>
TryBot-Result: Gopher Robot <gobot@golang.org>

src/cmd/internal/obj/util.go

@@ -363,6 +363,9 @@ func writeDconv(w io.Writer, p *Prog, a *Addr, abiDetail bool) {
 
 	case TYPE_REGLIST:
 		io.WriteString(w, RLconv(a.Offset))
+
+	case TYPE_SPECIAL:
+		io.WriteString(w, SPCconv(a.Offset))
 	}
 }
 
@@ -575,6 +578,33 @@ func RLconv(list int64) string {
 	return fmt.Sprintf("RL???%d", list)
 }
 
+// Special operands
+type spcSet struct {
+	lo      int64
+	hi      int64
+	SPCconv func(int64) string
+}
+
+var spcSpace []spcSet
+
+// RegisterSpecialOperands binds a pretty-printer (SPCconv) for special
+// operand numbers to a given special operand number range. Lo is inclusive,
+// hi is exclusive (valid special operands are lo through hi-1).
+func RegisterSpecialOperands(lo, hi int64, rlconv func(int64) string) {
+	spcSpace = append(spcSpace, spcSet{lo, hi, rlconv})
+}
+
+// SPCconv returns the string representation of the special operand spc.
+func SPCconv(spc int64) string {
+	for i := range spcSpace {
+		spcs := &spcSpace[i]
+		if spcs.lo <= spc && spc < spcs.hi {
+			return spcs.SPCconv(spc)
+		}
+	}
+	return fmt.Sprintf("SPC???%d", spc)
+}
+
 type opSet struct {
 	lo    As
 	names []string