cmd/internal/obj/mips: added support for GOARCH=mips64{,le}

MIPS64 has 32 general purpose 64-bit integer registers (R0-R31), 32
64-bit floating point registers (F0-F31). Instructions are fixed-width,
and are 32-bit wide. Instructions are all in standard 1-, 2-, 3-operand
forms.

MIPS64-specific relocations are added. For this reason, test data of
cmd/newlink are regenerated.

No other changes are made to portable structures.

Branch delay slots are current filled with NOP instructions. The function
for instruction scheduling (try to fill the delay slot with a useful
instruction) is implemented but disabled for now.

Change-Id: Ic364999c7a33245260c1381fc26a2fa8972d38b3
Reviewed-on: https://go-review.googlesource.com/14442
Reviewed-by: Minux Ma <minux@golang.org>
This commit is contained in:
Yao Zhang 2015-09-10 11:13:00 -04:00 committed by Minux Ma
parent a9bebd91c9
commit fa6a1ecd63
14 changed files with 2207 additions and 3549 deletions

View file

@ -524,11 +524,12 @@ var regSpace []regSet
const (
// Because of masking operations in the encodings, each register
// space should start at 0 modulo some power of 2.
RBase386 = 1 * 1024
RBaseAMD64 = 2 * 1024
RBaseARM = 3 * 1024
RBasePPC64 = 4 * 1024 // range [4k, 8k)
RBaseARM64 = 8 * 1024 // range [8k, 12k)
RBase386 = 1 * 1024
RBaseAMD64 = 2 * 1024
RBaseARM = 3 * 1024
RBasePPC64 = 4 * 1024 // range [4k, 8k)
RBaseARM64 = 8 * 1024 // range [8k, 13k)
RBaseMIPS64 = 13 * 1024 // range [13k, 16k)
)
// RegisterRegister binds a pretty-printer (Rconv) for register
@ -588,6 +589,7 @@ const (
ABaseAMD64
ABasePPC64
ABaseARM64
ABaseMIPS64
AMask = 1<<12 - 1 // AND with this to use the opcode as an array index.
)