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Author SHA1 Message Date
limeidan
4f7bbc62c7 runtime, cmd/compile, cmd/internal/obj: remove duff support for loong64 
Change-Id: I44d6452933c8010f7dfbf821a32053f9d1cf151e
Reviewed-on: https://go-review.googlesource.com/c/go/+/700096
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Keith Randall <khr@golang.org>
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Michael Pratt <mpratt@google.com>
Reviewed-by: Keith Randall <khr@google.com>
Auto-Submit: Michael Pratt <mpratt@google.com>
 2025-09-04 09:24:12 -07:00
Xiaolin Zhao
b8cc907425 cmd/internal/obj/loong64: fix the usage of offset in the instructions [X]VLDREPL.{B/H/W/D} 
The previously defined usage of offset was ambiguous and not easy to understand.
For example, to fetch 4 bytes of data from the address base+8 and
broadcast it to each word element of vector register V5, the assembly
implementation is as follows:
	previous: VMOVQ 2(base), V5.W4
	current:  VMOVQ 8(base), V5.W4

Change-Id: I8bc84e35033ab63bd10f4c61618789f94314f78c
Reviewed-on: https://go-review.googlesource.com/c/go/+/699875
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: Michael Pratt <mpratt@google.com>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Auto-Submit: Michael Pratt <mpratt@google.com>
Reviewed-by: Meidan Li <limeidan@loongson.cn>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
 2025-09-04 09:22:33 -07:00
Xiaolin Zhao
882335e2cb cmd/internal/obj/loong64: add LDPTR.{W/D} and STPTR.{W/D} instructions support 
Go asm syntax:
	MOVWP		4(R4), R5
	MOVVP		8(R4), R5
	MOVWP		R4, 12(R5)
	MOVVP		R4, 16(R5)

Equivalent platform assembler syntax:
	ldptr.w		r5, r4, $1
	ldptr.d		r5, r4, $2
	stptr.w		r4, r5, $3
	stptr.d		r4, r5, $4

Change-Id: I50a341cee2d875cb7c5da9db08b23799c9dc6c64
Reviewed-on: https://go-review.googlesource.com/c/go/+/699055
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Meidan Li <limeidan@loongson.cn>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Carlos Amedee <carlos@golang.org>
Reviewed-by: Cherry Mui <cherryyz@google.com>
 2025-08-31 18:33:38 -07:00
Xiaolin Zhao
6b837a64db cmd/internal/obj/loong64: simplify buildop 
The length of array optab is readily available, remove the sentinel and
sentinel scan, like arm64.

Change-Id: Iceeed22587ce2beeedeb5babdde3474e75d70f89
Reviewed-on: https://go-review.googlesource.com/c/go/+/699095
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Carlos Amedee <carlos@golang.org>
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: Meidan Li <limeidan@loongson.cn>
 2025-08-27 19:53:35 -07:00
limeidan
90b7d7aaa2 cmd/compile/internal: optimize multiplication use new operation 'ADDshiftLLV' on loong64 
goos: linux
goarch: loong64
pkg: cmd/compile/internal/test
cpu: Loongson-3A6000-HV @ 2500.00MHz
                  │     old      │                 new                  │
                  │    sec/op    │    sec/op     vs base                │
MulconstI32/3       0.8004n ± 0%   0.4247n ± 2%  -46.94% (p=0.000 n=10)
MulconstI32/5       0.8005n ± 0%   0.4256n ± 1%  -46.83% (p=0.000 n=10)
MulconstI32/12      1.2010n ± 0%   0.8005n ± 0%  -33.35% (p=0.000 n=10)
MulconstI32/120     0.8090n ± 0%   0.8067n ± 0%   -0.28% (p=0.007 n=10)
MulconstI32/-120    0.8109n ± 0%   0.8072n ± 0%   -0.47% (p=0.000 n=10)
MulconstI32/65537   0.8004n ± 0%   0.8004n ± 0%        ~ (p=1.000 n=10)
MulconstI32/65538   0.8005n ± 0%   0.8005n ± 0%        ~ (p=0.265 n=10)
MulconstI64/3       0.8005n ± 0%   0.4241n ± 1%  -47.02% (p=0.000 n=10)
MulconstI64/5       0.8004n ± 0%   0.4249n ± 1%  -46.91% (p=0.000 n=10)
MulconstI64/12      1.2010n ± 0%   0.8004n ± 0%  -33.36% (p=0.000 n=10)
MulconstI64/120     0.8005n ± 0%   0.8005n ± 0%        ~ (p=0.635 n=10)
MulconstI64/-120    0.8005n ± 0%   0.8005n ± 0%        ~ (p=0.837 n=10)
MulconstI64/65537   0.8005n ± 0%   0.8005n ± 0%        ~ (p=0.837 n=10)
MulconstI64/65538   0.8096n ± 0%   0.8004n ± 0%   -1.14% (p=0.000 n=10)
MulconstU32/3       0.8004n ± 0%   0.4263n ± 1%  -46.75% (p=0.000 n=10)
MulconstU32/5       0.8005n ± 0%   0.4262n ± 1%  -46.76% (p=0.000 n=10)
MulconstU32/12      1.2010n ± 0%   0.8005n ± 0%  -33.35% (p=0.000 n=10)
MulconstU32/120     0.8105n ± 0%   0.8096n ± 0%        ~ (p=0.183 n=10)
MulconstU32/65537   0.8004n ± 0%   0.8004n ± 0%        ~ (p=1.000 n=10)
MulconstU32/65538   0.8005n ± 0%   0.8005n ± 0%        ~ (p=1.000 n=10)
MulconstU64/3       0.8004n ± 0%   0.4265n ± 4%  -46.71% (p=0.000 n=10)
MulconstU64/5       0.8004n ± 0%   0.4256n ± 0%  -46.82% (p=0.000 n=10)
MulconstU64/12      1.2010n ± 0%   0.8004n ± 0%  -33.36% (p=0.000 n=10)
MulconstU64/120     0.8005n ± 0%   0.8005n ± 0%        ~ (p=0.387 n=10)
MulconstU64/65537   0.8005n ± 0%   0.8005n ± 0%        ~ (p=0.265 n=10)
MulconstU64/65538   0.8080n ± 0%   0.8004n ± 0%   -0.93% (p=0.000 n=10)
geomean             0.8539n        0.6597n       -22.74%

Change-Id: Ie33e88985d7639f481bbba540bc917b9f185c357
Reviewed-on: https://go-review.googlesource.com/c/go/+/693855
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
Reviewed-by: Keith Randall <khr@google.com>
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
 2025-08-12 23:01:49 -07:00
limeidan
73ff6d1480 cmd/internal/obj/loong64: change the immediate range of ALSL{W/WU/V} 
When executing the alsl.w/wu/d family of instructions, the actual shift amount is the immediate value
in the instruction encoding plus one. Therefore, this change is made to align the immediate value
in the assembly code with the programmer's intended shift amount, and to include the result of
the immediate value minus one in the final encoding.

Change-Id: Ic82249251878eabde8372e183d841a03f963f9f9
Reviewed-on: https://go-review.googlesource.com/c/go/+/693475
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
Reviewed-by: Mark Freeman <markfreeman@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
 2025-08-07 19:04:41 -07:00
Xiaolin Zhao
ee7bb8969a cmd/internal/obj/loong64: add support for FSEL instruction 
Go asm syntax:
	FSEL	FCC, FK, FJ, FD

Equivalent platform assembler syntax:
	fsel	fd, fj, fk, ca

Change-Id: If75f16fca0adfc03f4952f8a5143d22da33ed425
Reviewed-on: https://go-review.googlesource.com/c/go/+/693457
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Meidan Li <limeidan@loongson.cn>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
Reviewed-by: Mark Freeman <markfreeman@google.com>
 2025-08-07 19:04:20 -07:00
limeidan
4c7362e41c cmd/internal/obj/loong64: add new instructions ALSL{W/WU/V} for loong64 
Go asm syntax:
	ALSL{W/WU/V}	$3, R4, R5, R6

Equivalent platform assembler syntax:
	alsl.{w/wu/d}	$r6, $r4, $r5, 3

Change-Id: Ic8364dfe2753bcea7de6cffe656ca0dde6875766
Reviewed-on: https://go-review.googlesource.com/c/go/+/692136
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Mark Freeman <markfreeman@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
 2025-08-05 18:02:17 -07:00
qiulaidongfeng
4ee0df8c46 cmd: remove dead code 
Fixes #74076

Change-Id: Icc67b3d4e342f329584433bd1250c56ae8f5a73d
Reviewed-on: https://go-review.googlesource.com/c/go/+/690635
Reviewed-by: Alan Donovan <adonovan@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Commit-Queue: Alan Donovan <adonovan@google.com>
Reviewed-by: Keith Randall <khr@golang.org>
Reviewed-by: Keith Randall <khr@google.com>
Auto-Submit: Alan Donovan <adonovan@google.com>
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
 2025-08-05 10:31:25 -07:00
Xiaolin Zhao
b2960e3580 cmd/internal/obj/loong64: add {V,XV}{BITCLR/BITSET/BITREV}[I].{B/H/W/D} instructions support 
Go asm syntax:
	 V{BITCLR/BITSET/BITREV}{B/H/W/V}	$1, V2, V3
	XV{BITCLR/BITSET/BITREV}{B/H/W/V}	$1, X2, X3
	 V{BITCLR/BITSET/BITREV}{B/H/W/V}	VK, VJ, VD
	XV{BITCLR/BITSET/BITREV}{B/H/W/V}	XK, XJ, XD

Equivalent platform assembler syntax:
	 v{bitclr/bitset/bitrev}i.{b/h/w/d}	v3, v2, $1
	xv{bitclr/bitset/bitrev}i.{b/h/w/d}	x3, x2, $1
	 v{bitclr/bitset/bitrev}.{b/h/w/d}	vd, vj, vk
	xv{bitclr/bitset/bitrev}.{b/h/w/d}	xd, xj, xk

Change-Id: I244f8ae316f72cc7ea01ca0139ac78c5616a3c5b
Reviewed-on: https://go-review.googlesource.com/c/go/+/677435
Reviewed-by: Cherry Mui <cherryyz@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Mark Freeman <mark@golang.org>
 2025-08-03 18:26:56 -07:00
Xiaolin Zhao
d44749b65b cmd/internal/obj/loong64: add [X]VLDREPL.{B/H/W/D} instructions support 
Go asm syntax:
	 VMOVQ	offset(Rj), Vd.<T>
	XVMOVQ	offset(Rj), Xd.<T>

<T> can have the following values:
B16, H8, W4, V2, B32, H16, W8, V4

Change-Id: I44af51d58bb62649d3fe360b3abb771565e78a8a
Reviewed-on: https://go-review.googlesource.com/c/go/+/682895
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
Reviewed-by: Meidan Li <limeidan@loongson.cn>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Mark Freeman <mark@golang.org>
 2025-08-03 18:25:27 -07:00
Guoqi Chen
045b5c1bfb cmd/internal/obj/loong64: change the plan9 format of the prefetch instruction PRELDX 
before:
    MOVV    $n + $offset, Roff
    PRELDX  (Rbase)(Roff), $hint
after:
    PRELDX  offset(Rbase), $n, $hint

This instruction is supported in CL 671875, but is not actually used

Change-Id: I943d488ea6dc77781cd796ef480a89fede666bab
Reviewed-on: https://go-review.googlesource.com/c/go/+/673155
Reviewed-by: Meidan Li <limeidan@loongson.cn>
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
 2025-05-15 22:00:16 -07:00
Xiaolin Zhao
c62099cfac cmd/intarnal/obj: add new assembly format for VANDV and VANDB on loong64 
In order to make it easier to write in assembly and to be consistent
with the usage of general instructions, a new assembly format is
added for the instructions VANDV and VANDB.

It also works for instructions XVAND{V,B}, [X]V{OR,XOR,NOR,ANDN,ORN}V
and [X]V{OR,XOR,NOR}B.

Change-Id: Ia75d607ac918950e58840ec627aaf0be45d837fe
Reviewed-on: https://go-review.googlesource.com/c/go/+/671316
Reviewed-by: Cherry Mui <cherryyz@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
 2025-05-14 02:30:13 -07:00
Guoqi Chen
3474c52e4b cmd/internal/obj/loong64: Add preld{,x} instructions support 
Go asm syntax:
	PRELD	16(R4), $8
	PRELDX	(R4)(R5), $8

Equivalent platform assembler syntax:
	preld	$8, $r4, 16
	preldx	$8, $r4, $r5

Change-Id: Ie81d22ebaf4153388a7e9d8fa0f618a0ae7a1c9f
Reviewed-on: https://go-review.googlesource.com/c/go/+/671875
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
Reviewed-by: Meidan Li <limeidan@loongson.cn>
Reviewed-by: Cherry Mui <cherryyz@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
 2025-05-12 17:41:20 -07:00
Xiaolin Zhao
f49ca5f525 cmd/internal/obj/loong64: add [X]VFCLASS.{S/D} instructions 
Go asm syntax:
	 VFCLASS{F/D}	VJ, VD
	XVFCLASS{F/D}	XJ, XD

Equivalent platform assembler syntax:
	 vfclass.{s/d}	vd, vj
	xvfclass.{s/d}	xd, xj

Change-Id: Iec373f393be315696d1fefc747a4a5882f993195
Reviewed-on: https://go-review.googlesource.com/c/go/+/670256
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: Dustin Turner <dustin.turner44@gmail.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Carlos Amedee <carlos@golang.org>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
 2025-05-11 19:39:22 -07:00
Xiaolin Zhao
d65c209b4b cmd/internal/obj/loong64: add [X]VF{ADD/SUB/MUL/DIV}.{S/D} instructions 
Go asm syntax:
	 V{ADD/SUB/MUL/DIV}{F/D}	VK, VJ, VD
	XV{ADD/SUB/MUL/DIV}{F/D}	XK, XJ, XD

Equivalent platform assembler syntax:
	 vf{add/sub/mul/div}.{s/d}	vd, vj, vk
	xvf{add/sub/mul/div}.{s/d}	xd, xj, xk

Change-Id: I4607884212167ac97d7b6448ea3c849fc0fdd506
Reviewed-on: https://go-review.googlesource.com/c/go/+/670255
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Carlos Amedee <carlos@golang.org>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
 2025-05-08 17:40:23 -07:00
Xiaolin Zhao
d13da63929 cmd/internal/obj/loong64: add [X]VFRINT[{RNE/RZ/RP/RM}].{S/D} instructions 
Go asm syntax:
	 VFRINT[{RNE/RZ/RP/RM}]{F/D}	VJ, VD
	XVFRINT[{RNE/RZ/RP/RM}]{F/D}	XJ, XD

Equivalent platform assembler syntax:
	 vfrint[{rne/rz/rp/rm}].{s/d}	vd, vj
	xvfrint[{rne/rz/rp/rm}].{s/d}	xd, xj

Change-Id: I4ed8782289ae3329d675239f799d5f75b1adc4ad
Reviewed-on: https://go-review.googlesource.com/c/go/+/670235
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Cherry Mui <cherryyz@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Carlos Amedee <carlos@golang.org>
 2025-05-07 18:00:08 -07:00
Guoqi Chen
fb2c88147d cmd/internal/obj: add new assembly format for BFPT and BFPF on loong64 
On loong64, BFPT and BFPF are mapped to the platform assembly as follows:

   Go asm syntax:
        BFPT   FCCx, offs21
        BFPF   FCCx, offs21
   Equivalent platform assembler syntax:
        bcnez  cj, offs21
        bceqz  cj, offs21

If the condition register is not specified, it defaults to FCC0.

Change-Id: I2cc3df62a9c55d4b5eb124789358983c6737319c
Reviewed-on: https://go-review.googlesource.com/c/go/+/667456
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
Reviewed-by: Junyang Shao <shaojunyang@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Meidan Li <limeidan@loongson.cn>
 2025-04-24 18:28:42 -07:00
limeidan
005d7f29d1 cmd/internal/obj/loong64: add support for {V,XV}SET{EQ,NE}Z.V series instructions 
Change-Id: If3794dfde3ff461662c8a493ff51d0c779e81bca
Reviewed-on: https://go-review.googlesource.com/c/go/+/664795
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Michael Pratt <mpratt@google.com>
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
 2025-04-15 04:54:50 -07:00
Xiaolin Zhao
0095b5d098 cmd/internal/obj/loong64: add [X]VSHUF4I.{B/H/W/D} instructions support 
Go asm syntax:
	 VSHUF4I{B/H/W/V}	$1, V1, V2
	XVSHUF4I{B/H/W/V}	$2, X1, X2

Equivalent platform assembler syntax:
	 vshuf4i.{b/h/w/d}	v2, v1, $1
	xvshuf4i.{b/h/w/d}	x2, x1, $2

Change-Id: I6a847ccbd2c93432d87bd1390b5cf1508da06496
Reviewed-on: https://go-review.googlesource.com/c/go/+/658376
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
 2025-03-25 18:02:50 -07:00
Xiaolin Zhao
ac8474c0a2 cmd/internal/obj/loong64: add [X]VMULW{EV/OD} series instructions support 
Go asm syntax:
	 VMULW{EV/OD}{HB/WH/VW/QV}[U]		VK, VJ, VD
	XVMULW{EV/OD}{HB/WH/VW/QV}[U]		XK, XJ, XD
	 VMULW{EV/OD}{HBUB/WHUH/VWUW/QVUV}	VK, VJ, VD
	XVMULW{EV/OD}{HBUB/WHUH/VWUW/QVUV}	XK, XJ, XD

Equivalent platform assembler syntax:
	 vmulw{ev/od}.{h.b/w.h/d.w/q.d}[u]		vd, vj, vk
	xvmulw{ev/od}.{h.b/w.h/d.w/q.d}[u]		xd, xj, xk
	 vmulw{ev/od}.{h.bu.b/w.hu.h/d.wu.w/q.du.d}	vd, vj, vk
	xvmulw{ev/od}.{h.bu.b/w.hu.h/d.wu.w/q.du.d}	xd, xj, xk

Change-Id: Ib1b5fb9605417a2b81841deae40e0e2beb90d03c
Reviewed-on: https://go-review.googlesource.com/c/go/+/658375
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: David Chase <drchase@google.com>
 2025-03-25 05:49:58 -07:00
Xiaolin Zhao
f41fdd962d cmd/internal/obj/loong64: add {V,XV}NEG{B/H/W/V} instructions support 
Go asm syntax:
	 VNEG{B/H/W/V}		VJ, VD
	XVNEG{B/H/W/V}		XJ, XD

Equivalent platform assembler syntax:
	 vneg.{b/h/w/d}		vd, vj
	xvneg.{b/h/w/d}		xd, xj

Change-Id: Ie0a82a434b0ffbcb77425a65b96eff56e030028c
Reviewed-on: https://go-review.googlesource.com/c/go/+/635935
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: David Chase <drchase@google.com>
 2025-03-16 20:39:28 -07:00
Xiaolin Zhao
80f068928f cmd/internal/obj/loong64: add {V,XV}{FSQRT/FRECIP/FRSQRT}.{S/D} instructions support 
Go asm syntax:
	 V{FSQRT/FRECIP/FRSQRT}{F/D}	VJ, VD
	XV{FSQRT/FRECIP/FRSQRT}{F/D}	XJ, XD

Equivalent platform assembler syntax:
	 v{fsqrt/frecip/frsqrt}.{s/d}	vd, vj
	xv{fsqrt/frecip/frsqrt}.{s/d}	xd, xj

Change-Id: I3fdbe3193659d7532164451b087ccf725053172f
Reviewed-on: https://go-review.googlesource.com/c/go/+/636395
Reviewed-by: David Chase <drchase@google.com>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Junyang Shao <shaojunyang@google.com>
 2025-03-13 17:18:49 -07:00
Xiaolin Zhao
b10c35945d cmd/internal/obj/loong64: add {V,XV}DIV{B/H/W/V}[U] and {V,XV}MOD{B/H/W/V}[U] instructions support 
Go asm syntax:
	 VDIV{B/H/W/V}[U]	VK, VJ, VD
	XVDIV{B/H/W/V}[U]	XK, XJ, XD
	 VMOD{B/H/W/V}[U]	VK, VJ, VD
	XVMOD{B/H/W/V}[U]	XK, XJ, XD

Equivalent platform assembler syntax:
	 vdiv.{b/h/w/d}[u]	vd, vj, vk
	xvdiv.{b/h/w/d}[u]	xd, xj, xk
	 vmod.{b/h/w/d}[u]	vd, vj, vk
	xvmod.{b/h/w/d}[u]	xd, xj, xk

Change-Id: I3676721c3c415de0f2ebbd480ecd1b2400a28dba
Reviewed-on: https://go-review.googlesource.com/c/go/+/636376
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Junyang Shao <shaojunyang@google.com>
Reviewed-by: David Chase <drchase@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
 2025-03-12 17:52:19 -07:00
Xiaolin Zhao
b0e2f185c5 cmd/internal/obj/loong64: add {V,XV}MUL{B/H/W/V} and {V,XV}MUH{B/H/W/V}[U] instructions support 
Go asm syntax:
	 VMUL{B/H/W/V}		VK, VJ, VD
	 VMUH{B/H/W/V}[U]	VK, VJ, VD
	XVMUL{B/H/W/V}		XK, XJ, XD
	XVMUH{B/H/W/V}[U]	XK, XJ, XD

Equivalent platform assembler syntax:
	 vmul.{b/h/w/d}		vd, vj, vk
	 vmuh.{b/h/w/d}[u]	vd, vj, vk
	xvmul.{b/h/w/d}		xd, xj, xk
	xvmuh.{b/h/w/d}[u]	xd, xj, xk

Change-Id: I2f15a5b4b6303a0f82cb85114477f58e1b5fd950
Reviewed-on: https://go-review.googlesource.com/c/go/+/636375
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Auto-Submit: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: David Chase <drchase@google.com>
Reviewed-by: Junyang Shao <shaojunyang@google.com>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
 2025-03-11 14:25:30 -07:00
Guoqi Chen
e3ea8e68fb cmd/internal/obj/loong64: add {V,XV}SEQI, {V,XV}.{AND,OR,XOR,NOR} instructions support 
Go asm syntax:
         VSEQB  $1, V2, V3
        XVSEQB  $2, X2, X3
         V{AND,OR,XOR,NOR}B  $1, V2, V3
        XV{AND,OR,XOR,NOR}B  $1, V2, V3
         V{AND,OR,XOR,NOR,ANDN,ORN}V V1, V2, V3
        XV{AND,OR,XOR,NOR,ANDN,ORN}V V1, V2, V3

Equivalent platform assembler syntax:
         vseqi.b v3, v2, $1
        xvseqi.b x3, x2 ,$2
         v{and,or,xor,nor}.b  v3, v2, $1
        xv{and,or,xor,nor}.b  x3, x2, $1
         v{and,or,xor,nor,andn,orn}v v3, v2, v1
        xv{and,or,xor,nor,andn,orn}v x3, x2, x1

Change-Id: I56ae0db72c7f473755cbdc7f7171c1058a9def97
Reviewed-on: https://go-review.googlesource.com/c/go/+/635515
Reviewed-by: Meidan Li <limeidan@loongson.cn>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Junyang Shao <shaojunyang@google.com>
Reviewed-by: David Chase <drchase@google.com>
 2025-03-10 17:55:19 -07:00
Xiaolin Zhao
53d689ce99 cmd/internal/obj/loong64: add {V,XV}ILV{L/H}.{B/H/W/D} instructions support 
Go asm syntax:
	 VILV{L/H}{B/H/W/V}	VK, VJ, VD
	XVILV{L/H}{B/H/W/V}	XK, XJ, XD

Equivalent platform assembler syntax:
	 vilv{l/h}.{b/h/w/d}	vd, vj, vk
	xvilv{l/h}.{b/h/w/d}	xd, xj, xk

Change-Id: I40e21737649d9fdbbc9a423e859f4c0a56d069fb
Reviewed-on: https://go-review.googlesource.com/c/go/+/635936
Reviewed-by: Junyang Shao <shaojunyang@google.com>
Reviewed-by: Michael Pratt <mpratt@google.com>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Auto-Submit: Junyang Shao <shaojunyang@google.com>
 2025-03-06 08:15:51 -08:00
Xiaolin Zhao
39d7a49736 cmd/internal/obj/loong64: add {V,XV}{ADD/SUB}.{B,H,W,D,Q} and {V,XV}{ADD/SUB}.{B,H,W,D}Uinstructions support 
Go asm syntax:
	 V{ADD/SUB}{B,H,W,V,Q}		VK, VJ, VD
	XV{ADD/SUB}{B,H,W,V,Q}		XK, XJ, XD
	 V{ADD/SUB}{B,H,W,V}U		$1, VJ, VD
	XV{ADD/SUB}{B,H,W,V}U		$1, XJ, XD

Equivalent platform assembler syntax:
	 v{add/sub}.{b,h,w,d,q}		vd, vj, vk
	xv{add/sub}.{b,h,w,d,q}		xd, xj, xk
	 v{add/sub}i.{b,h,w,d}u		vd, vj, $1
	xv{add/sub}i.{b,h,w,d}u		xd, xj, $1

Change-Id: Ia1ef0bc062f4403bb0b1514c2cf1c0264f5d22ee
Reviewed-on: https://go-review.googlesource.com/c/go/+/637795
Reviewed-by: Meidan Li <limeidan@loongson.cn>
Reviewed-by: Junyang Shao <shaojunyang@google.com>
Reviewed-by: Michael Pratt <mpratt@google.com>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
 2025-03-05 18:29:37 -08:00
Xiaolin Zhao
2ce1fb4220 cmd/internal/obj/loong64: add F{MAXA/MINA}.{S/D} instructions 
Go asm syntax:
	F{MAXA/MINA}{F/D}	FK, FJ, FD

Equivalent platform assembler syntax:
	f{maxa/mina}.{s/d}	fd, fj, fk

Ref: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html

Change-Id: I6790657d2f36bdf5e6818b6c0aaa48117e782b8d
Reviewed-on: https://go-review.googlesource.com/c/go/+/653915
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Michael Pratt <mpratt@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Junyang Shao <shaojunyang@google.com>
 2025-03-03 17:01:33 -08:00
Xiaolin Zhao
47fd73a51c cmd/internal/obj/loong64: add {V,XV}{SLL/SRL/SRA/ROTR}[I].{B/H/W/D} instructions support 
Go asm syntax:
	 V{SLL/SRL/SRA/ROTR}{B/H/W/V}	$1, V2, V3
	XV{SLL/SRL/SRA/ROTR}{B/H/W/V}	$1, X2, X3
	 V{SLL/SRL/SRA/ROTR}{B/H/W/V}	VK, VJ, VD
	XV{SLL/SRL/SRA/ROTR}{B/H/W/V}	XK, XJ, XD

Equivalent platform assembler syntax:
	 v{sll/srl/sra/rotr}i.{b/h/w/d}	v3, v2, $1
	xv{sll/srl/sra/rotr}i.{b/h/w/d}	x3, x2, $1
	 v{sll/srl/sra/rotr}.{b/h/w/d}	vd, vj, vk
	xv{sll/srl/sra/rotr}.{b/h/w/d}	xd, xj, xk

Change-Id: Ie4f04de1c77491a71688d226f7d91cd1a699ab47
Reviewed-on: https://go-review.googlesource.com/c/go/+/637775
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Meidan Li <limeidan@loongson.cn>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Junyang Shao <shaojunyang@google.com>
Reviewed-by: Michael Pratt <mpratt@google.com>
 2025-03-03 17:00:29 -08:00
limeidan
f24d2e175e cmd/internal/obj, cmd/asm: reclassify 32-bit immediate value of loong64 
Change-Id: If9fd257ca0837a8c8597889c4f5ed3d4edc602c1
Reviewed-on: https://go-review.googlesource.com/c/go/+/636995
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Junyang Shao <shaojunyang@google.com>
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
Reviewed-by: Michael Pratt <mpratt@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
 2025-02-28 17:10:24 -08:00
limeidan
b9630c56db cmd/internal/obj/loong64: optimize immediate loading 
|        old       |      new                           |
                      |      sec/op      |    sec/op             vs base      |
BinaryTree17               11.08 ± 2%        11.16 ± 1%        ~ (p=0.529 n=10)
Fannkuch11                 2.716 ± 0%        2.737 ± 0%   +0.79% (p=0.000 n=10)
FmtFprintfEmpty           67.37n ± 0%       66.42n ± 0%   -1.41% (p=0.000 n=10)
FmtFprintfString          95.28n ± 0%       90.85n ± 0%   -4.64% (p=0.000 n=10)
FmtFprintfInt             97.69n ± 0%       98.06n ± 0%   +0.38% (p=0.000 n=10)
FmtFprintfIntInt          149.1n ± 0%       147.4n ± 0%   -1.14% (p=0.000 n=10)
FmtFprintfPrefixedInt     223.6n ± 0%       196.5n ± 0%  -12.10% (p=0.000 n=10)
FmtFprintfFloat           290.9n ± 0%       281.6n ± 1%   -3.21% (p=0.000 n=10)
FmtManyArgs               670.6n ± 0%       642.6n ± 0%   -4.18% (p=0.000 n=10)
GobDecode                 10.26m ± 1%       10.23m ± 1%        ~ (p=0.105 n=10)
GobEncode                 12.09m ± 1%       11.94m ± 1%   -1.24% (p=0.000 n=10)
Gzip                      316.9m ± 0%       315.9m ± 0%   -0.32% (p=0.001 n=10)
Gunzip                    65.48m ± 0%       59.77m ± 0%   -8.72% (p=0.000 n=10)
HTTPClientServer          70.36µ ± 0%       68.72µ ± 0%   -2.34% (p=0.000 n=10)
JSONEncode                13.61m ± 1%       13.19m ± 1%   -3.13% (p=0.000 n=10)
JSONDecode                57.52m ± 1%       54.15m ± 1%   -5.86% (p=0.000 n=10)
Mandelbrot200             4.577m ± 0%       4.572m ± 0%   -0.10% (p=0.002 n=10)
GoParse                   6.466m ± 0%       6.363m ± 0%   -1.58% (p=0.000 n=10)
RegexpMatchEasy0_32       89.20n ± 0%       87.72n ± 0%   -1.65% (p=0.000 n=10)
RegexpMatchEasy0_1K       748.6n ± 0%       907.6n ± 0%  +21.22% (p=0.000 n=10)
RegexpMatchEasy1_32       94.14n ± 0%       93.81n ± 0%   -0.35% (p=0.000 n=10)
RegexpMatchEasy1_1K       832.1n ± 0%       953.6n ± 0%  +14.59% (p=0.000 n=10)
RegexpMatchMedium_32      982.7n ± 0%      1018.0n ± 0%   +3.59% (p=0.000 n=10)
RegexpMatchMedium_1K      30.51µ ± 0%       30.00µ ± 0%   -1.65% (p=0.000 n=10)
RegexpMatchHard_32        1.721µ ± 0%       1.664µ ± 0%   -3.34% (p=0.000 n=10)
RegexpMatchHard_1K        50.76µ ± 0%       50.92µ ± 0%   +0.32% (p=0.000 n=10)
Revcomp                   870.5m ± 0%       710.5m ± 0%  -18.38% (p=0.000 n=10)
Template                  93.18m ± 1%       93.67m ± 1%        ~ (p=0.123 n=10)
TimeParse                 309.2n ± 0%       307.8n ± 0%   -0.45% (p=0.000 n=10)
TimeFormat                401.5n ± 0%       394.2n ± 0%   -1.82% (p=0.000 n=10)
geomean                   72.73µ            71.70µ        -1.41%

Change-Id: Id8d342ef3bb82a420434b2b841674683efef67be
Reviewed-on: https://go-review.googlesource.com/c/go/+/620737
Reviewed-by: Cherry Mui <cherryyz@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
 2025-02-20 06:31:35 -08:00
Guoqi Chen
65ba6f94b3 cmd/internal/obj/loong64: add support of VMOVQ and XVMOVQ 
This CL refers to the implementation of ARM64 and adds support for the following
types of SIMD instructions:
1. Move general-purpose register to a vector element, e.g.:
      VMOVQ  Rj, <Vd>.<T>[index]
      <T> can have the following values:
       B, H, W, V
2. Move vector element to general-purpose register, e.g.:
      VMOVQ     <Vj>.<T>[index], Rd
      <T> can have the following values:
       B, BU, H, HU, W, WU, VU
3. Duplicate general-purpose register to vector, e.g.:
      VMOVQ    Rj, <Vd>.<T>
      <T> can have the following values:
       B16, H8, W4, V2, B32, H16, W8, V4
4. Move vector, e.g.:
      XVMOVQ    Xj, <Xd>.<T>
      <T> can have the following values:
       B16, H8, W4, V2, Q1
5. Move vector element to scalar, e.g.:
      XVMOVQ  Xj, <Xd>.<T>[index]
      XVMOVQ  Xj.<T>[index], Xd
      <T> can have the following values:
       W, V
6. Move vector element to vector register, e.g.:
       VMOVQ     <Vn>.<T>[index], Vn.<T>
      <T> can have the following values:
       B, H, W, V

This CL only adds syntax and doesn't break any assembly that already exists.

Change-Id: I7656efac6def54da6c5ae182f39c2a21bfdf92bb
Reviewed-on: https://go-review.googlesource.com/c/go/+/616258
Reviewed-by: David Chase <drchase@google.com>
Reviewed-by: Meidan Li <limeidan@loongson.cn>
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
Reviewed-by: Cherry Mui <cherryyz@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
 2024-11-13 00:56:19 +00:00
Xiaolin Zhao
2b33434287 cmd/asm: use single-instruction forms for all loong64 sign and zero extensions 
8-bit and 16-bit sign extensions and 32-bit zero extensions were realized
with left and right shifts before this change. We now support assembling
EXTWB, EXTWH and BSTRPICKV, so all three can be done with a single insn
respectively.

This patch is a copy of CL 479496.
Co-authored-by: WANG Xuerui <git@xen0n.name>

Change-Id: Iee5741dd9ebb25746f51008f3f6c86704339d615
Reviewed-on: https://go-review.googlesource.com/c/go/+/626195
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: David Chase <drchase@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
 2024-11-08 01:06:04 +00:00
Guoqi Chen
2751443e92 cmd/internal/obj/loong64: add {V,XV}PCNT.{B,H,W,D} instructions support 
Go asm syntax:
          VPCNT{B,H,W,V}  VJ, VD
         XVPCNT{B,H,W,V}  XJ, XD

Equivalent platform assembler syntax:
          vpcnt.{b,w,h,d}  vd, vj
         xvpcnt.{b,w,h,d}  xd, xj

Change-Id: Icec4446b1925745bc3a0bc3f6397d862953b9098
Reviewed-on: https://go-review.googlesource.com/c/go/+/620736
Reviewed-by: Meidan Li <limeidan@loongson.cn>
Reviewed-by: David Chase <drchase@google.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
 2024-11-08 01:05:00 +00:00
Russ Cox
5b20eec8a0 cmd/internal/obj: replace obj.Addrel func with LSym.AddRel method 
The old API was to do

	r := obj.AddRel(sym)
	r.Type = this
	r.Off = that
	etc

The new API is:

	sym.AddRel(ctxt, obj.Reloc{Type: this: Off: that, etc})

This new API is more idiomatic and avoids ever having relocations
that are only partially constructed. Most importantly, it sets up
for sym.AddRel being able to check relocation validity in the future.
(Passing ctxt is for use in validity checking.)

Passes golang.org/x/tools/cmd/toolstash/buildall.

Change-Id: I042ea76e61bb3bf6402f98ca11291a13f4799972
Reviewed-on: https://go-review.googlesource.com/c/go/+/625616
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
 2024-11-07 12:17:10 +00:00
Guoqi Chen
4ce8c0604e cmd/internal/obj/loong64: add {V,XV}SEQ.{B,H,W,D} instructions support 
Go asm syntax:
         VSEQ{B,H,W,V}  VJ, VK, VD
        XVSEQ{B,H,W,V}  XJ, XK, XD

Equivalent platform assembler syntax:
         vseq.{b,w,h,d}  vd, vj, vk
        xvseq.{b,w,h,d}  xd, xj, xk

Change-Id: Ia87277b12c817ebc41a46f4c3d09f4b76995ff2f
Reviewed-on: https://go-review.googlesource.com/c/go/+/616076
Reviewed-by: Meidan Li <limeidan@loongson.cn>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
Reviewed-by: Qiqi Huang <huangqiqi@loongson.cn>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
Reviewed-by: Cherry Mui <cherryyz@google.com>
 2024-11-07 02:20:26 +00:00
Guoqi Chen
751a817ccc cmd/internal/obj/loong64: add {V,XV}LD/{V,XV}LDX/{V,XV}ST/{V,XV}STX instructions support 
This CL adding primitive asm support of Loong64 LSX [1] and LASX [2], by introducing new
sets of register V0-V31 (C_VREG), X0-X31 (C_XREG) and 8 new instructions.

On Loong64, VLD,XVLD,VST,XVST implement vector memory access operations using immediate
values offset. VLDX, XVLDX, VSTX, XVSTX implement vector memory access operations using
register offset.

Go asm syntax:
        VMOVQ           n(RJ), RV      (128bit vector load)
        XVMOVQ          n(RJ), RX      (256bit vector load)
        VMOVQ           RV, n(RJ)      (128bit vector store)
        XVMOVQ          RX, n(RJ)      (256bit vector store)

        VMOVQ           (RJ)(RK), RV   (128bit vector load)
        XVMOVQ          (RJ)(RK), RX   (256bit vector load)
        VMOVQ           RV, (RJ)(RK)   (128bit vector store)
        XVMOVQ          RX, (RJ)(RK)   (256bit vector store)

Equivalent platform assembler syntax:
         vld            vd, rj, si12
        xvld            xd, rj, si12
         vst            vd, rj, si12
        xvst            xd, rj, si12
         vldx           vd, rj, rk
        xvldx           xd, rj, rk
         vstx           vd, rj, rk
        xvstx           xd, rj, rk

[1]: LSX: Loongson SIMD Extension, 128bit
[2]: LASX: Loongson Advanced SIMD Extension, 256bit

Change-Id: Ibaf5ddfd29b77670c3c44cc32bead36b2c8b8003
Reviewed-on: https://go-review.googlesource.com/c/go/+/616075
Reviewed-by: Qiqi Huang <huangqiqi@loongson.cn>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
Reviewed-by: Meidan Li <limeidan@loongson.cn>
Reviewed-by: David Chase <drchase@google.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
 2024-11-07 02:20:14 +00:00
Xiaolin Zhao
3ae5ff2a27 cmd/asm: add support for loong64 FMA instructions 
Add support for assembling the FMA instructions present in the LoongArch
base ISA v1.00. This requires adding a new instruction format and making
use of a third source operand, which is put in RestArgs[0].

The single-precision instructions have the `.s` prefix in their official
mnemonics, and similar Go asm instructions all have `S` prefix for the
other architectures having FMA support, but in this change they instead
have `F` prefix in Go asm because loong64 currently follows the mips
backends in the naming convention. This could be changed later because
FMA is fully expressible in pure Go, making it unlikely to have to hand-
write such assembly in the wild.

Example mapping between actual encoding and Go asm syntax:

fmadd.s fd, fj, fk, fa -> FMADDF fa, fk, fj, fd
(prog.From = fa, prog.Reg = fk, prog.RestArgs[0] = fj and prog.To = fd)

fmadd.s fd, fd, fk, fa -> FMADDF fa, fk, fd
(prog.From = fa, prog.Reg = fk and prog.To = fd)

This patch is a copy of CL 477716.
Co-authored-by: WANG Xuerui <git@xen0n.name>

Change-Id: I9b4e4c601d6c5a854ee238f085849666e4faf090
Reviewed-on: https://go-review.googlesource.com/c/go/+/623877
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Cherry Mui <cherryyz@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Carlos Amedee <carlos@golang.org>
 2024-11-02 01:36:19 +00:00
Xiaolin Zhao
7240c6cb97 cmd/asm: add support for loong64 CRC32 instructions 
This patch is a copy of CL 478595.
Co-authored-by: WANG Xuerui <git@xen0n.name>

Change-Id: Ifb6e8183c83a5dfe5dec84e173a74d5de62692a0
Reviewed-on: https://go-review.googlesource.com/c/go/+/623875
Reviewed-by: Carlos Amedee <carlos@golang.org>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Michael Pratt <mpratt@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
 2024-11-01 01:55:14 +00:00
Xiaolin Zhao
3f694f73d0 cmd/asm: add support for the rest of loong64 unary bitops 
All remaining unary bitop instructions in the LoongArch v1.00 base ISA
are added with this change.

While at it, add the missing W suffix to the current CLO/CLZ names. They
are not used anywhere as far as we know, so no breakage is expected.
Also, stop reusing SLL's instruction format for simplicity, in favor of
a new but trivial instruction format case.

This patch is a copy of CL 477717.
Co-authored-by: WANG Xuerui <git@xen0n.name>

Change-Id: Idbcaca25dda1ed313674ef8b26da722e8d7151c0
Reviewed-on: https://go-review.googlesource.com/c/go/+/623876
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Carlos Amedee <carlos@golang.org>
Reviewed-by: Cherry Mui <cherryyz@google.com>
 2024-11-01 01:54:58 +00:00
Xiaolin Zhao
b895dd5630 cmd/internal/obj/loong64: add support for instructions FSCALEB{F/D} and FLOGB{F/D} 
Go asm syntax:
	FSCALEB{F/D}	FK, FJ, FD
	FLOGB{F/D}	FJ, FD

Equivalent platform assembler syntax:
	fscaleb.{s/d}	fd, fj, fk
	flogb.{s/d}	fd, fj

Ref: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html

Change-Id: I6cd75c7605adbb572dae86d6470ec7cf20ce0f6c
Reviewed-on: https://go-review.googlesource.com/c/go/+/612975
Auto-Submit: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: Tim King <taking@google.com>
Reviewed-by: Meidan Li <limeidan@loongson.cn>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
 2024-09-13 17:05:38 +00:00
Xiaolin Zhao
db07c8607a cmd/internal/obj/loong64: add support for instructions ANDN and ORN 
Go asm syntax:
	ANDN/ORN	RK, RJ, RD
    or  ANDN/ORN	RK, RD

Equivalent platform assembler syntax:
	andn/orn	rd, rj, rk
    or  andn/orn	rd, rd, rk

Ref: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html

Change-Id: I6d240ecae8f9443811ca450aed3574f13f0f4a81
Reviewed-on: https://go-review.googlesource.com/c/go/+/610475
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
Commit-Queue: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Auto-Submit: abner chenc <chenguoqi@loongson.cn>
 2024-09-05 00:48:33 +00:00
Zxilly
d91a2e5b11 cmd: replace many sort.Interface with slices.Sort and SortFunc 
with slices there's no need to implement sort.Interface

Change-Id: I59167e78881cb1df89a71e33d738d6aeca7adb71
GitHub-Last-Rev: 507ba84453
GitHub-Pull-Request: golang/go#68724
Reviewed-on: https://go-review.googlesource.com/c/go/+/602895
Reviewed-by: Ian Lance Taylor <iant@golang.org>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Robert Griesemer <gri@google.com>
Reviewed-by: Keith Randall <khr@golang.org>
Reviewed-by: Keith Randall <khr@google.com>
 2024-09-03 20:55:18 +00:00
Xiaolin Zhao
ea08952aa2 cmd/internal/obj/loong64: add support for instructions BSTRPICK.{W/D} and BSTRINS.{W/D} 
Go asm syntax:
	BSTRPICK{W/V}	$msb, RJ, $lsb, RD
	BSTRINS{W/V}	$msb, RJ, $lsb, RD

Equivalent platform assembler syntax:
	bstrpick.{w/d}	rd, rj, $msb, $lsb
	bstrins.{w/d}	rd, rj, $msb, $lsb

Ref: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html

Change-Id: I8b89b766ed22a96da7d8d5b2b2873382a49208de
Reviewed-on: https://go-review.googlesource.com/c/go/+/604735
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
 2024-08-23 00:53:08 +00:00
Guoqi Chen
f428c7b729 cmd/internal/obj/loong64: add FLDX,FSTX,LDX.STX instructions support 
The LDX.{B,BU,H,HU,W,WU,D},STX.{B,H,W,D}, FLDX.{S,D}, FSTX.{S,D} instruction
on Loong64 implements memory access operations using register offset

Go asm syntax:
	MOV{B,BU,H,HU,W,WU,V}	(RJ)(RK), RD
	MOV{B,H,W,V}		RD, (RJ)(RK)
	MOV{F,D}		(RJ)(RK), FD
	MOV{F,D}		FD, (RJ)(RK)

Equivalent platform assembler syntax:
        ldx.{b,bu,h,hu,w,wu,d}	rd, rj, rk
        stx.{b,h,w,d}		rd, rj, rk
        fldx.{s,d}		fd, rj, rk
        fstx.{s,d}		fd, rj, rk

Ref: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html

Change-Id: Ic7d13bf45dab8342f034b6469465e6337a087144
Reviewed-on: https://go-review.googlesource.com/c/go/+/588215
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Qiqi Huang <huangqiqi@loongson.cn>
Reviewed-by: Meidan Li <limeidan@loongson.cn>
Auto-Submit: abner chenc <chenguoqi@loongson.cn>
 2024-08-03 05:06:40 +00:00
Xiaolin Zhao
3ae819ad1c cmd/internal/obj/loong64: add support for instructions FTINT{RM/RP/RZ/RNE}.{W/L}.{S/D} 
These instructions convert floating-point numbers to fixed-point numbers
with the specified rounding pattern.

Go asm syntax:
            FTINT{RM/RP/RZ/RNE}{W/V}{F/D}	FJ, FD

Equivalent platform assembler syntax:
            ftint{rm/rp/rz/rne}.{w/l}.{s/d}	fd, fj

Ref: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html

Change-Id: I6d650d1b48b10296d01a98fadf9d806206f9b96e
Reviewed-on: https://go-review.googlesource.com/c/go/+/590995
Auto-Submit: abner chenc <chenguoqi@loongson.cn>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
Reviewed-by: Meidan Li <limeidan@loongson.cn>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
Reviewed-by: Qiqi Huang <huangqiqi@loongson.cn>
 2024-08-03 03:27:43 +00:00
Xiaolin Zhao
4087624473 cmd/internal/obj/loong64: add support for instructions FFINT.{S/D}.{W/L} and FTINT.{W/L}.{S/D} 
Go asm syntax:
	FFINT{F/D}{W/V}		FJ, FD
	FTINT{W/V}{F/D}		FJ, FD

Equivalent platform assembler syntax:
	ffint.{s/d}.{w/l}	fd, fj
	ftint.{w/l}.{s/d}	fd, fj

Ref: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html

Change-Id: Ie7646c5d49645c63b274b34b66539f10370f4930
Reviewed-on: https://go-review.googlesource.com/c/go/+/590996
Reviewed-by: Meidan Li <limeidan@loongson.cn>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Auto-Submit: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Qiqi Huang <huangqiqi@loongson.cn>
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
 2024-08-03 02:48:45 +00:00
Xiaolin Zhao
b874005a84 cmd/internal/obj/loong64: add support for instructions FCOPYSIGN.{S/D} and FCLASS.{S/D} 
Go asm syntax:
	FCOPYSG{F/D}	FK, FJ, FD
	FCLASSF{F/D}	FJ, FD

Equivalent platform assembler syntax:
	fcopysign.{s/d}	fd, fj, fk
	fclass.{s/d}	fd, fj

Ref: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html

Change-Id: Ied34b71c9d0b34456ac5782a59d29d2d0229e326
Reviewed-on: https://go-review.googlesource.com/c/go/+/590675
Reviewed-by: Cherry Mui <cherryyz@google.com>
Auto-Submit: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
 2024-08-03 01:57:52 +00:00
Xiaolin Zhao
e761921688 cmd/internal/obj/loong64: add support for instructions F{MAX/NIN}.{S/D} 
Go asm syntax:
	F{MAX/MIN}{F/D}		FK, FJ, FD

Equivalent platform assembler syntax:
	f{max/min}.{s/d}	fd, fj, fk

Ref: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html

Change-Id: Ib11fed1fe3700be5ebba33b5818661c4071b7b7c
Reviewed-on: https://go-review.googlesource.com/c/go/+/590676
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Auto-Submit: abner chenc <chenguoqi@loongson.cn>
 2024-08-02 14:33:57 +00:00