The tls variable is thread local variable, an operation to get its address
is not supported, so we should return an error here.
Change-Id: Ia6a637f549cb886fdb643bdc04eeb269849d1096
Reviewed-on: https://go-review.googlesource.com/c/go/+/565621
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
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Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
Cases 27 and 28 are used to handle floating point operations, MOVW is usually
used for integer processing, and, in two cases there is code like this:
a :=AMOVF
if p.As == AMOVD {
a=AMOVD
}
This means that MOVW was eventually replaced by MOVF, so removed MOVW from cases 27 and 28.
Change-Id: Ib438febab88058e98b569e0dfe70b8610668ee31
Reviewed-on: https://go-review.googlesource.com/c/go/+/565622
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
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Auto-Submit: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
On Loong64, the two input operands and one output operand of the ADDF
instruction are both floating-point registers; and the floating-point
comparison instruction CMPEQ{F,D}, CMPGE{F,D}, CMPGT{F,D} both input
operands are floating-point registers, and the output operation is a
floating-point condition register, currently, only FCC0 is used as the
floating-point condition register.
Example:
ADDF F0, F1, F0
CMPEQF F0, F1, FCC0
Change-Id: I4c1c453e522d43f294a8dcab7b6b5247f41c9c68
Reviewed-on: https://go-review.googlesource.com/c/go/+/580281
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Auto-Submit: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
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The CPUCFG instruction is used to dynamically obtain the features
supported by the current CPU during the running of the program.
Go asm syntax:
CPUCFG RJ, RD
Equivalent platform assembler syntax:
cpucfg rd, rj
Reference: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html
Change-Id: I545110ff837ae9c5ccd7c448a1daf2d1277f9aa1
Reviewed-on: https://go-review.googlesource.com/c/go/+/493436
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
Reviewed-by: Qiqi Huang <huangqiqi@loongson.cn>
Reviewed-by: Cherry Mui <cherryyz@google.com>
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The AM* atomic access instruction performs a sequence of “read-modify-write”
operations on a memory cell atomically. Specifically, it retrieves the old
value at the specified address in memory and writes it to the general register
rd, performs some simple operations on the old value in memory and the value
in the general register rk, and then write the result of the operation back
to the memory address pointed to by general register rj.
Go asm syntax:
AM{SWAP/ADD/AND/OR/XOR/MAX/MIN}[DB]{W/V} RK, (RJ), RD
AM{MAX/MIN}[DB]{WU/VU} RK, (RJ), RD
Equivalent platform assembler syntax:
am{swap/add/and/or/xor/max/min}[_db].{w/d} rd, rk, rj
am{max/min}[_db].{wu/du} rd, rk, rj
Ref: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html
Change-Id: I99ea4553ae731675180d63691c19ef334e7e7817
Reviewed-on: https://go-review.googlesource.com/c/go/+/481577
Reviewed-by: Meidan Li <limeidan@loongson.cn>
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
Reviewed-by: Mauri de Souza Meneguzzo <mauri870@gmail.com>
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
Reviewed-by: Qiqi Huang <huangqiqi@loongson.cn>
Reviewed-by: WANG Xuerui <git@xen0n.name>
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In the three formats corresponding to case 7 of the function asmout, BREAK actually
corresponds to the cacop instruction of Loong64, refer to the loong64 instruction
manual volume 1 [1], the cacop instruction is a privileged instruction used to
maintain the cache, and the user mode does not have permission to execute.
Referring to the loong64 instruction manual volume 1 [1], the SYSCALL, BREAK and DBAR
instructions have similar formats and can be grouped into one category, the RDTIMED,
RDTIMELW and RDTIMEHW instructions can be grouped into one category, and the NOOP and
UNDEF instructions can be grouped into one category.
[1]: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html
Change-Id: I0b8998270102d1557fc2b2410cf8c0b078bd0c2e
Reviewed-on: https://go-review.googlesource.com/c/go/+/493435
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
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Reviewed-by: Carlos Amedee <carlos@golang.org>
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Auto-Submit: Cherry Mui <cherryyz@google.com>
After the alignment of the loop header is performed, the offset of the checked
conditional branch instruction may overflow, so it needs to be checked again.
When checking whether the offset of the branch jump instruction overflows, it
can be classified and processed according to the range of the immediate field
of the specific instruction, which can reduce the introduction of unnecessary
jump instructions.
Fixes#61819
Change-Id: I772a5b5b8b8de21c78d7566be30be8ff65fdbce8
Reviewed-on: https://go-review.googlesource.com/c/go/+/519915
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
TryBot-Result: Gopher Robot <gobot@golang.org>
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Reviewed-by: Meidan Li <limeidan@loongson.cn>
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Reviewed-by: WANG Xuerui <git@xen0n.name>
Change-Id: I6365cdf22ad5e669908519d0ee8b78d76ae8f1b9
Reviewed-on: https://go-review.googlesource.com/c/go/+/532075
Reviewed-by: Than McIntosh <thanm@google.com>
TryBot-Result: Gopher Robot <gobot@golang.org>
Auto-Submit: Ian Lance Taylor <iant@google.com>
Run-TryBot: shuang cui <imcusg@gmail.com>
Reviewed-by: Ian Lance Taylor <iant@google.com>
The LoongArch ELF psABI v2 [1] relocs are vastly simplified from the v1
which involved a stack machine for computing the reloc values, but the
details of PC-relative addressing are changed as well. Specifically, the
`pcaddu12i` instruction is substituted with the `pcalau12i`, which is
like arm64's `adrp` -- meaning the lower bits of a symbol's address now
have to be absolute and not PC-relative.
However, apart from the little bit of added complexity, the obvious
advantage is that only 1 reloc needs to be emitted for every kind of
external reloc we care about. This can mean substantial space savings
(each RELA reloc occupies 24 bytes), and no open-coded stack ops has to
remain any more.
While at it, update the preset value for the output ELF's flags to
indicate the psABI update.
Fixes#58784
[1]: https://loongson.github.io/LoongArch-Documentation/LoongArch-ELF-ABI-EN.html
Change-Id: I5c13bc710eaf58293a32e930dd33feff2ef14c28
Reviewed-on: https://go-review.googlesource.com/c/go/+/455017
Run-TryBot: Ben Shi <powerman1st@163.com>
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Reviewed-by: Meidan Li <limeidan@loongson.cn>
Auto-Submit: Ian Lance Taylor <iant@google.com>
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Reviewed-by: Ian Lance Taylor <iant@google.com>
Allow writing `PCALIGN $imm` where imm is a power-of-2 between 8 and
2048 (inclusive), for ensuring that the following instruction is
placed at an imm-byte boundary relative to the beginning of the
function. If the PC is not sufficiently aligned, NOOPs will be
inserted to make it so, otherwise the directive will do nothing.
This could be useful for both asm performance hand-tuning, and future
scenarios where a certain bigger alignment might be required.
Change-Id: Iad6244669a3d5adea88eceb0dc7be1af4f0d4fc9
Reviewed-on: https://go-review.googlesource.com/c/go/+/479815
Reviewed-by: Keith Randall <khr@golang.org>
Reviewed-by: Keith Randall <khr@google.com>
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There is currently no support for GOARCH=loong32, so the Optab.family
field is unused so far. Remove it to simplify the optab; the loong
assembler backend would likely already be overhauled into a sufficiently
different shape by the time we start to care for loong32, that the data
we have today would be useless anyway.
While at it, add a operand class slot for the 3rd source operand
(support for which will arrive in later commits), and rename the other
operand class fields to be self-documenting. The changes are being
merged into this patch for sake of reducing code churn.
Change-Id: Icf0988e34ff1c0f762c8e0708cfcef2e7954760c
Reviewed-on: https://go-review.googlesource.com/c/go/+/477715
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Run-TryBot: Ben Shi <powerman1st@163.com>
Reviewed-by: Matthew Dempsky <mdempsky@google.com>
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Auto-Submit: Wayne Zuo <wdvxdr@golangcn.org>
LoongArch (except for the extremely reduced LA32 Primary subset) has
dedicated beqz/bnez instructions as alternative encodings for beq/bne
with one of the source registers being R0, that allow the offset field
to occupy 5 more bits, giving 21 bits in total (equal to the FP
branches). Make use of them instead of beq/bne if one source operand is
omitted in asm, or if one of the registers being compared is R0.
Multiple go1 benchmark runs indicate the change is not perf-sensitive.
Change-Id: If6267623c82092e81d75578091fb4e013658b9f3
Reviewed-on: https://go-review.googlesource.com/c/go/+/478377
Reviewed-by: Ian Lance Taylor <iant@google.com>
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Auto-Submit: Wayne Zuo <wdvxdr@golangcn.org>
Untangle the logic so the preparation of operands and actual assembling
(branch range checking included) are properly separated, making future
changes easier to review and maintain. No functional change intended.
Change-Id: I1f73282f9d92ff23d84846453d3597ba66d207d1
Reviewed-on: https://go-review.googlesource.com/c/go/+/478376
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Auto-Submit: Ian Lance Taylor <iant@golang.org>
Run-TryBot: Cherry Mui <cherryyz@google.com>
Reviewed-by: Heschi Kreinick <heschi@google.com>
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The LoongArch ELF psABI v2.00 revamped the relocation design, largely
moving to using the `pcalau12i + addi/ld/st` pair for PC-relative
addressing within +/- 32 bits. The "pcala" in `pcalau12i` stands for
"PC-aligned add"; the instruction's semantics happen to coincide with
arm64's `adrp`.
Add support for emitting this instruction as part of the relevant
addressing ops, for use with new reloc types later.
Updates #58784
Change-Id: Ic1747cd9745aad0d1abb9bd78400cd5ff5978bc8
Reviewed-on: https://go-review.googlesource.com/c/go/+/455016
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Auto-Submit: Wayne Zuo <wdvxdr@golangcn.org>
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Reviewed-by: Wayne Zuo <wdvxdr@golangcn.org>
Reviewed-by: xiaodong liu <teaofmoli@gmail.com>
Reviewed-by: Meidan Li <limeidan@loongson.cn>
TryBot-Result: Gopher Robot <gobot@golang.org>
Instruction formats: rdtime rd, rj
The RDTIME family of instructions are used to read constant frequency timer
information, the stable counter value is written into the general register
rd, and the counter id information is written into the general register rj.
(Note: both of its register operands are outputs).
Ref: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html
Change-Id: Ida5bbb28316ef70b5f616dac3e6fa6f2e77875b5
Reviewed-on: https://go-review.googlesource.com/c/go/+/421655
Reviewed-by: xiaodong liu <teaofmoli@gmail.com>
Reviewed-by: WANG Xuerui <git@xen0n.name>
Reviewed-by: Wayne Zuo <wdvxdr@golangcn.org>
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
Run-TryBot: Wayne Zuo <wdvxdr@golangcn.org>
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Reviewed-by: Meidan Li <limeidan@loongson.cn>
Change-Id: I69065f8adf101fdb28682c55997f503013a50e29
Reviewed-on: https://go-review.googlesource.com/c/go/+/449757
Auto-Submit: Ian Lance Taylor <iant@google.com>
Reviewed-by: Joedian Reid <joedian@golang.org>
Reviewed-by: Keith Randall <khr@google.com>
Reviewed-by: Keith Randall <khr@golang.org>
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Reviewed-by: Ian Lance Taylor <iant@google.com>
Change-Id: Ied16c3be47c863a94d46bd568191057ded4b7d0a
Reviewed-on: https://go-review.googlesource.com/c/go/+/416734
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Reviewed-by: xiaodong liu <teaofmoli@gmail.com>
Implemented an assembler for LoongArch64(loong64 is short name) -
this provides register definitions and instruction encoding as
defined in the LoongArch Instruction Set Manual.
LoongArch Instruction Set Manual:
https://github.com/loongson/LoongArch-Documentation/releases
Contributors to the linux/loong64 port are:
Weining Lu <luweining@loongson.cn>
Lei Wang <wanglei@loongson.cn>
Lingqin Gong <gonglingqin@loongson.cn>
Xiaolin Zhao <zhaoxiaolin@loongson.cn>
Meidan Li <limeidan@loongson.cn>
Xiaojuan Zhai <zhaixiaojuan@loongson.cn>
Qiyuan Pu <puqiyuan@loongson.cn>
Guoqi Chen <chenguoqi@loongson.cn>
This port has been updated to Go 1.15.6:
https://github.com/loongson/go
Updates #46229
Change-Id: I930d2a19246496e3ca36d55539183c0f9f650ad9
Reviewed-on: https://go-review.googlesource.com/c/go/+/342309
Reviewed-by: David Chase <drchase@google.com>
Auto-Submit: Ian Lance Taylor <iant@google.com>
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Run-TryBot: Ian Lance Taylor <iant@google.com>
