As with the previous round for ppc64, this CL fixes a couple of things
that 5a supported but asm did not, both simple.
1) Allow condition code on MRC instruction; this was marked as a TODO.
2) Allow R(n) notation in ARM register shifts. The code needs a rethink
but the tests we're leading toward will make the rewrite easier to test and
trust.
Change-Id: I5b52ad25d177a74cf07e089dddfeeab21863c424
Reviewed-on: https://go-review.googlesource.com/5422
Reviewed-by: Russ Cox <rsc@golang.org>
Fairly straightforward. A couple of unusual addressing tricks.
Also added the ability to write R(10) to mean R10. PPC64 uses
this for a couple of large register spaces. It appears for ARM now
as well, since I saw some uses of that before, although I rewrote
them in our source. I could put it in for 386 and amd64 but it's
not worth it.
Change-Id: I3ffd7ffa62d511b95b92c3c75b9f1d621f5393b6
Reviewed-on: https://go-review.googlesource.com/5282
Reviewed-by: Russ Cox <rsc@golang.org>
There are many peculiarites of the ARM architecture that require work:
condition codes, new instructions, new instruction arg counts, and more.
Rewrite the parser to do a cleaner job, flowing left to right through the
sequence of elements of an operand.
Add ARM to arch.
Add ARM-specific details to the arch in a new file, internal/arch/arm.
These are probably better kept away from the "portable" asm. However
there are some pieces, like MRC, that are hard to disentangle. They
can be cleaned up later.
Change-Id: I8c06aedcf61f8a3960a406c094e168182d21b972
Reviewed-on: https://go-review.googlesource.com/4923
Reviewed-by: Russ Cox <rsc@golang.org>
