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This CL amends HasAVX512 flag with GFNI check. This is needed because our SIMD API supports Galois Field operations. Change-Id: I3e957b7b2215d2b7b6b8a7a0ca3e2e60d453b2e5 Reviewed-on: https://go-review.googlesource.com/c/go/+/685295 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
236 lines
6.8 KiB
Go
236 lines
6.8 KiB
Go
// Copyright 2017 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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//go:build 386 || amd64
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package cpu
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const CacheLinePadSize = 64
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// cpuid is implemented in cpu_x86.s.
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func cpuid(eaxArg, ecxArg uint32) (eax, ebx, ecx, edx uint32)
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// xgetbv with ecx = 0 is implemented in cpu_x86.s.
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func xgetbv() (eax, edx uint32)
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// getGOAMD64level is implemented in cpu_x86.s. Returns number in [1,4].
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func getGOAMD64level() int32
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const (
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// ecx bits
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cpuid_SSE3 = 1 << 0
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cpuid_PCLMULQDQ = 1 << 1
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cpuid_SSSE3 = 1 << 9
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cpuid_GFNI = 1 << 8
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cpuid_FMA = 1 << 12
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cpuid_SSE41 = 1 << 19
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cpuid_SSE42 = 1 << 20
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cpuid_POPCNT = 1 << 23
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cpuid_AES = 1 << 25
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cpuid_OSXSAVE = 1 << 27
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cpuid_AVX = 1 << 28
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// ebx bits
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cpuid_BMI1 = 1 << 3
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cpuid_AVX2 = 1 << 5
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cpuid_BMI2 = 1 << 8
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cpuid_ERMS = 1 << 9
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cpuid_AVX512F = 1 << 16
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cpuid_AVX512DQ = 1 << 17
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cpuid_ADX = 1 << 19
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cpuid_AVX512CD = 1 << 28
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cpuid_SHA = 1 << 29
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cpuid_AVX512BW = 1 << 30
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cpuid_AVX512VL = 1 << 31
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// edx bits
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cpuid_FSRM = 1 << 4
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// edx bits for CPUID 0x80000001
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cpuid_RDTSCP = 1 << 27
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)
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var maxExtendedFunctionInformation uint32
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func doinit() {
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options = []option{
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{Name: "adx", Feature: &X86.HasADX},
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{Name: "aes", Feature: &X86.HasAES},
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{Name: "erms", Feature: &X86.HasERMS},
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{Name: "fsrm", Feature: &X86.HasFSRM},
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{Name: "pclmulqdq", Feature: &X86.HasPCLMULQDQ},
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{Name: "rdtscp", Feature: &X86.HasRDTSCP},
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{Name: "sha", Feature: &X86.HasSHA},
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}
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level := getGOAMD64level()
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if level < 2 {
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// These options are required at level 2. At lower levels
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// they can be turned off.
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options = append(options,
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option{Name: "popcnt", Feature: &X86.HasPOPCNT},
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option{Name: "sse3", Feature: &X86.HasSSE3},
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option{Name: "sse41", Feature: &X86.HasSSE41},
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option{Name: "sse42", Feature: &X86.HasSSE42},
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option{Name: "ssse3", Feature: &X86.HasSSSE3})
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}
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if level < 3 {
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// These options are required at level 3. At lower levels
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// they can be turned off.
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options = append(options,
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option{Name: "avx", Feature: &X86.HasAVX},
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option{Name: "avx2", Feature: &X86.HasAVX2},
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option{Name: "bmi1", Feature: &X86.HasBMI1},
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option{Name: "bmi2", Feature: &X86.HasBMI2},
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option{Name: "fma", Feature: &X86.HasFMA})
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}
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if level < 4 {
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// These options are required at level 4. At lower levels
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// they can be turned off.
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options = append(options,
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option{Name: "avx512f", Feature: &X86.HasAVX512F},
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option{Name: "avx512cd", Feature: &X86.HasAVX512CD},
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option{Name: "avx512bw", Feature: &X86.HasAVX512BW},
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option{Name: "avx512dq", Feature: &X86.HasAVX512DQ},
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option{Name: "avx512vl", Feature: &X86.HasAVX512VL},
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)
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}
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maxID, _, _, _ := cpuid(0, 0)
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if maxID < 1 {
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return
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}
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maxExtendedFunctionInformation, _, _, _ = cpuid(0x80000000, 0)
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_, _, ecx1, _ := cpuid(1, 0)
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X86.HasSSE3 = isSet(ecx1, cpuid_SSE3)
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X86.HasPCLMULQDQ = isSet(ecx1, cpuid_PCLMULQDQ)
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X86.HasSSSE3 = isSet(ecx1, cpuid_SSSE3)
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X86.HasSSE41 = isSet(ecx1, cpuid_SSE41)
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X86.HasSSE42 = isSet(ecx1, cpuid_SSE42)
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X86.HasPOPCNT = isSet(ecx1, cpuid_POPCNT)
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X86.HasAES = isSet(ecx1, cpuid_AES)
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// OSXSAVE can be false when using older Operating Systems
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// or when explicitly disabled on newer Operating Systems by
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// e.g. setting the xsavedisable boot option on Windows 10.
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X86.HasOSXSAVE = isSet(ecx1, cpuid_OSXSAVE)
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// The FMA instruction set extension only has VEX prefixed instructions.
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// VEX prefixed instructions require OSXSAVE to be enabled.
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// See Intel 64 and IA-32 Architecture Software Developer’s Manual Volume 2
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// Section 2.4 "AVX and SSE Instruction Exception Specification"
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X86.HasFMA = isSet(ecx1, cpuid_FMA) && X86.HasOSXSAVE
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osSupportsAVX := false
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osSupportsAVX512 := false
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// For XGETBV, OSXSAVE bit is required and sufficient.
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if X86.HasOSXSAVE {
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eax, _ := xgetbv()
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// Check if XMM and YMM registers have OS support.
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osSupportsAVX = isSet(eax, 1<<1) && isSet(eax, 1<<2)
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// AVX512 detection does not work on Darwin,
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// see https://github.com/golang/go/issues/49233
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//
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// Check if opmask, ZMMhi256 and Hi16_ZMM have OS support.
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osSupportsAVX512 = osSupportsAVX && isSet(eax, 1<<5) && isSet(eax, 1<<6) && isSet(eax, 1<<7)
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}
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X86.HasAVX = isSet(ecx1, cpuid_AVX) && osSupportsAVX
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if maxID < 7 {
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return
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}
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_, ebx7, ecx7, edx7 := cpuid(7, 0)
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X86.HasBMI1 = isSet(ebx7, cpuid_BMI1)
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X86.HasAVX2 = isSet(ebx7, cpuid_AVX2) && osSupportsAVX
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X86.HasBMI2 = isSet(ebx7, cpuid_BMI2)
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X86.HasERMS = isSet(ebx7, cpuid_ERMS)
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X86.HasADX = isSet(ebx7, cpuid_ADX)
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X86.HasSHA = isSet(ebx7, cpuid_SHA)
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X86.HasAVX512F = isSet(ebx7, cpuid_AVX512F) && osSupportsAVX512
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if X86.HasAVX512F {
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X86.HasAVX512CD = isSet(ebx7, cpuid_AVX512CD)
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X86.HasAVX512BW = isSet(ebx7, cpuid_AVX512BW)
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X86.HasAVX512DQ = isSet(ebx7, cpuid_AVX512DQ)
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X86.HasAVX512VL = isSet(ebx7, cpuid_AVX512VL)
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}
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X86.HasFSRM = isSet(edx7, cpuid_FSRM)
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X86.HasGFNI = isSet(ecx7, cpuid_GFNI)
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var maxExtendedInformation uint32
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maxExtendedInformation, _, _, _ = cpuid(0x80000000, 0)
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if maxExtendedInformation < 0x80000001 {
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return
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}
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_, _, _, edxExt1 := cpuid(0x80000001, 0)
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X86.HasRDTSCP = isSet(edxExt1, cpuid_RDTSCP)
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doDerived = func() {
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// Rather than carefully gating on fundamental AVX-512 features, we have
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// a virtual "AVX512" feature that captures F+CD+BW+DQ+VL. BW, DQ, and
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// VL have a huge effect on which AVX-512 instructions are available,
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// and these have all been supported on everything except the earliest
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// Phi chips with AVX-512. No CPU has had CD without F, so we include
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// it. GOAMD64=v4 also implies exactly this set, and these are all
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// included in AVX10.1.
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X86.HasAVX512 = X86.HasAVX512F && X86.HasAVX512CD && X86.HasAVX512BW && X86.HasAVX512DQ && X86.HasAVX512VL
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X86.HasAVX512GFNI = X86.HasAVX512 && X86.HasGFNI
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}
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}
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func isSet(hwc uint32, value uint32) bool {
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return hwc&value != 0
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}
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// Name returns the CPU name given by the vendor.
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// If the CPU name can not be determined an
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// empty string is returned.
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func Name() string {
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if maxExtendedFunctionInformation < 0x80000004 {
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return ""
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}
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data := make([]byte, 0, 3*4*4)
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var eax, ebx, ecx, edx uint32
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eax, ebx, ecx, edx = cpuid(0x80000002, 0)
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data = appendBytes(data, eax, ebx, ecx, edx)
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eax, ebx, ecx, edx = cpuid(0x80000003, 0)
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data = appendBytes(data, eax, ebx, ecx, edx)
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eax, ebx, ecx, edx = cpuid(0x80000004, 0)
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data = appendBytes(data, eax, ebx, ecx, edx)
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// Trim leading spaces.
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for len(data) > 0 && data[0] == ' ' {
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data = data[1:]
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}
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// Trim tail after and including the first null byte.
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for i, c := range data {
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if c == '\x00' {
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data = data[:i]
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break
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}
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}
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return string(data)
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}
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func appendBytes(b []byte, args ...uint32) []byte {
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for _, arg := range args {
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b = append(b,
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byte((arg >> 0)),
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byte((arg >> 8)),
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byte((arg >> 16)),
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byte((arg >> 24)))
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}
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return b
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}
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