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For 512-bits they are unchanged. This CL adds the optimization rules for 128/256-bits under feature check. This CL also fixed a bug for masked load variant of instructions and make them zeroing by default as well. Change-Id: I6fe395541c0cd509984a81841420e71c3af732f2 Reviewed-on: https://go-review.googlesource.com/c/go/+/717822 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
69 lines
1.5 KiB
Go
69 lines
1.5 KiB
Go
// asmcheck
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// Copyright 2025 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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// These tests check code generation of simd peephole optimizations.
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//go:build goexperiment.simd
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package codegen
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import "simd"
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func vptest1() bool {
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v1 := simd.LoadUint64x2Slice([]uint64{0, 1})
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v2 := simd.LoadUint64x2Slice([]uint64{0, 0})
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// amd64:`VPTEST\s(.*)(.*)$`
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// amd64:`SETCS\s(.*)$`
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return v1.AndNot(v2).IsZero()
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}
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func vptest2() bool {
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v1 := simd.LoadUint64x2Slice([]uint64{0, 1})
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v2 := simd.LoadUint64x2Slice([]uint64{0, 0})
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// amd64:`VPTEST\s(.*)(.*)$`
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// amd64:`SETEQ\s(.*)$`
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return v1.And(v2).IsZero()
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}
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type Args2 struct {
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V0 simd.Uint8x32
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V1 simd.Uint8x32
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x string
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}
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//go:noinline
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func simdStructNoSpill(a Args2) simd.Uint8x32 {
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// amd64:-`VMOVDQU\s.*$`
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return a.V0.Xor(a.V1)
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}
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func simdStructWrapperNoSpill(a Args2) simd.Uint8x32 {
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// amd64:-`VMOVDQU\s.*$`
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a.x = "test"
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return simdStructNoSpill(a)
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}
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//go:noinline
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func simdArrayNoSpill(a [1]Args2) simd.Uint8x32 {
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// amd64:-`VMOVDQU\s.*$`
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return a[0].V0.Xor(a[0].V1)
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}
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func simdArrayWrapperNoSpill(a [1]Args2) simd.Uint8x32 {
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// amd64:-`VMOVDQU\s.*$`
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a[0].x = "test"
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return simdArrayNoSpill(a)
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}
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func simdFeatureGuardedMaskOpt() simd.Int16x16 {
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var x, y simd.Int16x16
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if simd.HasAVX512() {
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mask := simd.Mask16x16FromBits(5)
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return x.Add(y).Masked(mask) // amd64:`VPADDW.Z\s.*$`
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}
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mask := simd.Mask16x16FromBits(5)
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return x.Add(y).Masked(mask) // amd64:`VPAND\s.*$`
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}
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