diff --git a/gen/x86_table.js b/gen/x86_table.js
index 8239b78a..a6aeebfa 100644
--- a/gen/x86_table.js
+++ b/gen/x86_table.js
@@ -163,7 +163,6 @@ const encodings = [
     { opcode: 0xD6, nonfaulting: 1, },
     { opcode: 0xD7, skip: 1, },
 
-    { opcode: 0xDC, e: 1, skip: 1, },
     { opcode: 0xDD, e: 1, skip: 1, },
     { opcode: 0xDE, e: 1, skip: 1, },
     { opcode: 0xDF, e: 1, skip: 1, },
@@ -665,6 +664,7 @@ for(let i = 0; i < 8; i++)
         { opcode: 0xD9, e: 1, fixed_g: i, skip: 1, },
         { opcode: 0xDA, e: 1, fixed_g: i, skip: 1, },
         { opcode: 0xDB, e: 1, fixed_g: i, skip: 1, },
+        { opcode: 0xDC, e: 1, fixed_g: i, skip: 1, },
     ]);
 }
 
diff --git a/src/native/fpu.c b/src/native/fpu.c
index 299a5aeb..fbc64eed 100644
--- a/src/native/fpu.c
+++ b/src/native/fpu.c
@@ -846,103 +846,6 @@ void fpu_fst80p(int32_t addr)
     fpu_pop();
 }
 
-void fpu_op_DC_reg(int32_t imm8)
-{
-    dbg_log_fpu_op(0xDC, imm8);
-
-    int32_t mod = imm8 >> 3 & 7;
-    int32_t low = imm8 & 7;
-    int32_t low_ptr = *fpu_stack_ptr + low & 7;
-    double_t sti = fpu_get_sti(low);
-    double_t st0 = fpu_get_st0();
-
-    switch(mod)
-    {
-        case 0:
-            // fadd
-            fpu_st[low_ptr] = sti + st0;
-            break;
-        case 1:
-            // fmul
-            fpu_st[low_ptr] = sti * st0;
-            break;
-        case 2:
-            // fcom
-            fpu_fcom(sti);
-            break;
-        case 3:
-            // fcomp
-            fpu_fcom(sti);
-            fpu_pop();
-            break;
-        case 4:
-            // fsubr
-            fpu_st[low_ptr] = st0 - sti;
-            break;
-        case 5:
-            // fsub
-            fpu_st[low_ptr] = sti - st0;
-            break;
-        case 6:
-            // fdivr
-            fpu_st[low_ptr] = st0 / sti;
-            break;
-        case 7:
-            // fdiv
-            fpu_st[low_ptr] = sti / st0;
-            break;
-        default:
-            dbg_assert(false);
-    }
-}
-
-void fpu_op_DC_mem(int32_t mod, int32_t addr)
-{
-    dbg_log_fpu_op(0xDC, mod);
-
-    double_t m64 = fpu_load_m64(addr);
-    double_t st0 = fpu_get_st0();
-
-    switch(mod)
-    {
-        case 0:
-            // fadd
-            fpu_st[*fpu_stack_ptr] = st0 + m64;
-            break;
-        case 1:
-            // fmul
-            fpu_st[*fpu_stack_ptr] = st0 * m64;
-            break;
-        case 2:
-            // fcom
-            fpu_fcom(m64);
-            break;
-        case 3:
-            // fcomp
-            fpu_fcom(m64);
-            fpu_pop();
-            break;
-        case 4:
-            // fsub
-            fpu_st[*fpu_stack_ptr] = st0 - m64;
-            break;
-        case 5:
-            // fsubr
-            fpu_st[*fpu_stack_ptr] = m64 - st0;
-            break;
-        case 6:
-            // fdiv
-            fpu_st[*fpu_stack_ptr] = st0 / m64;
-            break;
-        case 7:
-            // fdivr
-            fpu_st[*fpu_stack_ptr] = m64 / st0;
-            break;
-        default:
-            dbg_assert(false);
-    }
-}
-
 void fpu_op_DD_reg(int32_t imm8)
 {
     dbg_log_fpu_op(0xDD, imm8);
diff --git a/src/native/instructions.c b/src/native/instructions.c
index 5282c9a1..f7f4563e 100644
--- a/src/native/instructions.c
+++ b/src/native/instructions.c
@@ -1216,8 +1216,24 @@ void instr_DB_5_reg(int32_t r) { task_switch_test(); fpu_fucomi(r); }
 void instr_DB_6_reg(int32_t r) { task_switch_test(); fpu_fcomi(r); }
 void instr_DB_7_reg(int32_t r) { trigger_ud(); }
 
-void instr_DC_mem(int32_t addr, int32_t r) { task_switch_test(); fpu_op_DC_mem(r, addr); }
-void instr_DC_reg(int32_t r2, int32_t r) { task_switch_test(); fpu_op_DC_reg(0xC0 | r2 | r << 3); }
+void instr_DC_0_mem(int32_t addr) { task_switch_test(); fpu_fadd(fpu_load_m64(addr), 0); }
+void instr_DC_1_mem(int32_t addr) { task_switch_test(); fpu_fmul(fpu_load_m64(addr), 0); }
+void instr_DC_2_mem(int32_t addr) { task_switch_test(); fpu_fcom(fpu_load_m64(addr)); }
+void instr_DC_3_mem(int32_t addr) { task_switch_test(); fpu_fcomp(fpu_load_m64(addr)); }
+void instr_DC_4_mem(int32_t addr) { task_switch_test(); fpu_fsub(fpu_load_m64(addr), 0); }
+void instr_DC_5_mem(int32_t addr) { task_switch_test(); fpu_fsubr(fpu_load_m64(addr), 0); }
+void instr_DC_6_mem(int32_t addr) { task_switch_test(); fpu_fdiv(fpu_load_m64(addr), 0); }
+void instr_DC_7_mem(int32_t addr) { task_switch_test(); fpu_fdivr(fpu_load_m64(addr), 0); }
+
+void instr_DC_0_reg(int32_t r) { task_switch_test(); fpu_fadd(fpu_get_sti(r), r); }
+void instr_DC_1_reg(int32_t r) { task_switch_test(); fpu_fmul(fpu_get_sti(r), r); }
+void instr_DC_2_reg(int32_t r) { task_switch_test(); fpu_fcom(fpu_get_sti(r)); }
+void instr_DC_3_reg(int32_t r) { task_switch_test(); fpu_fcomp(fpu_get_sti(r)); }
+void instr_DC_4_reg(int32_t r) { task_switch_test(); fpu_fsub(fpu_get_sti(r), r); }
+void instr_DC_5_reg(int32_t r) { task_switch_test(); fpu_fsubr(fpu_get_sti(r), r); }
+void instr_DC_6_reg(int32_t r) { task_switch_test(); fpu_fdiv(fpu_get_sti(r), r); }
+void instr_DC_7_reg(int32_t r) { task_switch_test(); fpu_fdivr(fpu_get_sti(r), r); }
+
 void instr_DD_mem(int32_t addr, int32_t r) { task_switch_test(); fpu_op_DD_mem(r, addr); }
 void instr_DD_reg(int32_t r2, int32_t r) { task_switch_test(); fpu_op_DD_reg(0xC0 | r2 | r << 3); }
 void instr_DE_mem(int32_t addr, int32_t r) { task_switch_test(); fpu_op_DE_mem(r, addr); }
diff --git a/src/native/instructions.h b/src/native/instructions.h
index 48a92666..aafb6579 100644
--- a/src/native/instructions.h
+++ b/src/native/instructions.h
@@ -121,10 +121,6 @@ typedef uint32_t jit_instr_flags;
     void name ## _mem(int32_t addr) { task_switch_test(); double_t ___ = fpu_load_m32(addr); fun; } \
     void name ## _reg(int32_t r) { task_switch_test(); double_t ___ = fpu_get_sti(r); fun; }
 
-#define DEFINE_MODRM_INSTR_FPU_READ64(name, fun) \
-    void name ## _mem(int32_t addr) { task_switch_test(); double_t ___ = fpu_load_m64(addr); fun; } \
-    void name ## _reg(int32_t r) { task_switch_test(); double_t ___ = fpu_get_sti(r); fun; }
-
 void instr_00_mem(int32_t addr, int32_t r);
 void instr_00_reg(int32_t r1, int32_t r);
 void instr16_01_mem(int32_t addr, int32_t r);