diff --git a/src/acpi.js b/src/acpi.js index 436f4057..e591ab43 100644 --- a/src/acpi.js +++ b/src/acpi.js @@ -69,7 +69,11 @@ export function ACPI(cpu) }); // ACPI status - io.register_read(0xB004, this, undefined, function() + io.register_read(0xB004, this, function() + { + dbg_log("ACPI status read8", LOG_ACPI); + return this.status & 0xFF; + }, function() { dbg_log("ACPI status read", LOG_ACPI); return this.status; diff --git a/src/ne2k.js b/src/ne2k.js index 53397505..4fdf9da4 100644 --- a/src/ne2k.js +++ b/src/ne2k.js @@ -396,7 +396,12 @@ export function Ne2k(cpu, bus, preserve_mac_from_state_image, mac_address_transl { dbg_log("Read cmd", LOG_NET); return this.cr; - }); + }, function() + { + dbg_log("Read16 cmd", LOG_NET); + return this.cr; + } + ); io.register_write(this.port | E8390_CMD, this, function(data_byte) { diff --git a/src/rust/cpu/instructions_0f.rs b/src/rust/cpu/instructions_0f.rs index 8aa47751..cc1a4e23 100644 --- a/src/rust/cpu/instructions_0f.rs +++ b/src/rust/cpu/instructions_0f.rs @@ -1224,7 +1224,7 @@ pub unsafe fn instr_0F30() { dbg_log!("GS Base written"); }, IA32_PERFEVTSEL0 | IA32_PERFEVTSEL1 => {}, // linux/9legacy - IA32_PMC0 | IA32_PMC1 => {}, // linux + IA32_PMC0 | IA32_PMC1 => {}, // linux IA32_PAT => {}, IA32_SPEC_CTRL => {}, // linux 5.19 IA32_TSX_CTRL => {}, // linux 5.19 diff --git a/src/virtio.js b/src/virtio.js index e234a7a5..d351c3d7 100644 --- a/src/virtio.js +++ b/src/virtio.js @@ -825,6 +825,13 @@ VirtIO.prototype.init_capabilities = function(capabilities) return read(addr & ~3) >> ((addr & 3) << 3) & 0xFF; }; + // archhurd does these reads + const shim_read32_on_16 = function(addr) + { + dbg_log("Warning: 32-bit read from 16-bit virtio port", LOG_VIRTIO); + return read(addr); + }; + switch(field.bytes) { case 4: @@ -835,7 +842,7 @@ VirtIO.prototype.init_capabilities = function(capabilities) this.cpu.io.register_write(port, this, undefined, undefined, write); break; case 2: - this.cpu.io.register_read(port, this, shim_read8_on_16, read); + this.cpu.io.register_read(port, this, shim_read8_on_16, read, shim_read32_on_16); this.cpu.io.register_read(port + 1, this, shim_read8_on_16); this.cpu.io.register_write(port, this, undefined, write); break;