2015-03-23 17:02:11 -07:00
|
|
|
// autogenerated from rulegen/lower_amd64.rules: do not edit!
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|
|
|
|
// generated with: go run rulegen/rulegen.go rulegen/lower_amd64.rules lowerAmd64 lowerAmd64.go
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|
|
|
package ssa
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|
|
|
|
|
|
|
|
|
func lowerAmd64(v *Value) bool {
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|
|
|
|
switch v.Op {
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2015-04-15 15:51:25 -07:00
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|
|
case OpADDCQ:
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|
|
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|
// match: (ADDCQ [c] (LEAQ8 [d] x y))
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|
// cond:
|
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|
// result: (LEAQ8 [c.(int64)+d.(int64)] x y)
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|
{
|
|
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|
|
c := v.Aux
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|
|
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|
if v.Args[0].Op != OpLEAQ8 {
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|
goto end16348939e556e99e8447227ecb986f01
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|
}
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d := v.Args[0].Aux
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x := v.Args[0].Args[0]
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y := v.Args[0].Args[1]
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v.Op = OpLEAQ8
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v.Aux = nil
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v.resetArgs()
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v.Aux = c.(int64) + d.(int64)
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v.AddArg(x)
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v.AddArg(y)
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return true
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}
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goto end16348939e556e99e8447227ecb986f01
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end16348939e556e99e8447227ecb986f01:
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;
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// match: (ADDCQ [off1] (FPAddr [off2]))
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// cond:
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// result: (FPAddr [off1.(int64)+off2.(int64)])
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|
{
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off1 := v.Aux
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if v.Args[0].Op != OpFPAddr {
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goto end28e093ab0618066e6b2609db7aaf309b
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|
}
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off2 := v.Args[0].Aux
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v.Op = OpFPAddr
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v.Aux = nil
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|
v.resetArgs()
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v.Aux = off1.(int64) + off2.(int64)
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return true
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}
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goto end28e093ab0618066e6b2609db7aaf309b
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end28e093ab0618066e6b2609db7aaf309b:
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;
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// match: (ADDCQ [off1] (SPAddr [off2]))
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// cond:
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// result: (SPAddr [off1.(int64)+off2.(int64)])
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{
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off1 := v.Aux
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if v.Args[0].Op != OpSPAddr {
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goto endd0c27c62d150b88168075c5ba113d1fa
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}
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off2 := v.Args[0].Aux
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v.Op = OpSPAddr
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v.Aux = nil
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v.resetArgs()
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v.Aux = off1.(int64) + off2.(int64)
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return true
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}
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goto endd0c27c62d150b88168075c5ba113d1fa
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endd0c27c62d150b88168075c5ba113d1fa:
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;
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2015-03-23 17:02:11 -07:00
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case OpADDQ:
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2015-03-26 10:49:03 -07:00
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// match: (ADDQ x (Const [c]))
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2015-03-23 17:02:11 -07:00
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// cond:
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// result: (ADDCQ [c] x)
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{
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x := v.Args[0]
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2015-03-26 10:49:03 -07:00
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if v.Args[1].Op != OpConst {
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2015-04-15 15:51:25 -07:00
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goto endef6908cfdf56e102cc327a3ddc14393d
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2015-03-23 17:02:11 -07:00
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}
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c := v.Args[1].Aux
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v.Op = OpADDCQ
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v.Aux = nil
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2015-04-15 15:51:25 -07:00
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v.resetArgs()
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2015-03-23 17:02:11 -07:00
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|
v.Aux = c
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v.AddArg(x)
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return true
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}
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2015-04-15 15:51:25 -07:00
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goto endef6908cfdf56e102cc327a3ddc14393d
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endef6908cfdf56e102cc327a3ddc14393d:
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2015-03-23 17:02:11 -07:00
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;
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2015-03-26 10:49:03 -07:00
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// match: (ADDQ (Const [c]) x)
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2015-03-23 17:02:11 -07:00
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// cond:
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// result: (ADDCQ [c] x)
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{
|
2015-03-26 10:49:03 -07:00
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|
if v.Args[0].Op != OpConst {
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2015-04-15 15:51:25 -07:00
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goto endb54a32cf3147f424f08b46db62c69b23
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2015-03-23 17:02:11 -07:00
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|
}
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c := v.Args[0].Aux
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x := v.Args[1]
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|
v.Op = OpADDCQ
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v.Aux = nil
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2015-04-15 15:51:25 -07:00
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|
v.resetArgs()
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2015-03-23 17:02:11 -07:00
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|
v.Aux = c
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v.AddArg(x)
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return true
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}
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2015-04-15 15:51:25 -07:00
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goto endb54a32cf3147f424f08b46db62c69b23
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endb54a32cf3147f424f08b46db62c69b23:
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;
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|
// match: (ADDQ x (SHLCQ [shift] y))
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// cond: shift.(int64) == 3
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|
// result: (LEAQ8 [int64(0)] x y)
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|
{
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x := v.Args[0]
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|
if v.Args[1].Op != OpSHLCQ {
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|
goto end7fa0d837edd248748cef516853fd9475
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|
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|
}
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shift := v.Args[1].Aux
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|
y := v.Args[1].Args[0]
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|
if !(shift.(int64) == 3) {
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|
|
goto end7fa0d837edd248748cef516853fd9475
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|
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|
|
}
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|
|
v.Op = OpLEAQ8
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|
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|
|
v.Aux = nil
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|
|
v.resetArgs()
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|
|
|
|
v.Aux = int64(0)
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|
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|
v.AddArg(x)
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|
v.AddArg(y)
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|
|
return true
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|
|
}
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|
goto end7fa0d837edd248748cef516853fd9475
|
|
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|
|
end7fa0d837edd248748cef516853fd9475:
|
2015-03-23 17:02:11 -07:00
|
|
|
;
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|
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|
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case OpAdd:
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|
|
|
|
// match: (Add <t> x y)
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2015-04-15 15:51:25 -07:00
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|
|
// cond: (is64BitInt(t) || isPtr(t))
|
2015-03-23 17:02:11 -07:00
|
|
|
// result: (ADDQ x y)
|
|
|
|
|
{
|
|
|
|
|
t := v.Type
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|
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|
|
x := v.Args[0]
|
|
|
|
|
y := v.Args[1]
|
2015-04-15 15:51:25 -07:00
|
|
|
if !(is64BitInt(t) || isPtr(t)) {
|
|
|
|
|
goto endf031c523d7dd08e4b8e7010a94cd94c9
|
2015-03-23 17:02:11 -07:00
|
|
|
}
|
|
|
|
|
v.Op = OpADDQ
|
|
|
|
|
v.Aux = nil
|
2015-04-15 15:51:25 -07:00
|
|
|
v.resetArgs()
|
2015-03-23 17:02:11 -07:00
|
|
|
v.AddArg(x)
|
|
|
|
|
v.AddArg(y)
|
|
|
|
|
return true
|
|
|
|
|
}
|
2015-04-15 15:51:25 -07:00
|
|
|
goto endf031c523d7dd08e4b8e7010a94cd94c9
|
|
|
|
|
endf031c523d7dd08e4b8e7010a94cd94c9:
|
2015-03-23 17:02:11 -07:00
|
|
|
;
|
|
|
|
|
// match: (Add <t> x y)
|
|
|
|
|
// cond: is32BitInt(t)
|
|
|
|
|
// result: (ADDL x y)
|
|
|
|
|
{
|
|
|
|
|
t := v.Type
|
|
|
|
|
x := v.Args[0]
|
|
|
|
|
y := v.Args[1]
|
|
|
|
|
if !(is32BitInt(t)) {
|
2015-04-15 15:51:25 -07:00
|
|
|
goto end35a02a1587264e40cf1055856ff8445a
|
2015-03-23 17:02:11 -07:00
|
|
|
}
|
|
|
|
|
v.Op = OpADDL
|
|
|
|
|
v.Aux = nil
|
2015-04-15 15:51:25 -07:00
|
|
|
v.resetArgs()
|
2015-03-23 17:02:11 -07:00
|
|
|
v.AddArg(x)
|
|
|
|
|
v.AddArg(y)
|
|
|
|
|
return true
|
|
|
|
|
}
|
2015-04-15 15:51:25 -07:00
|
|
|
goto end35a02a1587264e40cf1055856ff8445a
|
|
|
|
|
end35a02a1587264e40cf1055856ff8445a:
|
2015-03-23 17:02:11 -07:00
|
|
|
;
|
|
|
|
|
case OpCMPQ:
|
2015-03-26 10:49:03 -07:00
|
|
|
// match: (CMPQ x (Const [c]))
|
2015-03-23 17:02:11 -07:00
|
|
|
// cond:
|
|
|
|
|
// result: (CMPCQ x [c])
|
|
|
|
|
{
|
|
|
|
|
x := v.Args[0]
|
2015-03-26 10:49:03 -07:00
|
|
|
if v.Args[1].Op != OpConst {
|
2015-04-15 15:51:25 -07:00
|
|
|
goto end1770a40e4253d9f669559a360514613e
|
2015-03-23 17:02:11 -07:00
|
|
|
}
|
|
|
|
|
c := v.Args[1].Aux
|
|
|
|
|
v.Op = OpCMPCQ
|
|
|
|
|
v.Aux = nil
|
2015-04-15 15:51:25 -07:00
|
|
|
v.resetArgs()
|
2015-03-23 17:02:11 -07:00
|
|
|
v.AddArg(x)
|
|
|
|
|
v.Aux = c
|
|
|
|
|
return true
|
|
|
|
|
}
|
2015-04-15 15:51:25 -07:00
|
|
|
goto end1770a40e4253d9f669559a360514613e
|
|
|
|
|
end1770a40e4253d9f669559a360514613e:
|
2015-03-23 17:02:11 -07:00
|
|
|
;
|
2015-03-26 10:49:03 -07:00
|
|
|
// match: (CMPQ (Const [c]) x)
|
2015-03-23 17:02:11 -07:00
|
|
|
// cond:
|
2015-03-26 10:49:03 -07:00
|
|
|
// result: (InvertFlags (CMPCQ <TypeFlags> x [c]))
|
2015-03-23 17:02:11 -07:00
|
|
|
{
|
2015-03-26 10:49:03 -07:00
|
|
|
if v.Args[0].Op != OpConst {
|
2015-04-15 15:51:25 -07:00
|
|
|
goto enda4e64c7eaeda16c1c0db9dac409cd126
|
2015-03-23 17:02:11 -07:00
|
|
|
}
|
|
|
|
|
c := v.Args[0].Aux
|
|
|
|
|
x := v.Args[1]
|
|
|
|
|
v.Op = OpInvertFlags
|
|
|
|
|
v.Aux = nil
|
2015-04-15 15:51:25 -07:00
|
|
|
v.resetArgs()
|
2015-03-23 17:02:11 -07:00
|
|
|
v0 := v.Block.NewValue(OpCMPCQ, TypeInvalid, nil)
|
2015-03-26 10:49:03 -07:00
|
|
|
v0.Type = TypeFlags
|
2015-03-23 17:02:11 -07:00
|
|
|
v0.AddArg(x)
|
|
|
|
|
v0.Aux = c
|
|
|
|
|
v.AddArg(v0)
|
|
|
|
|
return true
|
|
|
|
|
}
|
2015-04-15 15:51:25 -07:00
|
|
|
goto enda4e64c7eaeda16c1c0db9dac409cd126
|
|
|
|
|
enda4e64c7eaeda16c1c0db9dac409cd126:
|
|
|
|
|
;
|
|
|
|
|
case OpCheckBound:
|
|
|
|
|
// match: (CheckBound idx len)
|
|
|
|
|
// cond:
|
|
|
|
|
// result: (SETB (CMPQ <TypeFlags> idx len))
|
|
|
|
|
{
|
|
|
|
|
idx := v.Args[0]
|
|
|
|
|
len := v.Args[1]
|
|
|
|
|
v.Op = OpSETB
|
|
|
|
|
v.Aux = nil
|
|
|
|
|
v.resetArgs()
|
|
|
|
|
v0 := v.Block.NewValue(OpCMPQ, TypeInvalid, nil)
|
|
|
|
|
v0.Type = TypeFlags
|
|
|
|
|
v0.AddArg(idx)
|
|
|
|
|
v0.AddArg(len)
|
|
|
|
|
v.AddArg(v0)
|
|
|
|
|
return true
|
|
|
|
|
}
|
|
|
|
|
goto end249426f6f996d45a62f89a591311a954
|
|
|
|
|
end249426f6f996d45a62f89a591311a954:
|
|
|
|
|
;
|
|
|
|
|
case OpCheckNil:
|
|
|
|
|
// match: (CheckNil p)
|
|
|
|
|
// cond:
|
|
|
|
|
// result: (SETNE (TESTQ <TypeFlags> p p))
|
|
|
|
|
{
|
|
|
|
|
p := v.Args[0]
|
|
|
|
|
v.Op = OpSETNE
|
|
|
|
|
v.Aux = nil
|
|
|
|
|
v.resetArgs()
|
|
|
|
|
v0 := v.Block.NewValue(OpTESTQ, TypeInvalid, nil)
|
|
|
|
|
v0.Type = TypeFlags
|
|
|
|
|
v0.AddArg(p)
|
|
|
|
|
v0.AddArg(p)
|
|
|
|
|
v.AddArg(v0)
|
|
|
|
|
return true
|
|
|
|
|
}
|
|
|
|
|
goto end90d3057824f74ef953074e473aa0b282
|
|
|
|
|
end90d3057824f74ef953074e473aa0b282:
|
2015-03-23 17:02:11 -07:00
|
|
|
;
|
|
|
|
|
case OpLess:
|
|
|
|
|
// match: (Less x y)
|
|
|
|
|
// cond: is64BitInt(v.Args[0].Type) && isSigned(v.Args[0].Type)
|
2015-03-26 10:49:03 -07:00
|
|
|
// result: (SETL (CMPQ <TypeFlags> x y))
|
2015-03-23 17:02:11 -07:00
|
|
|
{
|
|
|
|
|
x := v.Args[0]
|
|
|
|
|
y := v.Args[1]
|
|
|
|
|
if !(is64BitInt(v.Args[0].Type) && isSigned(v.Args[0].Type)) {
|
2015-04-15 15:51:25 -07:00
|
|
|
goto endcecf13a952d4c6c2383561c7d68a3cf9
|
2015-03-23 17:02:11 -07:00
|
|
|
}
|
|
|
|
|
v.Op = OpSETL
|
|
|
|
|
v.Aux = nil
|
2015-04-15 15:51:25 -07:00
|
|
|
v.resetArgs()
|
2015-03-23 17:02:11 -07:00
|
|
|
v0 := v.Block.NewValue(OpCMPQ, TypeInvalid, nil)
|
2015-03-26 10:49:03 -07:00
|
|
|
v0.Type = TypeFlags
|
2015-03-23 17:02:11 -07:00
|
|
|
v0.AddArg(x)
|
|
|
|
|
v0.AddArg(y)
|
|
|
|
|
v.AddArg(v0)
|
|
|
|
|
return true
|
|
|
|
|
}
|
2015-04-15 15:51:25 -07:00
|
|
|
goto endcecf13a952d4c6c2383561c7d68a3cf9
|
|
|
|
|
endcecf13a952d4c6c2383561c7d68a3cf9:
|
2015-03-23 17:02:11 -07:00
|
|
|
;
|
2015-04-15 15:51:25 -07:00
|
|
|
case OpLoad:
|
|
|
|
|
// match: (Load <t> ptr mem)
|
|
|
|
|
// cond: (is64BitInt(t) || isPtr(t))
|
|
|
|
|
// result: (MOVQload [int64(0)] ptr mem)
|
2015-03-23 17:02:11 -07:00
|
|
|
{
|
|
|
|
|
t := v.Type
|
2015-04-15 15:51:25 -07:00
|
|
|
ptr := v.Args[0]
|
|
|
|
|
mem := v.Args[1]
|
|
|
|
|
if !(is64BitInt(t) || isPtr(t)) {
|
|
|
|
|
goto end581ce5a20901df1b8143448ba031685b
|
|
|
|
|
}
|
|
|
|
|
v.Op = OpMOVQload
|
|
|
|
|
v.Aux = nil
|
|
|
|
|
v.resetArgs()
|
|
|
|
|
v.Aux = int64(0)
|
|
|
|
|
v.AddArg(ptr)
|
|
|
|
|
v.AddArg(mem)
|
|
|
|
|
return true
|
|
|
|
|
}
|
|
|
|
|
goto end581ce5a20901df1b8143448ba031685b
|
|
|
|
|
end581ce5a20901df1b8143448ba031685b:
|
|
|
|
|
;
|
|
|
|
|
case OpMOVQload:
|
|
|
|
|
// match: (MOVQload [off1] (FPAddr [off2]) mem)
|
|
|
|
|
// cond:
|
|
|
|
|
// result: (MOVQloadFP [off1.(int64)+off2.(int64)] mem)
|
|
|
|
|
{
|
|
|
|
|
off1 := v.Aux
|
|
|
|
|
if v.Args[0].Op != OpFPAddr {
|
|
|
|
|
goto endce972b1aa84b56447978c43def87fa57
|
2015-03-23 17:02:11 -07:00
|
|
|
}
|
2015-04-15 15:51:25 -07:00
|
|
|
off2 := v.Args[0].Aux
|
|
|
|
|
mem := v.Args[1]
|
|
|
|
|
v.Op = OpMOVQloadFP
|
2015-03-23 17:02:11 -07:00
|
|
|
v.Aux = nil
|
2015-04-15 15:51:25 -07:00
|
|
|
v.resetArgs()
|
|
|
|
|
v.Aux = off1.(int64) + off2.(int64)
|
2015-03-23 17:02:11 -07:00
|
|
|
v.AddArg(mem)
|
|
|
|
|
return true
|
|
|
|
|
}
|
2015-04-15 15:51:25 -07:00
|
|
|
goto endce972b1aa84b56447978c43def87fa57
|
|
|
|
|
endce972b1aa84b56447978c43def87fa57:
|
2015-03-23 17:02:11 -07:00
|
|
|
;
|
2015-04-15 15:51:25 -07:00
|
|
|
// match: (MOVQload [off1] (SPAddr [off2]) mem)
|
|
|
|
|
// cond:
|
|
|
|
|
// result: (MOVQloadSP [off1.(int64)+off2.(int64)] mem)
|
2015-03-23 17:02:11 -07:00
|
|
|
{
|
2015-04-15 15:51:25 -07:00
|
|
|
off1 := v.Aux
|
|
|
|
|
if v.Args[0].Op != OpSPAddr {
|
|
|
|
|
goto end3d8628a6536350a123be81240b8a1376
|
|
|
|
|
}
|
|
|
|
|
off2 := v.Args[0].Aux
|
|
|
|
|
mem := v.Args[1]
|
|
|
|
|
v.Op = OpMOVQloadSP
|
|
|
|
|
v.Aux = nil
|
|
|
|
|
v.resetArgs()
|
|
|
|
|
v.Aux = off1.(int64) + off2.(int64)
|
|
|
|
|
v.AddArg(mem)
|
|
|
|
|
return true
|
|
|
|
|
}
|
|
|
|
|
goto end3d8628a6536350a123be81240b8a1376
|
|
|
|
|
end3d8628a6536350a123be81240b8a1376:
|
2015-05-12 15:16:52 -07:00
|
|
|
;
|
|
|
|
|
// match: (MOVQload [off] (Global [sym]) mem)
|
|
|
|
|
// cond:
|
|
|
|
|
// result: (MOVQloadglobal [GlobalOffset{sym,off.(int64)}] mem)
|
|
|
|
|
{
|
|
|
|
|
off := v.Aux
|
|
|
|
|
if v.Args[0].Op != OpGlobal {
|
|
|
|
|
goto end20693899317f3f8d1b47fefa64087654
|
|
|
|
|
}
|
|
|
|
|
sym := v.Args[0].Aux
|
|
|
|
|
mem := v.Args[1]
|
|
|
|
|
v.Op = OpMOVQloadglobal
|
|
|
|
|
v.Aux = nil
|
|
|
|
|
v.resetArgs()
|
|
|
|
|
v.Aux = GlobalOffset{sym, off.(int64)}
|
|
|
|
|
v.AddArg(mem)
|
|
|
|
|
return true
|
|
|
|
|
}
|
|
|
|
|
goto end20693899317f3f8d1b47fefa64087654
|
|
|
|
|
end20693899317f3f8d1b47fefa64087654:
|
2015-04-15 15:51:25 -07:00
|
|
|
;
|
|
|
|
|
// match: (MOVQload [off1] (ADDCQ [off2] ptr) mem)
|
|
|
|
|
// cond:
|
|
|
|
|
// result: (MOVQload [off1.(int64)+off2.(int64)] ptr mem)
|
|
|
|
|
{
|
|
|
|
|
off1 := v.Aux
|
|
|
|
|
if v.Args[0].Op != OpADDCQ {
|
|
|
|
|
goto enda68a39292ba2a05b3436191cb0bb0516
|
|
|
|
|
}
|
|
|
|
|
off2 := v.Args[0].Aux
|
|
|
|
|
ptr := v.Args[0].Args[0]
|
|
|
|
|
mem := v.Args[1]
|
|
|
|
|
v.Op = OpMOVQload
|
|
|
|
|
v.Aux = nil
|
|
|
|
|
v.resetArgs()
|
|
|
|
|
v.Aux = off1.(int64) + off2.(int64)
|
|
|
|
|
v.AddArg(ptr)
|
|
|
|
|
v.AddArg(mem)
|
|
|
|
|
return true
|
|
|
|
|
}
|
|
|
|
|
goto enda68a39292ba2a05b3436191cb0bb0516
|
|
|
|
|
enda68a39292ba2a05b3436191cb0bb0516:
|
|
|
|
|
;
|
|
|
|
|
// match: (MOVQload [off1] (LEAQ8 [off2] ptr idx) mem)
|
|
|
|
|
// cond:
|
|
|
|
|
// result: (MOVQload8 [off1.(int64)+off2.(int64)] ptr idx mem)
|
|
|
|
|
{
|
|
|
|
|
off1 := v.Aux
|
|
|
|
|
if v.Args[0].Op != OpLEAQ8 {
|
|
|
|
|
goto end35060118a284c93323ab3fb827156638
|
2015-03-23 17:02:11 -07:00
|
|
|
}
|
2015-04-15 15:51:25 -07:00
|
|
|
off2 := v.Args[0].Aux
|
|
|
|
|
ptr := v.Args[0].Args[0]
|
|
|
|
|
idx := v.Args[0].Args[1]
|
|
|
|
|
mem := v.Args[1]
|
|
|
|
|
v.Op = OpMOVQload8
|
2015-03-23 17:02:11 -07:00
|
|
|
v.Aux = nil
|
2015-04-15 15:51:25 -07:00
|
|
|
v.resetArgs()
|
|
|
|
|
v.Aux = off1.(int64) + off2.(int64)
|
|
|
|
|
v.AddArg(ptr)
|
|
|
|
|
v.AddArg(idx)
|
2015-03-23 17:02:11 -07:00
|
|
|
v.AddArg(mem)
|
|
|
|
|
return true
|
|
|
|
|
}
|
2015-04-15 15:51:25 -07:00
|
|
|
goto end35060118a284c93323ab3fb827156638
|
|
|
|
|
end35060118a284c93323ab3fb827156638:
|
|
|
|
|
;
|
|
|
|
|
case OpMOVQstore:
|
|
|
|
|
// match: (MOVQstore [off1] (FPAddr [off2]) val mem)
|
|
|
|
|
// cond:
|
|
|
|
|
// result: (MOVQstoreFP [off1.(int64)+off2.(int64)] val mem)
|
|
|
|
|
{
|
|
|
|
|
off1 := v.Aux
|
|
|
|
|
if v.Args[0].Op != OpFPAddr {
|
|
|
|
|
goto end0a2a81a20558dfc93790aecb1e9cc81a
|
|
|
|
|
}
|
|
|
|
|
off2 := v.Args[0].Aux
|
|
|
|
|
val := v.Args[1]
|
|
|
|
|
mem := v.Args[2]
|
|
|
|
|
v.Op = OpMOVQstoreFP
|
|
|
|
|
v.Aux = nil
|
|
|
|
|
v.resetArgs()
|
|
|
|
|
v.Aux = off1.(int64) + off2.(int64)
|
|
|
|
|
v.AddArg(val)
|
|
|
|
|
v.AddArg(mem)
|
|
|
|
|
return true
|
|
|
|
|
}
|
|
|
|
|
goto end0a2a81a20558dfc93790aecb1e9cc81a
|
|
|
|
|
end0a2a81a20558dfc93790aecb1e9cc81a:
|
|
|
|
|
;
|
|
|
|
|
// match: (MOVQstore [off1] (SPAddr [off2]) val mem)
|
|
|
|
|
// cond:
|
|
|
|
|
// result: (MOVQstoreSP [off1.(int64)+off2.(int64)] val mem)
|
|
|
|
|
{
|
|
|
|
|
off1 := v.Aux
|
|
|
|
|
if v.Args[0].Op != OpSPAddr {
|
|
|
|
|
goto end1cb5b7e766f018270fa434c6f46f607f
|
|
|
|
|
}
|
|
|
|
|
off2 := v.Args[0].Aux
|
|
|
|
|
val := v.Args[1]
|
|
|
|
|
mem := v.Args[2]
|
|
|
|
|
v.Op = OpMOVQstoreSP
|
|
|
|
|
v.Aux = nil
|
|
|
|
|
v.resetArgs()
|
|
|
|
|
v.Aux = off1.(int64) + off2.(int64)
|
|
|
|
|
v.AddArg(val)
|
|
|
|
|
v.AddArg(mem)
|
|
|
|
|
return true
|
|
|
|
|
}
|
|
|
|
|
goto end1cb5b7e766f018270fa434c6f46f607f
|
|
|
|
|
end1cb5b7e766f018270fa434c6f46f607f:
|
2015-05-12 15:16:52 -07:00
|
|
|
;
|
|
|
|
|
// match: (MOVQstore [off] (Global [sym]) val mem)
|
|
|
|
|
// cond:
|
|
|
|
|
// result: (MOVQstoreglobal [GlobalOffset{sym,off.(int64)}] val mem)
|
|
|
|
|
{
|
|
|
|
|
off := v.Aux
|
|
|
|
|
if v.Args[0].Op != OpGlobal {
|
|
|
|
|
goto end657d07e37c720a8fbb108a31bb48090d
|
|
|
|
|
}
|
|
|
|
|
sym := v.Args[0].Aux
|
|
|
|
|
val := v.Args[1]
|
|
|
|
|
mem := v.Args[2]
|
|
|
|
|
v.Op = OpMOVQstoreglobal
|
|
|
|
|
v.Aux = nil
|
|
|
|
|
v.resetArgs()
|
|
|
|
|
v.Aux = GlobalOffset{sym, off.(int64)}
|
|
|
|
|
v.AddArg(val)
|
|
|
|
|
v.AddArg(mem)
|
|
|
|
|
return true
|
|
|
|
|
}
|
|
|
|
|
goto end657d07e37c720a8fbb108a31bb48090d
|
|
|
|
|
end657d07e37c720a8fbb108a31bb48090d:
|
2015-04-15 15:51:25 -07:00
|
|
|
;
|
|
|
|
|
// match: (MOVQstore [off1] (ADDCQ [off2] ptr) val mem)
|
|
|
|
|
// cond:
|
|
|
|
|
// result: (MOVQstore [off1.(int64)+off2.(int64)] ptr val mem)
|
|
|
|
|
{
|
|
|
|
|
off1 := v.Aux
|
|
|
|
|
if v.Args[0].Op != OpADDCQ {
|
|
|
|
|
goto end271e3052de832e22b1f07576af2854de
|
|
|
|
|
}
|
|
|
|
|
off2 := v.Args[0].Aux
|
|
|
|
|
ptr := v.Args[0].Args[0]
|
|
|
|
|
val := v.Args[1]
|
|
|
|
|
mem := v.Args[2]
|
|
|
|
|
v.Op = OpMOVQstore
|
|
|
|
|
v.Aux = nil
|
|
|
|
|
v.resetArgs()
|
|
|
|
|
v.Aux = off1.(int64) + off2.(int64)
|
|
|
|
|
v.AddArg(ptr)
|
|
|
|
|
v.AddArg(val)
|
|
|
|
|
v.AddArg(mem)
|
|
|
|
|
return true
|
|
|
|
|
}
|
|
|
|
|
goto end271e3052de832e22b1f07576af2854de
|
|
|
|
|
end271e3052de832e22b1f07576af2854de:
|
|
|
|
|
;
|
|
|
|
|
// match: (MOVQstore [off1] (LEAQ8 [off2] ptr idx) val mem)
|
|
|
|
|
// cond:
|
|
|
|
|
// result: (MOVQstore8 [off1.(int64)+off2.(int64)] ptr idx val mem)
|
|
|
|
|
{
|
|
|
|
|
off1 := v.Aux
|
|
|
|
|
if v.Args[0].Op != OpLEAQ8 {
|
|
|
|
|
goto endb5cba0ee3ba21d2bd8e5aa163d2b984e
|
|
|
|
|
}
|
|
|
|
|
off2 := v.Args[0].Aux
|
|
|
|
|
ptr := v.Args[0].Args[0]
|
|
|
|
|
idx := v.Args[0].Args[1]
|
|
|
|
|
val := v.Args[1]
|
|
|
|
|
mem := v.Args[2]
|
|
|
|
|
v.Op = OpMOVQstore8
|
|
|
|
|
v.Aux = nil
|
|
|
|
|
v.resetArgs()
|
|
|
|
|
v.Aux = off1.(int64) + off2.(int64)
|
|
|
|
|
v.AddArg(ptr)
|
|
|
|
|
v.AddArg(idx)
|
|
|
|
|
v.AddArg(val)
|
|
|
|
|
v.AddArg(mem)
|
|
|
|
|
return true
|
|
|
|
|
}
|
|
|
|
|
goto endb5cba0ee3ba21d2bd8e5aa163d2b984e
|
|
|
|
|
endb5cba0ee3ba21d2bd8e5aa163d2b984e:
|
|
|
|
|
;
|
|
|
|
|
case OpMULCQ:
|
|
|
|
|
// match: (MULCQ [c] x)
|
|
|
|
|
// cond: c.(int64) == 8
|
|
|
|
|
// result: (SHLCQ [int64(3)] x)
|
|
|
|
|
{
|
|
|
|
|
c := v.Aux
|
|
|
|
|
x := v.Args[0]
|
|
|
|
|
if !(c.(int64) == 8) {
|
|
|
|
|
goto end90a1c055d9658aecacce5e101c1848b4
|
|
|
|
|
}
|
|
|
|
|
v.Op = OpSHLCQ
|
|
|
|
|
v.Aux = nil
|
|
|
|
|
v.resetArgs()
|
|
|
|
|
v.Aux = int64(3)
|
|
|
|
|
v.AddArg(x)
|
|
|
|
|
return true
|
|
|
|
|
}
|
|
|
|
|
goto end90a1c055d9658aecacce5e101c1848b4
|
|
|
|
|
end90a1c055d9658aecacce5e101c1848b4:
|
|
|
|
|
;
|
|
|
|
|
case OpMULQ:
|
|
|
|
|
// match: (MULQ x (Const [c]))
|
|
|
|
|
// cond:
|
|
|
|
|
// result: (MULCQ [c] x)
|
|
|
|
|
{
|
|
|
|
|
x := v.Args[0]
|
|
|
|
|
if v.Args[1].Op != OpConst {
|
|
|
|
|
goto endc427f4838d2e83c00cc097b20bd20a37
|
|
|
|
|
}
|
|
|
|
|
c := v.Args[1].Aux
|
|
|
|
|
v.Op = OpMULCQ
|
|
|
|
|
v.Aux = nil
|
|
|
|
|
v.resetArgs()
|
|
|
|
|
v.Aux = c
|
|
|
|
|
v.AddArg(x)
|
|
|
|
|
return true
|
|
|
|
|
}
|
|
|
|
|
goto endc427f4838d2e83c00cc097b20bd20a37
|
|
|
|
|
endc427f4838d2e83c00cc097b20bd20a37:
|
|
|
|
|
;
|
|
|
|
|
// match: (MULQ (Const [c]) x)
|
|
|
|
|
// cond:
|
|
|
|
|
// result: (MULCQ [c] x)
|
|
|
|
|
{
|
|
|
|
|
if v.Args[0].Op != OpConst {
|
|
|
|
|
goto endd70de938e71150d1c9e8173c2a5b2d95
|
|
|
|
|
}
|
|
|
|
|
c := v.Args[0].Aux
|
|
|
|
|
x := v.Args[1]
|
|
|
|
|
v.Op = OpMULCQ
|
|
|
|
|
v.Aux = nil
|
|
|
|
|
v.resetArgs()
|
|
|
|
|
v.Aux = c
|
|
|
|
|
v.AddArg(x)
|
|
|
|
|
return true
|
|
|
|
|
}
|
|
|
|
|
goto endd70de938e71150d1c9e8173c2a5b2d95
|
|
|
|
|
endd70de938e71150d1c9e8173c2a5b2d95:
|
|
|
|
|
;
|
|
|
|
|
case OpMul:
|
|
|
|
|
// match: (Mul <t> x y)
|
|
|
|
|
// cond: is64BitInt(t)
|
|
|
|
|
// result: (MULQ x y)
|
|
|
|
|
{
|
|
|
|
|
t := v.Type
|
|
|
|
|
x := v.Args[0]
|
|
|
|
|
y := v.Args[1]
|
|
|
|
|
if !(is64BitInt(t)) {
|
|
|
|
|
goto endfab0d598f376ecba45a22587d50f7aff
|
|
|
|
|
}
|
|
|
|
|
v.Op = OpMULQ
|
|
|
|
|
v.Aux = nil
|
|
|
|
|
v.resetArgs()
|
|
|
|
|
v.AddArg(x)
|
|
|
|
|
v.AddArg(y)
|
|
|
|
|
return true
|
|
|
|
|
}
|
|
|
|
|
goto endfab0d598f376ecba45a22587d50f7aff
|
|
|
|
|
endfab0d598f376ecba45a22587d50f7aff:
|
2015-03-23 17:02:11 -07:00
|
|
|
;
|
|
|
|
|
case OpSETL:
|
|
|
|
|
// match: (SETL (InvertFlags x))
|
|
|
|
|
// cond:
|
|
|
|
|
// result: (SETGE x)
|
|
|
|
|
{
|
|
|
|
|
if v.Args[0].Op != OpInvertFlags {
|
2015-04-15 15:51:25 -07:00
|
|
|
goto end456c7681d48305698c1ef462d244bdc6
|
2015-03-23 17:02:11 -07:00
|
|
|
}
|
|
|
|
|
x := v.Args[0].Args[0]
|
|
|
|
|
v.Op = OpSETGE
|
|
|
|
|
v.Aux = nil
|
2015-04-15 15:51:25 -07:00
|
|
|
v.resetArgs()
|
2015-03-23 17:02:11 -07:00
|
|
|
v.AddArg(x)
|
|
|
|
|
return true
|
|
|
|
|
}
|
2015-04-15 15:51:25 -07:00
|
|
|
goto end456c7681d48305698c1ef462d244bdc6
|
|
|
|
|
end456c7681d48305698c1ef462d244bdc6:
|
2015-03-23 17:02:11 -07:00
|
|
|
;
|
|
|
|
|
case OpSUBQ:
|
2015-03-26 10:49:03 -07:00
|
|
|
// match: (SUBQ x (Const [c]))
|
2015-03-23 17:02:11 -07:00
|
|
|
// cond:
|
|
|
|
|
// result: (SUBCQ x [c])
|
|
|
|
|
{
|
|
|
|
|
x := v.Args[0]
|
2015-03-26 10:49:03 -07:00
|
|
|
if v.Args[1].Op != OpConst {
|
2015-04-15 15:51:25 -07:00
|
|
|
goto endb31e242f283867de4722665a5796008c
|
2015-03-23 17:02:11 -07:00
|
|
|
}
|
|
|
|
|
c := v.Args[1].Aux
|
|
|
|
|
v.Op = OpSUBCQ
|
|
|
|
|
v.Aux = nil
|
2015-04-15 15:51:25 -07:00
|
|
|
v.resetArgs()
|
2015-03-23 17:02:11 -07:00
|
|
|
v.AddArg(x)
|
|
|
|
|
v.Aux = c
|
|
|
|
|
return true
|
|
|
|
|
}
|
2015-04-15 15:51:25 -07:00
|
|
|
goto endb31e242f283867de4722665a5796008c
|
|
|
|
|
endb31e242f283867de4722665a5796008c:
|
2015-03-23 17:02:11 -07:00
|
|
|
;
|
2015-03-26 10:49:03 -07:00
|
|
|
// match: (SUBQ <t> (Const [c]) x)
|
2015-03-23 17:02:11 -07:00
|
|
|
// cond:
|
2015-03-26 10:49:03 -07:00
|
|
|
// result: (NEGQ (SUBCQ <t> x [c]))
|
2015-03-23 17:02:11 -07:00
|
|
|
{
|
2015-03-26 10:49:03 -07:00
|
|
|
t := v.Type
|
|
|
|
|
if v.Args[0].Op != OpConst {
|
2015-04-15 15:51:25 -07:00
|
|
|
goto end569cc755877d1f89a701378bec05c08d
|
2015-03-23 17:02:11 -07:00
|
|
|
}
|
|
|
|
|
c := v.Args[0].Aux
|
|
|
|
|
x := v.Args[1]
|
|
|
|
|
v.Op = OpNEGQ
|
|
|
|
|
v.Aux = nil
|
2015-04-15 15:51:25 -07:00
|
|
|
v.resetArgs()
|
2015-03-23 17:02:11 -07:00
|
|
|
v0 := v.Block.NewValue(OpSUBCQ, TypeInvalid, nil)
|
2015-03-26 10:49:03 -07:00
|
|
|
v0.Type = t
|
2015-03-23 17:02:11 -07:00
|
|
|
v0.AddArg(x)
|
|
|
|
|
v0.Aux = c
|
|
|
|
|
v.AddArg(v0)
|
|
|
|
|
return true
|
|
|
|
|
}
|
2015-04-15 15:51:25 -07:00
|
|
|
goto end569cc755877d1f89a701378bec05c08d
|
|
|
|
|
end569cc755877d1f89a701378bec05c08d:
|
2015-03-23 17:02:11 -07:00
|
|
|
;
|
2015-04-15 15:51:25 -07:00
|
|
|
case OpStore:
|
|
|
|
|
// match: (Store ptr val mem)
|
|
|
|
|
// cond: (is64BitInt(val.Type) || isPtr(val.Type))
|
|
|
|
|
// result: (MOVQstore [int64(0)] ptr val mem)
|
2015-03-23 17:02:11 -07:00
|
|
|
{
|
2015-04-15 15:51:25 -07:00
|
|
|
ptr := v.Args[0]
|
|
|
|
|
val := v.Args[1]
|
|
|
|
|
mem := v.Args[2]
|
|
|
|
|
if !(is64BitInt(val.Type) || isPtr(val.Type)) {
|
|
|
|
|
goto end9680b43f504bc06f9fab000823ce471a
|
2015-03-23 17:02:11 -07:00
|
|
|
}
|
2015-04-15 15:51:25 -07:00
|
|
|
v.Op = OpMOVQstore
|
2015-03-23 17:02:11 -07:00
|
|
|
v.Aux = nil
|
2015-04-15 15:51:25 -07:00
|
|
|
v.resetArgs()
|
|
|
|
|
v.Aux = int64(0)
|
|
|
|
|
v.AddArg(ptr)
|
2015-03-23 17:02:11 -07:00
|
|
|
v.AddArg(val)
|
|
|
|
|
v.AddArg(mem)
|
|
|
|
|
return true
|
|
|
|
|
}
|
2015-04-15 15:51:25 -07:00
|
|
|
goto end9680b43f504bc06f9fab000823ce471a
|
|
|
|
|
end9680b43f504bc06f9fab000823ce471a:
|
2015-03-23 17:02:11 -07:00
|
|
|
;
|
|
|
|
|
case OpSub:
|
|
|
|
|
// match: (Sub <t> x y)
|
|
|
|
|
// cond: is64BitInt(t)
|
|
|
|
|
// result: (SUBQ x y)
|
|
|
|
|
{
|
|
|
|
|
t := v.Type
|
|
|
|
|
x := v.Args[0]
|
|
|
|
|
y := v.Args[1]
|
|
|
|
|
if !(is64BitInt(t)) {
|
2015-04-15 15:51:25 -07:00
|
|
|
goto ende6ef29f885a8ecf3058212bb95917323
|
2015-03-23 17:02:11 -07:00
|
|
|
}
|
|
|
|
|
v.Op = OpSUBQ
|
|
|
|
|
v.Aux = nil
|
2015-04-15 15:51:25 -07:00
|
|
|
v.resetArgs()
|
2015-03-23 17:02:11 -07:00
|
|
|
v.AddArg(x)
|
|
|
|
|
v.AddArg(y)
|
|
|
|
|
return true
|
|
|
|
|
}
|
2015-04-15 15:51:25 -07:00
|
|
|
goto ende6ef29f885a8ecf3058212bb95917323
|
|
|
|
|
ende6ef29f885a8ecf3058212bb95917323:
|
2015-03-23 17:02:11 -07:00
|
|
|
}
|
|
|
|
|
return false
|
|
|
|
|
}
|