2016-03-01 22:57:46 +00:00
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// Copyright 2015 The Go Authors. All rights reserved.
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2015-01-19 14:34:58 -05:00
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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package obj
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import (
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2015-03-05 10:39:23 -08:00
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"bytes"
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2015-01-19 14:34:58 -05:00
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"fmt"
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2015-02-13 14:40:36 -05:00
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"log"
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2015-01-19 14:34:58 -05:00
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"os"
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2015-02-25 09:07:02 -08:00
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"strings"
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2015-01-19 14:34:58 -05:00
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"time"
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)
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2015-02-25 09:07:02 -08:00
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const REG_NONE = 0
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2015-01-19 14:34:58 -05:00
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var start time.Time
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func Cputime() float64 {
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if start.IsZero() {
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start = time.Now()
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}
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return time.Since(start).Seconds()
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}
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2015-01-21 12:27:36 -05:00
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func envOr(key, value string) string {
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if x := os.Getenv(key); x != "" {
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return x
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}
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return value
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}
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2016-09-09 08:13:16 -04:00
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var (
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GOROOT = envOr("GOROOT", defaultGOROOT)
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GOARCH = envOr("GOARCH", defaultGOARCH)
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GOOS = envOr("GOOS", defaultGOOS)
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GO386 = envOr("GO386", defaultGO386)
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GOARM = goarm()
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Version = version
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)
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2015-01-21 12:27:36 -05:00
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2016-09-09 08:13:16 -04:00
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func goarm() int {
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2015-05-13 15:28:11 -07:00
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switch v := envOr("GOARM", defaultGOARM); v {
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2015-09-07 15:00:52 +12:00
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case "5":
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return 5
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case "6":
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return 6
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case "7":
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return 7
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2015-05-13 15:28:11 -07:00
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}
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// Fail here, rather than validate at multiple call sites.
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log.Fatalf("Invalid GOARM value. Must be 5, 6, or 7.")
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panic("unreachable")
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2015-01-21 12:27:36 -05:00
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}
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2015-02-27 22:50:01 -05:00
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func Getgoextlinkenabled() string {
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return envOr("GO_EXTLINK_ENABLED", defaultGO_EXTLINK_ENABLED)
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}
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2015-01-19 14:34:58 -05:00
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func (p *Prog) Line() string {
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cmd/compile,link: generate PC-value tables with inlining information
In order to generate accurate tracebacks, the runtime needs to know the
inlined call stack for a given PC. This creates two tables per function
for this purpose. The first table is the inlining tree (stored in the
function's funcdata), which has a node containing the file, line, and
function name for every inlined call. The second table is a PC-value
table that maps each PC to a node in the inlining tree (or -1 if the PC
is not the result of inlining).
To give the appearance that inlining hasn't happened, the runtime also
needs the original source position information of inlined AST nodes.
Previously the compiler plastered over the line numbers of inlined AST
nodes with the line number of the call. This meant that the PC-line
table mapped each PC to line number of the outermost call in its inlined
call stack, with no way to access the innermost line number.
Now the compiler retains line numbers of inlined AST nodes and writes
the innermost source position information to the PC-line and PC-file
tables. Some tools and tests expect to see outermost line numbers, so we
provide the OutermostLine function for displaying line info.
To keep track of the inlined call stack for an AST node, we extend the
src.PosBase type with an index into a global inlining tree. Every time
the compiler inlines a call, it creates a node in the global inlining
tree for the call, and writes its index to the PosBase of every inlined
AST node. The parent of this node is the inlining tree index of the
call. -1 signifies no parent.
For each function, the compiler creates a local inlining tree and a
PC-value table mapping each PC to an index in the local tree. These are
written to an object file, which is read by the linker. The linker
re-encodes these tables compactly by deduplicating function names and
file names.
This change increases the size of binaries by 4-5%. For example, this is
how the go1 benchmark binary is impacted by this change:
section old bytes new bytes delta
.text 3.49M ± 0% 3.49M ± 0% +0.06%
.rodata 1.12M ± 0% 1.21M ± 0% +8.21%
.gopclntab 1.50M ± 0% 1.68M ± 0% +11.89%
.debug_line 338k ± 0% 435k ± 0% +28.78%
Total 9.21M ± 0% 9.58M ± 0% +4.01%
Updates #19348.
Change-Id: Ic4f180c3b516018138236b0c35e0218270d957d3
Reviewed-on: https://go-review.googlesource.com/37231
Run-TryBot: David Lazar <lazard@golang.org>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Austin Clements <austin@google.com>
2017-02-17 12:28:05 -05:00
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return p.Ctxt.OutermostPos(p.Pos).String()
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2015-01-19 14:34:58 -05:00
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}
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2015-03-05 10:39:23 -08:00
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var armCondCode = []string{
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".EQ",
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".NE",
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".CS",
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".CC",
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".MI",
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".PL",
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".VS",
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".VC",
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".HI",
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".LS",
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".GE",
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".LT",
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".GT",
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".LE",
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"",
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".NV",
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}
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/* ARM scond byte */
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const (
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C_SCOND = (1 << 4) - 1
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C_SBIT = 1 << 4
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C_PBIT = 1 << 5
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C_WBIT = 1 << 6
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C_FBIT = 1 << 7
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C_UBIT = 1 << 7
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C_SCOND_XOR = 14
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)
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// CConv formats ARM condition codes.
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func CConv(s uint8) string {
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if s == 0 {
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return ""
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}
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sc := armCondCode[(s&C_SCOND)^C_SCOND_XOR]
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if s&C_SBIT != 0 {
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sc += ".S"
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}
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if s&C_PBIT != 0 {
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sc += ".P"
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}
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if s&C_WBIT != 0 {
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sc += ".W"
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}
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if s&C_UBIT != 0 { /* ambiguous with FBIT */
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sc += ".U"
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}
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return sc
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}
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2015-01-19 14:34:58 -05:00
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func (p *Prog) String() string {
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2016-02-25 10:44:31 -08:00
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if p == nil {
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return "<nil Prog>"
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}
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2015-01-19 14:34:58 -05:00
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if p.Ctxt == nil {
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2015-02-28 20:31:32 +00:00
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return "<Prog without ctxt>"
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2015-01-19 14:34:58 -05:00
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}
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2015-03-05 10:39:23 -08:00
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sc := CConv(p.Scond)
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var buf bytes.Buffer
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2016-07-18 21:59:14 -07:00
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fmt.Fprintf(&buf, "%.5d (%v)\t%v%s", p.Pc, p.Line(), p.As, sc)
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2015-03-05 10:39:23 -08:00
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sep := "\t"
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cmd/internal/obj/x86: add AVX2 instrutions needed for sha1/sha512/sha256 acceleration
This means: VPSHUFB, VPSHUFD, VPERM2F128, VPALIGNR, VPADDQ, VPADDD, VPSRLDQ,
VPSLLDQ, VPSRLQ, VPSLLQ, VPSRLD, VPSLLD, VPOR, VPBLENDD, VINSERTI128,
VPERM2I128, RORXL, RORXQ.
Change-Id: Ief27190ee6acfa86b109262af5d999bc101e923d
Reviewed-on: https://go-review.googlesource.com/22606
Run-TryBot: Ilya Tocar <ilya.tocar@intel.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Russ Cox <rsc@golang.org>
2016-04-29 16:14:57 +03:00
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quadOpAmd64 := p.RegTo2 == -1
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if quadOpAmd64 {
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fmt.Fprintf(&buf, "%s$%d", sep, p.From3.Offset)
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sep = ", "
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}
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2015-03-05 10:39:23 -08:00
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if p.From.Type != TYPE_NONE {
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fmt.Fprintf(&buf, "%s%v", sep, Dconv(p, &p.From))
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sep = ", "
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}
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if p.Reg != REG_NONE {
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// Should not happen but might as well show it if it does.
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fmt.Fprintf(&buf, "%s%v", sep, Rconv(int(p.Reg)))
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sep = ", "
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}
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2015-05-27 15:01:44 -04:00
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if p.From3Type() != TYPE_NONE {
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2016-09-16 15:31:04 -07:00
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if p.From3.Type == TYPE_CONST && p.As == ATEXT {
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2015-03-05 10:39:23 -08:00
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// Special case - omit $.
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fmt.Fprintf(&buf, "%s%d", sep, p.From3.Offset)
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cmd/internal/obj/x86: add AVX2 instrutions needed for sha1/sha512/sha256 acceleration
This means: VPSHUFB, VPSHUFD, VPERM2F128, VPALIGNR, VPADDQ, VPADDD, VPSRLDQ,
VPSLLDQ, VPSRLQ, VPSLLQ, VPSRLD, VPSLLD, VPOR, VPBLENDD, VINSERTI128,
VPERM2I128, RORXL, RORXQ.
Change-Id: Ief27190ee6acfa86b109262af5d999bc101e923d
Reviewed-on: https://go-review.googlesource.com/22606
Run-TryBot: Ilya Tocar <ilya.tocar@intel.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Russ Cox <rsc@golang.org>
2016-04-29 16:14:57 +03:00
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} else if quadOpAmd64 {
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fmt.Fprintf(&buf, "%s%v", sep, Rconv(int(p.From3.Reg)))
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2015-03-05 10:39:23 -08:00
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} else {
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2015-05-27 15:01:44 -04:00
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fmt.Fprintf(&buf, "%s%v", sep, Dconv(p, p.From3))
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2015-03-05 10:39:23 -08:00
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}
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sep = ", "
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}
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if p.To.Type != TYPE_NONE {
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fmt.Fprintf(&buf, "%s%v", sep, Dconv(p, &p.To))
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}
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cmd/internal/obj/x86: add AVX2 instrutions needed for sha1/sha512/sha256 acceleration
This means: VPSHUFB, VPSHUFD, VPERM2F128, VPALIGNR, VPADDQ, VPADDD, VPSRLDQ,
VPSLLDQ, VPSRLQ, VPSLLQ, VPSRLD, VPSLLD, VPOR, VPBLENDD, VINSERTI128,
VPERM2I128, RORXL, RORXQ.
Change-Id: Ief27190ee6acfa86b109262af5d999bc101e923d
Reviewed-on: https://go-review.googlesource.com/22606
Run-TryBot: Ilya Tocar <ilya.tocar@intel.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Russ Cox <rsc@golang.org>
2016-04-29 16:14:57 +03:00
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if p.RegTo2 != REG_NONE && !quadOpAmd64 {
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2015-05-21 17:51:34 -04:00
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fmt.Fprintf(&buf, "%s%v", sep, Rconv(int(p.RegTo2)))
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cmd/internal/obj, cmd/internal/obj/arm64: add support for GOARCH=arm64
ARM64 (ARMv8) has 32 general purpose, 64-bit integer registers
(R0-R31), 32 64-bit scalar floating point registers (F0-F31), and
32 128-bit vector registers (unused, V0-V31).
R31 is either the stack pointer (RSP), or the zero register (ZR),
depending on the instruction. Note the distinction between the
hardware stack pointer, RSP, and the virtual stack pointer SP.
The (hardware) stack pointer must be 16-byte aligned at all times;
the RSP register itself must be aligned, offset(RSP) only has to
have natural alignment.
Instructions are fixed-width, and are 32-bit wide. ARM64 supports
ARMv7 too (32-bit ARM), but not in the same process. In general,
there is not much in common between 32-bit ARM and ARM64, it's a
new architecture.
All implementations have floating point instructions.
This change adds a Prog.To3 field analogous to Prog.To. It is used
by exclusive load/store instructions such as STLXR which read from
one register, and write to both a register and a memory address.
STLXRW R1, (R0), R3
This will store the word contained in R1 to the memory address
pointed by R0. R3 will be updated with the status result of the
store. It is used to implement atomic operations.
No other changes are made to the portable Prog and Addr structures.
Change-Id: Ie839029aa5265bbad35769d9689eca11e1c48c47
Reviewed-on: https://go-review.googlesource.com/7046
Reviewed-by: Russ Cox <rsc@golang.org>
2015-03-08 13:58:16 +01:00
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}
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2015-03-05 10:39:23 -08:00
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return buf.String()
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2015-01-19 14:34:58 -05:00
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}
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2015-01-21 21:45:29 -05:00
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func (ctxt *Link) NewProg() *Prog {
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2016-02-24 09:53:27 -08:00
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var p *Prog
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if i := ctxt.allocIdx; i < len(ctxt.progs) {
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p = &ctxt.progs[i]
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ctxt.allocIdx = i + 1
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} else {
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p = new(Prog) // should be the only call to this; all others should use ctxt.NewProg
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}
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2015-01-21 21:45:29 -05:00
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p.Ctxt = ctxt
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return p
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}
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2016-02-24 09:53:27 -08:00
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func (ctxt *Link) freeProgs() {
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s := ctxt.progs[:ctxt.allocIdx]
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for i := range s {
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s[i] = Prog{}
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}
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ctxt.allocIdx = 0
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}
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[dev.cc] cmd/internal/obj: reconvert from liblink
cmd/internal/obj reconverted using rsc.io/c2go rev 2a95256.
- Brings in new, more regular Prog, Addr definitions
- Add Prog* argument to oclass in liblink/asm[68].c, for c2go conversion.
- Update objwriter for change in TEXT size encoding.
- Merge 5a, 6a, 8a, 9a changes into new5a, new6a, new8a, new9a (by hand).
- Add +build ignore to cmd/asm/internal/{addr,arch,asm}, cmd/asm.
They need to be updated for the changes.
- Reenable verifyAsm in cmd/go.
- Reenable GOOBJ=2 mode by default in liblink.
All architectures build successfully again.
Change-Id: I2c845c5d365aa484b570476898171bee657b626d
Reviewed-on: https://go-review.googlesource.com/3963
Reviewed-by: Rob Pike <r@golang.org>
2015-02-05 03:57:44 -05:00
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2015-02-25 09:07:02 -08:00
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func (ctxt *Link) Dconv(a *Addr) string {
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2015-02-26 17:09:16 -08:00
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return Dconv(nil, a)
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2015-02-25 09:07:02 -08:00
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}
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2015-02-26 17:09:16 -08:00
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func Dconv(p *Prog, a *Addr) string {
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2015-02-25 09:07:02 -08:00
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var str string
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switch a.Type {
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default:
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str = fmt.Sprintf("type=%d", a.Type)
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case TYPE_NONE:
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str = ""
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if a.Name != NAME_NONE || a.Reg != 0 || a.Sym != nil {
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2015-02-26 17:09:16 -08:00
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str = fmt.Sprintf("%v(%v)(NONE)", Mconv(a), Rconv(int(a.Reg)))
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2015-02-25 09:07:02 -08:00
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}
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case TYPE_REG:
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// TODO(rsc): This special case is for x86 instructions like
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// PINSRQ CX,$1,X6
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// where the $1 is included in the p->to Addr.
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// Move into a new field.
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if a.Offset != 0 {
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str = fmt.Sprintf("$%d,%v", a.Offset, Rconv(int(a.Reg)))
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break
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}
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2015-04-20 13:50:46 -07:00
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str = Rconv(int(a.Reg))
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2015-05-14 20:11:28 -07:00
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if a.Name != NAME_NONE || a.Sym != nil {
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2015-02-26 17:09:16 -08:00
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str = fmt.Sprintf("%v(%v)(REG)", Mconv(a), Rconv(int(a.Reg)))
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2015-02-25 09:07:02 -08:00
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}
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case TYPE_BRANCH:
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if a.Sym != nil {
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str = fmt.Sprintf("%s(SB)", a.Sym.Name)
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} else if p != nil && p.Pcond != nil {
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2015-04-20 13:50:46 -07:00
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str = fmt.Sprint(p.Pcond.Pc)
|
2015-03-16 15:54:44 -04:00
|
|
|
} else if a.Val != nil {
|
2015-04-20 13:50:46 -07:00
|
|
|
str = fmt.Sprint(a.Val.(*Prog).Pc)
|
2015-02-25 09:07:02 -08:00
|
|
|
} else {
|
|
|
|
|
str = fmt.Sprintf("%d(PC)", a.Offset)
|
|
|
|
|
}
|
|
|
|
|
|
2015-02-26 10:58:48 -08:00
|
|
|
case TYPE_INDIR:
|
2015-02-26 17:09:16 -08:00
|
|
|
str = fmt.Sprintf("*%s", Mconv(a))
|
2015-02-26 10:58:48 -08:00
|
|
|
|
2015-02-25 09:07:02 -08:00
|
|
|
case TYPE_MEM:
|
2015-02-26 17:09:16 -08:00
|
|
|
str = Mconv(a)
|
2015-02-25 09:07:02 -08:00
|
|
|
if a.Index != REG_NONE {
|
|
|
|
|
str += fmt.Sprintf("(%v*%d)", Rconv(int(a.Index)), int(a.Scale))
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case TYPE_CONST:
|
|
|
|
|
if a.Reg != 0 {
|
2015-02-26 17:09:16 -08:00
|
|
|
str = fmt.Sprintf("$%v(%v)", Mconv(a), Rconv(int(a.Reg)))
|
2015-02-25 09:07:02 -08:00
|
|
|
} else {
|
2015-02-26 17:09:16 -08:00
|
|
|
str = fmt.Sprintf("$%v", Mconv(a))
|
2015-02-25 09:07:02 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case TYPE_TEXTSIZE:
|
2015-03-16 15:54:44 -04:00
|
|
|
if a.Val.(int32) == ArgsSizeUnknown {
|
2015-02-25 09:07:02 -08:00
|
|
|
str = fmt.Sprintf("$%d", a.Offset)
|
|
|
|
|
} else {
|
2015-03-16 15:54:44 -04:00
|
|
|
str = fmt.Sprintf("$%d-%d", a.Offset, a.Val.(int32))
|
2015-02-25 09:07:02 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case TYPE_FCONST:
|
2015-03-16 15:54:44 -04:00
|
|
|
str = fmt.Sprintf("%.17g", a.Val.(float64))
|
2015-02-25 09:07:02 -08:00
|
|
|
// Make sure 1 prints as 1.0
|
|
|
|
|
if !strings.ContainsAny(str, ".e") {
|
|
|
|
|
str += ".0"
|
|
|
|
|
}
|
|
|
|
|
str = fmt.Sprintf("$(%s)", str)
|
|
|
|
|
|
|
|
|
|
case TYPE_SCONST:
|
2015-03-16 15:54:44 -04:00
|
|
|
str = fmt.Sprintf("$%q", a.Val.(string))
|
2015-02-25 09:07:02 -08:00
|
|
|
|
|
|
|
|
case TYPE_ADDR:
|
2015-02-26 17:09:16 -08:00
|
|
|
str = fmt.Sprintf("$%s", Mconv(a))
|
2015-02-25 09:07:02 -08:00
|
|
|
|
|
|
|
|
case TYPE_SHIFT:
|
|
|
|
|
v := int(a.Offset)
|
2016-08-10 13:24:03 -04:00
|
|
|
ops := "<<>>->@>"
|
2016-09-09 08:13:16 -04:00
|
|
|
switch GOARCH {
|
2016-08-10 13:24:03 -04:00
|
|
|
case "arm":
|
|
|
|
|
op := ops[((v>>5)&3)<<1:]
|
|
|
|
|
if v&(1<<4) != 0 {
|
|
|
|
|
str = fmt.Sprintf("R%d%c%cR%d", v&15, op[0], op[1], (v>>8)&15)
|
|
|
|
|
} else {
|
|
|
|
|
str = fmt.Sprintf("R%d%c%c%d", v&15, op[0], op[1], (v>>7)&31)
|
|
|
|
|
}
|
|
|
|
|
if a.Reg != 0 {
|
|
|
|
|
str += fmt.Sprintf("(%v)", Rconv(int(a.Reg)))
|
|
|
|
|
}
|
|
|
|
|
case "arm64":
|
|
|
|
|
op := ops[((v>>22)&3)<<1:]
|
|
|
|
|
str = fmt.Sprintf("R%d%c%c%d", (v>>16)&31, op[0], op[1], (v>>10)&63)
|
|
|
|
|
default:
|
2016-09-09 08:13:16 -04:00
|
|
|
panic("TYPE_SHIFT is not supported on " + GOARCH)
|
2015-02-25 09:07:02 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case TYPE_REGREG:
|
|
|
|
|
str = fmt.Sprintf("(%v, %v)", Rconv(int(a.Reg)), Rconv(int(a.Offset)))
|
|
|
|
|
|
|
|
|
|
case TYPE_REGREG2:
|
|
|
|
|
str = fmt.Sprintf("%v, %v", Rconv(int(a.Reg)), Rconv(int(a.Offset)))
|
2015-02-27 13:50:26 -08:00
|
|
|
|
|
|
|
|
case TYPE_REGLIST:
|
|
|
|
|
str = regListConv(int(a.Offset))
|
2015-02-25 09:07:02 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return str
|
|
|
|
|
}
|
|
|
|
|
|
2015-02-26 17:09:16 -08:00
|
|
|
func Mconv(a *Addr) string {
|
2015-02-25 09:07:02 -08:00
|
|
|
var str string
|
|
|
|
|
|
|
|
|
|
switch a.Name {
|
|
|
|
|
default:
|
|
|
|
|
str = fmt.Sprintf("name=%d", a.Name)
|
|
|
|
|
|
|
|
|
|
case NAME_NONE:
|
|
|
|
|
switch {
|
|
|
|
|
case a.Reg == REG_NONE:
|
2015-04-20 13:50:46 -07:00
|
|
|
str = fmt.Sprint(a.Offset)
|
2015-02-25 09:07:02 -08:00
|
|
|
case a.Offset == 0:
|
|
|
|
|
str = fmt.Sprintf("(%v)", Rconv(int(a.Reg)))
|
|
|
|
|
case a.Offset != 0:
|
|
|
|
|
str = fmt.Sprintf("%d(%v)", a.Offset, Rconv(int(a.Reg)))
|
|
|
|
|
}
|
|
|
|
|
|
2017-02-19 09:37:22 -08:00
|
|
|
// Note: a.Reg == REG_NONE encodes the default base register for the NAME_ type.
|
2015-02-25 09:07:02 -08:00
|
|
|
case NAME_EXTERN:
|
2017-02-19 09:37:22 -08:00
|
|
|
reg := "SB"
|
|
|
|
|
if a.Reg != REG_NONE {
|
|
|
|
|
reg = Rconv(int(a.Reg))
|
|
|
|
|
}
|
2015-09-15 10:59:27 -07:00
|
|
|
if a.Sym != nil {
|
2017-02-19 09:37:22 -08:00
|
|
|
str = fmt.Sprintf("%s%s(%s)", a.Sym.Name, offConv(a.Offset), reg)
|
2015-09-15 10:59:27 -07:00
|
|
|
} else {
|
2017-02-19 09:37:22 -08:00
|
|
|
str = fmt.Sprintf("%s(%s)", offConv(a.Offset), reg)
|
2015-09-15 10:59:27 -07:00
|
|
|
}
|
2015-02-25 09:07:02 -08:00
|
|
|
|
2015-03-30 00:49:25 +00:00
|
|
|
case NAME_GOTREF:
|
2017-02-19 09:37:22 -08:00
|
|
|
reg := "SB"
|
|
|
|
|
if a.Reg != REG_NONE {
|
|
|
|
|
reg = Rconv(int(a.Reg))
|
|
|
|
|
}
|
2015-09-15 10:59:27 -07:00
|
|
|
if a.Sym != nil {
|
2017-02-19 09:37:22 -08:00
|
|
|
str = fmt.Sprintf("%s%s@GOT(%s)", a.Sym.Name, offConv(a.Offset), reg)
|
2015-09-15 10:59:27 -07:00
|
|
|
} else {
|
2017-02-19 09:37:22 -08:00
|
|
|
str = fmt.Sprintf("%s@GOT(%s)", offConv(a.Offset), reg)
|
2015-09-15 10:59:27 -07:00
|
|
|
}
|
2015-03-30 00:49:25 +00:00
|
|
|
|
2015-02-25 09:07:02 -08:00
|
|
|
case NAME_STATIC:
|
2017-02-19 09:37:22 -08:00
|
|
|
reg := "SB"
|
|
|
|
|
if a.Reg != REG_NONE {
|
|
|
|
|
reg = Rconv(int(a.Reg))
|
|
|
|
|
}
|
2015-09-15 10:59:27 -07:00
|
|
|
if a.Sym != nil {
|
2017-02-19 09:37:22 -08:00
|
|
|
str = fmt.Sprintf("%s<>%s(%s)", a.Sym.Name, offConv(a.Offset), reg)
|
2015-09-15 10:59:27 -07:00
|
|
|
} else {
|
2017-02-19 09:37:22 -08:00
|
|
|
str = fmt.Sprintf("<>%s(%s)", offConv(a.Offset), reg)
|
2015-09-15 10:59:27 -07:00
|
|
|
}
|
2015-02-25 09:07:02 -08:00
|
|
|
|
|
|
|
|
case NAME_AUTO:
|
2017-02-19 09:37:22 -08:00
|
|
|
reg := "SP"
|
|
|
|
|
if a.Reg != REG_NONE {
|
|
|
|
|
reg = Rconv(int(a.Reg))
|
|
|
|
|
}
|
2015-02-25 09:07:02 -08:00
|
|
|
if a.Sym != nil {
|
2017-02-19 09:37:22 -08:00
|
|
|
str = fmt.Sprintf("%s%s(%s)", a.Sym.Name, offConv(a.Offset), reg)
|
2015-02-25 09:07:02 -08:00
|
|
|
} else {
|
2017-02-19 09:37:22 -08:00
|
|
|
str = fmt.Sprintf("%s(%s)", offConv(a.Offset), reg)
|
2015-02-25 09:07:02 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case NAME_PARAM:
|
2017-02-19 09:37:22 -08:00
|
|
|
reg := "FP"
|
|
|
|
|
if a.Reg != REG_NONE {
|
|
|
|
|
reg = Rconv(int(a.Reg))
|
|
|
|
|
}
|
2015-02-25 09:07:02 -08:00
|
|
|
if a.Sym != nil {
|
2017-02-19 09:37:22 -08:00
|
|
|
str = fmt.Sprintf("%s%s(%s)", a.Sym.Name, offConv(a.Offset), reg)
|
2015-02-25 09:07:02 -08:00
|
|
|
} else {
|
2017-02-19 09:37:22 -08:00
|
|
|
str = fmt.Sprintf("%s(%s)", offConv(a.Offset), reg)
|
2015-02-25 09:07:02 -08:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
return str
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
func offConv(off int64) string {
|
|
|
|
|
if off == 0 {
|
|
|
|
|
return ""
|
|
|
|
|
}
|
|
|
|
|
return fmt.Sprintf("%+d", off)
|
|
|
|
|
}
|
2015-02-26 17:09:16 -08:00
|
|
|
|
|
|
|
|
type regSet struct {
|
|
|
|
|
lo int
|
|
|
|
|
hi int
|
|
|
|
|
Rconv func(int) string
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Few enough architectures that a linear scan is fastest.
|
|
|
|
|
// Not even worth sorting.
|
|
|
|
|
var regSpace []regSet
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
Each architecture defines a register space as a unique
|
|
|
|
|
integer range.
|
|
|
|
|
Here is the list of architectures and the base of their register spaces.
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
const (
|
|
|
|
|
// Because of masking operations in the encodings, each register
|
|
|
|
|
// space should start at 0 modulo some power of 2.
|
2016-10-18 23:50:37 +02:00
|
|
|
RBase386 = 1 * 1024
|
|
|
|
|
RBaseAMD64 = 2 * 1024
|
|
|
|
|
RBaseARM = 3 * 1024
|
|
|
|
|
RBasePPC64 = 4 * 1024 // range [4k, 8k)
|
|
|
|
|
RBaseARM64 = 8 * 1024 // range [8k, 13k)
|
|
|
|
|
RBaseMIPS = 13 * 1024 // range [13k, 14k)
|
|
|
|
|
RBaseS390X = 14 * 1024 // range [14k, 15k)
|
2015-02-26 17:09:16 -08:00
|
|
|
)
|
|
|
|
|
|
|
|
|
|
// RegisterRegister binds a pretty-printer (Rconv) for register
|
2016-03-01 23:21:55 +00:00
|
|
|
// numbers to a given register number range. Lo is inclusive,
|
2015-02-26 17:09:16 -08:00
|
|
|
// hi exclusive (valid registers are lo through hi-1).
|
|
|
|
|
func RegisterRegister(lo, hi int, Rconv func(int) string) {
|
|
|
|
|
regSpace = append(regSpace, regSet{lo, hi, Rconv})
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
func Rconv(reg int) string {
|
|
|
|
|
if reg == REG_NONE {
|
|
|
|
|
return "NONE"
|
|
|
|
|
}
|
|
|
|
|
for i := range regSpace {
|
|
|
|
|
rs := ®Space[i]
|
|
|
|
|
if rs.lo <= reg && reg < rs.hi {
|
|
|
|
|
return rs.Rconv(reg)
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
return fmt.Sprintf("R???%d", reg)
|
|
|
|
|
}
|
2015-02-27 13:50:26 -08:00
|
|
|
|
|
|
|
|
func regListConv(list int) string {
|
|
|
|
|
str := ""
|
|
|
|
|
|
|
|
|
|
for i := 0; i < 16; i++ { // TODO: 16 is ARM-specific.
|
|
|
|
|
if list&(1<<uint(i)) != 0 {
|
|
|
|
|
if str == "" {
|
|
|
|
|
str += "["
|
|
|
|
|
} else {
|
|
|
|
|
str += ","
|
|
|
|
|
}
|
|
|
|
|
// This is ARM-specific; R10 is g.
|
|
|
|
|
if i == 10 {
|
|
|
|
|
str += "g"
|
|
|
|
|
} else {
|
|
|
|
|
str += fmt.Sprintf("R%d", i)
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
str += "]"
|
|
|
|
|
return str
|
|
|
|
|
}
|
2015-03-02 20:17:20 -08:00
|
|
|
|
|
|
|
|
type opSet struct {
|
2016-03-07 18:00:08 -08:00
|
|
|
lo As
|
2015-03-02 20:17:20 -08:00
|
|
|
names []string
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Not even worth sorting
|
|
|
|
|
var aSpace []opSet
|
|
|
|
|
|
|
|
|
|
// RegisterOpcode binds a list of instruction names
|
|
|
|
|
// to a given instruction number range.
|
2016-03-07 18:00:08 -08:00
|
|
|
func RegisterOpcode(lo As, Anames []string) {
|
2016-06-17 12:28:31 -07:00
|
|
|
if len(Anames) > AllowedOpCodes {
|
|
|
|
|
panic(fmt.Sprintf("too many instructions, have %d max %d", len(Anames), AllowedOpCodes))
|
|
|
|
|
}
|
2015-03-02 20:17:20 -08:00
|
|
|
aSpace = append(aSpace, opSet{lo, Anames})
|
|
|
|
|
}
|
|
|
|
|
|
2016-07-18 21:59:14 -07:00
|
|
|
func (a As) String() string {
|
2016-03-07 18:00:08 -08:00
|
|
|
if 0 <= a && int(a) < len(Anames) {
|
2015-03-02 20:17:20 -08:00
|
|
|
return Anames[a]
|
|
|
|
|
}
|
|
|
|
|
for i := range aSpace {
|
|
|
|
|
as := &aSpace[i]
|
2016-03-07 18:00:08 -08:00
|
|
|
if as.lo <= a && int(a-as.lo) < len(as.names) {
|
2015-03-02 20:17:20 -08:00
|
|
|
return as.names[a-as.lo]
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
return fmt.Sprintf("A???%d", a)
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
var Anames = []string{
|
|
|
|
|
"XXX",
|
|
|
|
|
"CALL",
|
|
|
|
|
"DUFFCOPY",
|
|
|
|
|
"DUFFZERO",
|
|
|
|
|
"END",
|
|
|
|
|
"FUNCDATA",
|
|
|
|
|
"JMP",
|
|
|
|
|
"NOP",
|
|
|
|
|
"PCDATA",
|
|
|
|
|
"RET",
|
|
|
|
|
"TEXT",
|
|
|
|
|
"UNDEF",
|
|
|
|
|
"VARDEF",
|
|
|
|
|
"VARKILL",
|
2016-01-13 21:02:12 -05:00
|
|
|
"VARLIVE",
|
2015-03-02 20:17:20 -08:00
|
|
|
}
|
2015-04-22 12:41:14 +12:00
|
|
|
|
|
|
|
|
func Bool2int(b bool) int {
|
2016-08-18 18:24:21 -07:00
|
|
|
// The compiler currently only optimizes this form.
|
|
|
|
|
// See issue 6011.
|
|
|
|
|
var i int
|
2015-04-22 12:41:14 +12:00
|
|
|
if b {
|
2016-08-18 18:24:21 -07:00
|
|
|
i = 1
|
|
|
|
|
} else {
|
|
|
|
|
i = 0
|
2015-04-22 12:41:14 +12:00
|
|
|
}
|
2016-08-18 18:24:21 -07:00
|
|
|
return i
|
2015-04-22 12:41:14 +12:00
|
|
|
}
|