2016-03-01 22:57:46 +00:00
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// Copyright 2015 The Go Authors. All rights reserved.
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2015-01-19 14:34:58 -05:00
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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package obj
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import (
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2015-03-05 10:39:23 -08:00
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"bytes"
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2024-04-02 11:12:44 -04:00
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"cmd/internal/objabi"
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2015-01-19 14:34:58 -05:00
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"fmt"
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2023-04-17 16:50:00 -04:00
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"internal/abi"
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2021-04-15 23:05:49 -04:00
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"internal/buildcfg"
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2020-01-26 09:59:25 -08:00
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"io"
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2015-02-25 09:07:02 -08:00
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"strings"
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2015-01-19 14:34:58 -05:00
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)
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2015-02-25 09:07:02 -08:00
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const REG_NONE = 0
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cmd/compile: add line numbers to values & blocks in ssa.html
In order to improve the line numbering for debuggers,
it's necessary to trace lines through compilation.
This makes it (much) easier to follow.
The format of the last column of the ssa.html output was
also changed to reduce the spamminess of the file name,
which is usually the same and makes it far harder to read
instructions and line numbers, and to make it wider and also
able to break words when wrapping (long path names still
can push off the end otherwise; side-to-side scrolling was
tried but was more annoying than the occasional wrapped
line).
Sample output now, where [...] is elision for sake of making
the CL character-counter happy -- and the (##) line numbers
are rendered in italics and a smaller font (11 point) under
control of a CSS class "line-number".
genssa
# /Users/drchase/[...]/ssa/testdata/hist.go
00000 (35) TEXT "".main(SB)
00001 (35) FUNCDATA $0, gclocals·7be4bb[...]1e8b(SB)
00002 (35) FUNCDATA $1, gclocals·9ab98a[...]4568(SB)
v920 00003 (36) LEAQ ""..autotmp_31-640(SP), DI
v858 00004 (36) XORPS X0, X0
v6 00005 (36) LEAQ -48(DI), DI
v6 00006 (36) DUFFZERO $277
v576 00007 (36) LEAQ ""..autotmp_31-640(SP), AX
v10 00008 (36) TESTB AX, (AX)
b1 00009 (36) JMP 10
and from an earlier phase:
b18: ← b17
v242 (47) = Copy <mem> v238
v243 (47) = VarKill <mem> {.autotmp_16} v242
v244 (48) = Addr <**bufio.Scanner> {scanner} v2
v245 (48) = Load <*bufio.Scanner> v244 v243
[...]
v279 (49) = Store <mem> {int64} v277 v276 v278
v280 (49) = Addr <*error> {.autotmp_18} v2
v281 (49) = Load <error> v280 v279
v282 (49) = Addr <*error> {err} v2
v283 (49) = VarDef <mem> {err} v279
v284 (49) = Store <mem> {error} v282 v281 v283
v285 (47) = VarKill <mem> {.autotmp_18} v284
v286 (47) = VarKill <mem> {.autotmp_17} v285
v287 (50) = Addr <*error> {err} v2
v288 (50) = Load <error> v287 v286
v289 (50) = NeqInter <bool> v288 v51
If v289 → b21 b22 (line 50)
Change-Id: I3f46310918f965761f59e6f03ea53067237c28a8
Reviewed-on: https://go-review.googlesource.com/69591
Run-TryBot: David Chase <drchase@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-10-10 14:44:15 -04:00
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// Line returns a string containing the filename and line number for p
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2015-01-19 14:34:58 -05:00
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func (p *Prog) Line() string {
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2017-11-10 11:38:51 -08:00
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return p.Ctxt.OutermostPos(p.Pos).Format(false, true)
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2015-01-19 14:34:58 -05:00
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}
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2020-01-26 09:59:25 -08:00
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func (p *Prog) InnermostLine(w io.Writer) {
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p.Ctxt.InnermostPos(p.Pos).WriteTo(w, false, true)
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2018-12-07 10:00:36 -08:00
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}
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2015-01-19 14:34:58 -05:00
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2017-11-20 16:47:08 -05:00
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// InnermostLineNumber returns a string containing the line number for the
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// innermost inlined function (if any inlining) at p's position
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func (p *Prog) InnermostLineNumber() string {
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2018-01-03 17:14:55 -05:00
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return p.Ctxt.InnermostPos(p.Pos).LineNumber()
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}
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// InnermostLineNumberHTML returns a string containing the line number for the
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// innermost inlined function (if any inlining) at p's position
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func (p *Prog) InnermostLineNumberHTML() string {
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return p.Ctxt.InnermostPos(p.Pos).LineNumberHTML()
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cmd/compile: add line numbers to values & blocks in ssa.html
In order to improve the line numbering for debuggers,
it's necessary to trace lines through compilation.
This makes it (much) easier to follow.
The format of the last column of the ssa.html output was
also changed to reduce the spamminess of the file name,
which is usually the same and makes it far harder to read
instructions and line numbers, and to make it wider and also
able to break words when wrapping (long path names still
can push off the end otherwise; side-to-side scrolling was
tried but was more annoying than the occasional wrapped
line).
Sample output now, where [...] is elision for sake of making
the CL character-counter happy -- and the (##) line numbers
are rendered in italics and a smaller font (11 point) under
control of a CSS class "line-number".
genssa
# /Users/drchase/[...]/ssa/testdata/hist.go
00000 (35) TEXT "".main(SB)
00001 (35) FUNCDATA $0, gclocals·7be4bb[...]1e8b(SB)
00002 (35) FUNCDATA $1, gclocals·9ab98a[...]4568(SB)
v920 00003 (36) LEAQ ""..autotmp_31-640(SP), DI
v858 00004 (36) XORPS X0, X0
v6 00005 (36) LEAQ -48(DI), DI
v6 00006 (36) DUFFZERO $277
v576 00007 (36) LEAQ ""..autotmp_31-640(SP), AX
v10 00008 (36) TESTB AX, (AX)
b1 00009 (36) JMP 10
and from an earlier phase:
b18: ← b17
v242 (47) = Copy <mem> v238
v243 (47) = VarKill <mem> {.autotmp_16} v242
v244 (48) = Addr <**bufio.Scanner> {scanner} v2
v245 (48) = Load <*bufio.Scanner> v244 v243
[...]
v279 (49) = Store <mem> {int64} v277 v276 v278
v280 (49) = Addr <*error> {.autotmp_18} v2
v281 (49) = Load <error> v280 v279
v282 (49) = Addr <*error> {err} v2
v283 (49) = VarDef <mem> {err} v279
v284 (49) = Store <mem> {error} v282 v281 v283
v285 (47) = VarKill <mem> {.autotmp_18} v284
v286 (47) = VarKill <mem> {.autotmp_17} v285
v287 (50) = Addr <*error> {err} v2
v288 (50) = Load <error> v287 v286
v289 (50) = NeqInter <bool> v288 v51
If v289 → b21 b22 (line 50)
Change-Id: I3f46310918f965761f59e6f03ea53067237c28a8
Reviewed-on: https://go-review.googlesource.com/69591
Run-TryBot: David Chase <drchase@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-10-10 14:44:15 -04:00
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}
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2017-11-20 16:47:08 -05:00
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// InnermostFilename returns a string containing the innermost
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// (in inlining) filename at p's position
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func (p *Prog) InnermostFilename() string {
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// TODO For now, this is only used for debugging output, and if we need more/better information, it might change.
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// An example of what we might want to see is the full stack of positions for inlined code, so we get some visibility into what is recorded there.
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pos := p.Ctxt.InnermostPos(p.Pos)
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cmd/compile: add line numbers to values & blocks in ssa.html
In order to improve the line numbering for debuggers,
it's necessary to trace lines through compilation.
This makes it (much) easier to follow.
The format of the last column of the ssa.html output was
also changed to reduce the spamminess of the file name,
which is usually the same and makes it far harder to read
instructions and line numbers, and to make it wider and also
able to break words when wrapping (long path names still
can push off the end otherwise; side-to-side scrolling was
tried but was more annoying than the occasional wrapped
line).
Sample output now, where [...] is elision for sake of making
the CL character-counter happy -- and the (##) line numbers
are rendered in italics and a smaller font (11 point) under
control of a CSS class "line-number".
genssa
# /Users/drchase/[...]/ssa/testdata/hist.go
00000 (35) TEXT "".main(SB)
00001 (35) FUNCDATA $0, gclocals·7be4bb[...]1e8b(SB)
00002 (35) FUNCDATA $1, gclocals·9ab98a[...]4568(SB)
v920 00003 (36) LEAQ ""..autotmp_31-640(SP), DI
v858 00004 (36) XORPS X0, X0
v6 00005 (36) LEAQ -48(DI), DI
v6 00006 (36) DUFFZERO $277
v576 00007 (36) LEAQ ""..autotmp_31-640(SP), AX
v10 00008 (36) TESTB AX, (AX)
b1 00009 (36) JMP 10
and from an earlier phase:
b18: ← b17
v242 (47) = Copy <mem> v238
v243 (47) = VarKill <mem> {.autotmp_16} v242
v244 (48) = Addr <**bufio.Scanner> {scanner} v2
v245 (48) = Load <*bufio.Scanner> v244 v243
[...]
v279 (49) = Store <mem> {int64} v277 v276 v278
v280 (49) = Addr <*error> {.autotmp_18} v2
v281 (49) = Load <error> v280 v279
v282 (49) = Addr <*error> {err} v2
v283 (49) = VarDef <mem> {err} v279
v284 (49) = Store <mem> {error} v282 v281 v283
v285 (47) = VarKill <mem> {.autotmp_18} v284
v286 (47) = VarKill <mem> {.autotmp_17} v285
v287 (50) = Addr <*error> {err} v2
v288 (50) = Load <error> v287 v286
v289 (50) = NeqInter <bool> v288 v51
If v289 → b21 b22 (line 50)
Change-Id: I3f46310918f965761f59e6f03ea53067237c28a8
Reviewed-on: https://go-review.googlesource.com/69591
Run-TryBot: David Chase <drchase@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-10-10 14:44:15 -04:00
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if !pos.IsKnown() {
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return "<unknown file name>"
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}
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return pos.Filename()
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}
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2015-03-05 10:39:23 -08:00
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var armCondCode = []string{
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".EQ",
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".NE",
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".CS",
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".CC",
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".MI",
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".PL",
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".VS",
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".VC",
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".HI",
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".LS",
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".GE",
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".LT",
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".GT",
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".LE",
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"",
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".NV",
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}
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/* ARM scond byte */
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const (
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C_SCOND = (1 << 4) - 1
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C_SBIT = 1 << 4
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C_PBIT = 1 << 5
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C_WBIT = 1 << 6
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C_FBIT = 1 << 7
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C_UBIT = 1 << 7
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C_SCOND_XOR = 14
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)
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2018-05-16 02:21:59 +03:00
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// CConv formats opcode suffix bits (Prog.Scond).
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2015-03-05 10:39:23 -08:00
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func CConv(s uint8) string {
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if s == 0 {
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return ""
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}
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2018-05-16 02:21:59 +03:00
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for i := range opSuffixSpace {
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sset := &opSuffixSpace[i]
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2021-04-15 23:05:49 -04:00
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if sset.arch == buildcfg.GOARCH {
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2018-05-16 02:21:59 +03:00
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return sset.cconv(s)
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}
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}
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return fmt.Sprintf("SC???%d", s)
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}
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// CConvARM formats ARM opcode suffix bits (mostly condition codes).
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func CConvARM(s uint8) string {
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// TODO: could be great to move suffix-related things into
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// ARM asm backends some day.
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// obj/x86 can be used as an example.
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2015-03-05 10:39:23 -08:00
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sc := armCondCode[(s&C_SCOND)^C_SCOND_XOR]
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if s&C_SBIT != 0 {
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sc += ".S"
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}
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if s&C_PBIT != 0 {
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sc += ".P"
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}
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if s&C_WBIT != 0 {
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sc += ".W"
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}
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if s&C_UBIT != 0 { /* ambiguous with FBIT */
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sc += ".U"
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}
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return sc
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}
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2015-01-19 14:34:58 -05:00
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func (p *Prog) String() string {
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2016-02-25 10:44:31 -08:00
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if p == nil {
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return "<nil Prog>"
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}
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cmd/compile: add line numbers to values & blocks in ssa.html
In order to improve the line numbering for debuggers,
it's necessary to trace lines through compilation.
This makes it (much) easier to follow.
The format of the last column of the ssa.html output was
also changed to reduce the spamminess of the file name,
which is usually the same and makes it far harder to read
instructions and line numbers, and to make it wider and also
able to break words when wrapping (long path names still
can push off the end otherwise; side-to-side scrolling was
tried but was more annoying than the occasional wrapped
line).
Sample output now, where [...] is elision for sake of making
the CL character-counter happy -- and the (##) line numbers
are rendered in italics and a smaller font (11 point) under
control of a CSS class "line-number".
genssa
# /Users/drchase/[...]/ssa/testdata/hist.go
00000 (35) TEXT "".main(SB)
00001 (35) FUNCDATA $0, gclocals·7be4bb[...]1e8b(SB)
00002 (35) FUNCDATA $1, gclocals·9ab98a[...]4568(SB)
v920 00003 (36) LEAQ ""..autotmp_31-640(SP), DI
v858 00004 (36) XORPS X0, X0
v6 00005 (36) LEAQ -48(DI), DI
v6 00006 (36) DUFFZERO $277
v576 00007 (36) LEAQ ""..autotmp_31-640(SP), AX
v10 00008 (36) TESTB AX, (AX)
b1 00009 (36) JMP 10
and from an earlier phase:
b18: ← b17
v242 (47) = Copy <mem> v238
v243 (47) = VarKill <mem> {.autotmp_16} v242
v244 (48) = Addr <**bufio.Scanner> {scanner} v2
v245 (48) = Load <*bufio.Scanner> v244 v243
[...]
v279 (49) = Store <mem> {int64} v277 v276 v278
v280 (49) = Addr <*error> {.autotmp_18} v2
v281 (49) = Load <error> v280 v279
v282 (49) = Addr <*error> {err} v2
v283 (49) = VarDef <mem> {err} v279
v284 (49) = Store <mem> {error} v282 v281 v283
v285 (47) = VarKill <mem> {.autotmp_18} v284
v286 (47) = VarKill <mem> {.autotmp_17} v285
v287 (50) = Addr <*error> {err} v2
v288 (50) = Load <error> v287 v286
v289 (50) = NeqInter <bool> v288 v51
If v289 → b21 b22 (line 50)
Change-Id: I3f46310918f965761f59e6f03ea53067237c28a8
Reviewed-on: https://go-review.googlesource.com/69591
Run-TryBot: David Chase <drchase@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-10-10 14:44:15 -04:00
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if p.Ctxt == nil {
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return "<Prog without ctxt>"
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}
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return fmt.Sprintf("%.5d (%v)\t%s", p.Pc, p.Line(), p.InstructionString())
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}
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2020-01-26 09:59:25 -08:00
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func (p *Prog) InnermostString(w io.Writer) {
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2018-12-07 10:00:36 -08:00
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if p == nil {
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2020-01-26 09:59:25 -08:00
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io.WriteString(w, "<nil Prog>")
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return
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2018-12-07 10:00:36 -08:00
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}
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if p.Ctxt == nil {
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2020-01-26 09:59:25 -08:00
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io.WriteString(w, "<Prog without ctxt>")
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return
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2018-12-07 10:00:36 -08:00
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}
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2020-01-26 09:59:25 -08:00
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fmt.Fprintf(w, "%.5d (", p.Pc)
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p.InnermostLine(w)
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io.WriteString(w, ")\t")
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p.WriteInstructionString(w)
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2018-12-07 10:00:36 -08:00
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}
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cmd/compile: add line numbers to values & blocks in ssa.html
In order to improve the line numbering for debuggers,
it's necessary to trace lines through compilation.
This makes it (much) easier to follow.
The format of the last column of the ssa.html output was
also changed to reduce the spamminess of the file name,
which is usually the same and makes it far harder to read
instructions and line numbers, and to make it wider and also
able to break words when wrapping (long path names still
can push off the end otherwise; side-to-side scrolling was
tried but was more annoying than the occasional wrapped
line).
Sample output now, where [...] is elision for sake of making
the CL character-counter happy -- and the (##) line numbers
are rendered in italics and a smaller font (11 point) under
control of a CSS class "line-number".
genssa
# /Users/drchase/[...]/ssa/testdata/hist.go
00000 (35) TEXT "".main(SB)
00001 (35) FUNCDATA $0, gclocals·7be4bb[...]1e8b(SB)
00002 (35) FUNCDATA $1, gclocals·9ab98a[...]4568(SB)
v920 00003 (36) LEAQ ""..autotmp_31-640(SP), DI
v858 00004 (36) XORPS X0, X0
v6 00005 (36) LEAQ -48(DI), DI
v6 00006 (36) DUFFZERO $277
v576 00007 (36) LEAQ ""..autotmp_31-640(SP), AX
v10 00008 (36) TESTB AX, (AX)
b1 00009 (36) JMP 10
and from an earlier phase:
b18: ← b17
v242 (47) = Copy <mem> v238
v243 (47) = VarKill <mem> {.autotmp_16} v242
v244 (48) = Addr <**bufio.Scanner> {scanner} v2
v245 (48) = Load <*bufio.Scanner> v244 v243
[...]
v279 (49) = Store <mem> {int64} v277 v276 v278
v280 (49) = Addr <*error> {.autotmp_18} v2
v281 (49) = Load <error> v280 v279
v282 (49) = Addr <*error> {err} v2
v283 (49) = VarDef <mem> {err} v279
v284 (49) = Store <mem> {error} v282 v281 v283
v285 (47) = VarKill <mem> {.autotmp_18} v284
v286 (47) = VarKill <mem> {.autotmp_17} v285
v287 (50) = Addr <*error> {err} v2
v288 (50) = Load <error> v287 v286
v289 (50) = NeqInter <bool> v288 v51
If v289 → b21 b22 (line 50)
Change-Id: I3f46310918f965761f59e6f03ea53067237c28a8
Reviewed-on: https://go-review.googlesource.com/69591
Run-TryBot: David Chase <drchase@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-10-10 14:44:15 -04:00
|
|
|
// InstructionString returns a string representation of the instruction without preceding
|
|
|
|
|
// program counter or file and line number.
|
|
|
|
|
func (p *Prog) InstructionString() string {
|
2020-01-26 09:59:25 -08:00
|
|
|
buf := new(bytes.Buffer)
|
|
|
|
|
p.WriteInstructionString(buf)
|
|
|
|
|
return buf.String()
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// WriteInstructionString writes a string representation of the instruction without preceding
|
|
|
|
|
// program counter or file and line number.
|
|
|
|
|
func (p *Prog) WriteInstructionString(w io.Writer) {
|
cmd/compile: add line numbers to values & blocks in ssa.html
In order to improve the line numbering for debuggers,
it's necessary to trace lines through compilation.
This makes it (much) easier to follow.
The format of the last column of the ssa.html output was
also changed to reduce the spamminess of the file name,
which is usually the same and makes it far harder to read
instructions and line numbers, and to make it wider and also
able to break words when wrapping (long path names still
can push off the end otherwise; side-to-side scrolling was
tried but was more annoying than the occasional wrapped
line).
Sample output now, where [...] is elision for sake of making
the CL character-counter happy -- and the (##) line numbers
are rendered in italics and a smaller font (11 point) under
control of a CSS class "line-number".
genssa
# /Users/drchase/[...]/ssa/testdata/hist.go
00000 (35) TEXT "".main(SB)
00001 (35) FUNCDATA $0, gclocals·7be4bb[...]1e8b(SB)
00002 (35) FUNCDATA $1, gclocals·9ab98a[...]4568(SB)
v920 00003 (36) LEAQ ""..autotmp_31-640(SP), DI
v858 00004 (36) XORPS X0, X0
v6 00005 (36) LEAQ -48(DI), DI
v6 00006 (36) DUFFZERO $277
v576 00007 (36) LEAQ ""..autotmp_31-640(SP), AX
v10 00008 (36) TESTB AX, (AX)
b1 00009 (36) JMP 10
and from an earlier phase:
b18: ← b17
v242 (47) = Copy <mem> v238
v243 (47) = VarKill <mem> {.autotmp_16} v242
v244 (48) = Addr <**bufio.Scanner> {scanner} v2
v245 (48) = Load <*bufio.Scanner> v244 v243
[...]
v279 (49) = Store <mem> {int64} v277 v276 v278
v280 (49) = Addr <*error> {.autotmp_18} v2
v281 (49) = Load <error> v280 v279
v282 (49) = Addr <*error> {err} v2
v283 (49) = VarDef <mem> {err} v279
v284 (49) = Store <mem> {error} v282 v281 v283
v285 (47) = VarKill <mem> {.autotmp_18} v284
v286 (47) = VarKill <mem> {.autotmp_17} v285
v287 (50) = Addr <*error> {err} v2
v288 (50) = Load <error> v287 v286
v289 (50) = NeqInter <bool> v288 v51
If v289 → b21 b22 (line 50)
Change-Id: I3f46310918f965761f59e6f03ea53067237c28a8
Reviewed-on: https://go-review.googlesource.com/69591
Run-TryBot: David Chase <drchase@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-10-10 14:44:15 -04:00
|
|
|
if p == nil {
|
2020-01-26 09:59:25 -08:00
|
|
|
io.WriteString(w, "<nil Prog>")
|
|
|
|
|
return
|
cmd/compile: add line numbers to values & blocks in ssa.html
In order to improve the line numbering for debuggers,
it's necessary to trace lines through compilation.
This makes it (much) easier to follow.
The format of the last column of the ssa.html output was
also changed to reduce the spamminess of the file name,
which is usually the same and makes it far harder to read
instructions and line numbers, and to make it wider and also
able to break words when wrapping (long path names still
can push off the end otherwise; side-to-side scrolling was
tried but was more annoying than the occasional wrapped
line).
Sample output now, where [...] is elision for sake of making
the CL character-counter happy -- and the (##) line numbers
are rendered in italics and a smaller font (11 point) under
control of a CSS class "line-number".
genssa
# /Users/drchase/[...]/ssa/testdata/hist.go
00000 (35) TEXT "".main(SB)
00001 (35) FUNCDATA $0, gclocals·7be4bb[...]1e8b(SB)
00002 (35) FUNCDATA $1, gclocals·9ab98a[...]4568(SB)
v920 00003 (36) LEAQ ""..autotmp_31-640(SP), DI
v858 00004 (36) XORPS X0, X0
v6 00005 (36) LEAQ -48(DI), DI
v6 00006 (36) DUFFZERO $277
v576 00007 (36) LEAQ ""..autotmp_31-640(SP), AX
v10 00008 (36) TESTB AX, (AX)
b1 00009 (36) JMP 10
and from an earlier phase:
b18: ← b17
v242 (47) = Copy <mem> v238
v243 (47) = VarKill <mem> {.autotmp_16} v242
v244 (48) = Addr <**bufio.Scanner> {scanner} v2
v245 (48) = Load <*bufio.Scanner> v244 v243
[...]
v279 (49) = Store <mem> {int64} v277 v276 v278
v280 (49) = Addr <*error> {.autotmp_18} v2
v281 (49) = Load <error> v280 v279
v282 (49) = Addr <*error> {err} v2
v283 (49) = VarDef <mem> {err} v279
v284 (49) = Store <mem> {error} v282 v281 v283
v285 (47) = VarKill <mem> {.autotmp_18} v284
v286 (47) = VarKill <mem> {.autotmp_17} v285
v287 (50) = Addr <*error> {err} v2
v288 (50) = Load <error> v287 v286
v289 (50) = NeqInter <bool> v288 v51
If v289 → b21 b22 (line 50)
Change-Id: I3f46310918f965761f59e6f03ea53067237c28a8
Reviewed-on: https://go-review.googlesource.com/69591
Run-TryBot: David Chase <drchase@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-10-10 14:44:15 -04:00
|
|
|
}
|
2016-02-25 10:44:31 -08:00
|
|
|
|
2015-01-19 14:34:58 -05:00
|
|
|
if p.Ctxt == nil {
|
2020-01-26 09:59:25 -08:00
|
|
|
io.WriteString(w, "<Prog without ctxt>")
|
|
|
|
|
return
|
2015-01-19 14:34:58 -05:00
|
|
|
}
|
2015-03-05 10:39:23 -08:00
|
|
|
|
|
|
|
|
sc := CConv(p.Scond)
|
|
|
|
|
|
2020-01-26 09:59:25 -08:00
|
|
|
io.WriteString(w, p.As.String())
|
|
|
|
|
io.WriteString(w, sc)
|
2015-03-05 10:39:23 -08:00
|
|
|
sep := "\t"
|
2017-09-13 14:32:08 +03:00
|
|
|
|
2015-03-05 10:39:23 -08:00
|
|
|
if p.From.Type != TYPE_NONE {
|
2020-01-26 09:59:25 -08:00
|
|
|
io.WriteString(w, sep)
|
|
|
|
|
WriteDconv(w, p, &p.From)
|
2015-03-05 10:39:23 -08:00
|
|
|
sep = ", "
|
|
|
|
|
}
|
|
|
|
|
if p.Reg != REG_NONE {
|
|
|
|
|
// Should not happen but might as well show it if it does.
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "%s%v", sep, Rconv(int(p.Reg)))
|
2015-03-05 10:39:23 -08:00
|
|
|
sep = ", "
|
|
|
|
|
}
|
2017-09-13 14:32:08 +03:00
|
|
|
for i := range p.RestArgs {
|
cmd/internal/obj/arm64: add CASx/CASPx instructions
This patch adds support for CASx and CASPx atomic instructions.
go syntax gnu syntax
CASD Rs, (Rn|RSP), Rt => cas Xs, Xt, (Xn|SP)
CASALW Rs, (Rn|RSP), Rt => casal Ws, Wt, (Xn|SP)
CASPD (Rs, Rs+1), (Rn|RSP), (Rt, Rt+1) => casp Xs, Xs+1, Xt, Xt+1, (Xn|SP)
CASPW (Rs, Rs+1), (Rn|RSP), (Rt, Rt+1) => casp Ws, Ws+1, Wt, Wt+1, (Xn|SP)
This patch changes the type of prog.RestArgs from "[]Addr" to
"[]struct{Addr, Pos}", Pos is a enum, indicating the position of
the operand.
This patch also adds test cases.
Change-Id: Ib971cfda7890b7aa895d17bab22dea326c7fcaa4
Reviewed-on: https://go-review.googlesource.com/c/go/+/233277
Trust: fannie zhang <Fannie.Zhang@arm.com>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
2020-05-08 10:51:29 +08:00
|
|
|
if p.RestArgs[i].Pos == Source {
|
|
|
|
|
io.WriteString(w, sep)
|
|
|
|
|
WriteDconv(w, p, &p.RestArgs[i].Addr)
|
|
|
|
|
sep = ", "
|
|
|
|
|
}
|
2015-03-05 10:39:23 -08:00
|
|
|
}
|
2017-09-13 14:32:08 +03:00
|
|
|
|
cmd/internal/obj: stop storing Text flags in From3
Prior to this CL, flags such as NOSPLIT
on ATEXT Progs were stored in From3.Offset.
Some but not all of those flags were also
duplicated into From.Sym.Attribute.
This CL migrates all of those flags into
From.Sym.Attribute and stops creating a From3.
A side-effect of this is that printing an
ATEXT Prog can no longer simply dump From3.Offset.
That's kind of good, since the raw flag value
wasn't very informative anyway, but it did
necessitate a bunch of updates to the cmd/asm tests.
The reason I'm doing this work now is that
avoiding storing flags in both From.Sym and From3.Offset
simplifies some other changes to fix the data
race first described in CL 40254.
This CL almost passes toolstash-check -all.
The only changes are in cases where the assembler
has decided that a function's flags may be altered,
e.g. to make a function with no calls in it NOSPLIT.
Prior to this CL, that information was not printed.
Sample before:
"".Ctz64 t=1 size=63 args=0x10 locals=0x0
0x0000 00000 (/Users/josh/go/tip/src/runtime/internal/sys/intrinsics.go:35) TEXT "".Ctz64(SB), $0-16
0x0000 00000 (/Users/josh/go/tip/src/runtime/internal/sys/intrinsics.go:35) FUNCDATA $0, gclocals·f207267fbf96a0178e8758c6e3e0ce28(SB)
Sample after:
"".Ctz64 t=1 nosplit size=63 args=0x10 locals=0x0
0x0000 00000 (/Users/josh/go/tip/src/runtime/internal/sys/intrinsics.go:35) TEXT "".Ctz64(SB), NOSPLIT, $0-16
0x0000 00000 (/Users/josh/go/tip/src/runtime/internal/sys/intrinsics.go:35) FUNCDATA $0, gclocals·f207267fbf96a0178e8758c6e3e0ce28(SB)
Observe the additional "nosplit" in the first line
and the additional "NOSPLIT" in the second line.
Updates #15756
Change-Id: I5c59bd8f3bdc7c780361f801d94a261f0aef3d13
Reviewed-on: https://go-review.googlesource.com/40495
Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com>
Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
TryBot-Result: Gobot Gobot <gobot@golang.org>
2017-04-11 15:15:04 -07:00
|
|
|
if p.As == ATEXT {
|
|
|
|
|
// If there are attributes, print them. Otherwise, skip the comma.
|
|
|
|
|
// In short, print one of these two:
|
|
|
|
|
// TEXT foo(SB), DUPOK|NOSPLIT, $0
|
|
|
|
|
// TEXT foo(SB), $0
|
cmd/asm, cmd/link, runtime: introduce FuncInfo flag bits
The runtime traceback code has its own definition of which functions
mark the top frame of a stack, separate from the TOPFRAME bits that
exist in the assembly and are passed along in DWARF information.
It's error-prone and redundant to have two different sources of truth.
This CL provides the actual TOPFRAME bits to the runtime, so that
the runtime can use those bits instead of reinventing its own category.
This CL also adds a new bit, SPWRITE, which marks functions that
write directly to SP (anything but adding and subtracting constants).
Such functions must stop a traceback, because the traceback has no
way to rederive the SP on entry. Again, the runtime has its own definition
which is mostly correct, but also missing some functions. During ordinary
goroutine context switches, such functions do not appear on the stack,
so the incompleteness in the runtime usually doesn't matter.
But profiling signals can arrive at any moment, and the runtime may
crash during traceback if it attempts to unwind an SP-writing frame
and gets out-of-sync with the actual stack. The runtime contains code
to try to detect likely candidates but again it is incomplete.
Deriving the SPWRITE bit automatically from the actual assembly code
provides the complete truth, and passing it to the runtime lets the
runtime use it.
This CL is part of a stack adding windows/arm64
support (#36439), intended to land in the Go 1.17 cycle.
This CL is, however, not windows/arm64-specific.
It is cleanup meant to make the port (and future ports) easier.
Change-Id: I227f53b23ac5b3dabfcc5e8ee3f00df4e113cf58
Reviewed-on: https://go-review.googlesource.com/c/go/+/288800
Trust: Russ Cox <rsc@golang.org>
Trust: Jason A. Donenfeld <Jason@zx2c4.com>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Reviewed-by: Jason A. Donenfeld <Jason@zx2c4.com>
2021-01-28 15:21:33 -05:00
|
|
|
s := p.From.Sym.TextAttrString()
|
cmd/internal/obj: stop storing Text flags in From3
Prior to this CL, flags such as NOSPLIT
on ATEXT Progs were stored in From3.Offset.
Some but not all of those flags were also
duplicated into From.Sym.Attribute.
This CL migrates all of those flags into
From.Sym.Attribute and stops creating a From3.
A side-effect of this is that printing an
ATEXT Prog can no longer simply dump From3.Offset.
That's kind of good, since the raw flag value
wasn't very informative anyway, but it did
necessitate a bunch of updates to the cmd/asm tests.
The reason I'm doing this work now is that
avoiding storing flags in both From.Sym and From3.Offset
simplifies some other changes to fix the data
race first described in CL 40254.
This CL almost passes toolstash-check -all.
The only changes are in cases where the assembler
has decided that a function's flags may be altered,
e.g. to make a function with no calls in it NOSPLIT.
Prior to this CL, that information was not printed.
Sample before:
"".Ctz64 t=1 size=63 args=0x10 locals=0x0
0x0000 00000 (/Users/josh/go/tip/src/runtime/internal/sys/intrinsics.go:35) TEXT "".Ctz64(SB), $0-16
0x0000 00000 (/Users/josh/go/tip/src/runtime/internal/sys/intrinsics.go:35) FUNCDATA $0, gclocals·f207267fbf96a0178e8758c6e3e0ce28(SB)
Sample after:
"".Ctz64 t=1 nosplit size=63 args=0x10 locals=0x0
0x0000 00000 (/Users/josh/go/tip/src/runtime/internal/sys/intrinsics.go:35) TEXT "".Ctz64(SB), NOSPLIT, $0-16
0x0000 00000 (/Users/josh/go/tip/src/runtime/internal/sys/intrinsics.go:35) FUNCDATA $0, gclocals·f207267fbf96a0178e8758c6e3e0ce28(SB)
Observe the additional "nosplit" in the first line
and the additional "NOSPLIT" in the second line.
Updates #15756
Change-Id: I5c59bd8f3bdc7c780361f801d94a261f0aef3d13
Reviewed-on: https://go-review.googlesource.com/40495
Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com>
Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
TryBot-Result: Gobot Gobot <gobot@golang.org>
2017-04-11 15:15:04 -07:00
|
|
|
if s != "" {
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "%s%s", sep, s)
|
cmd/internal/obj: stop storing Text flags in From3
Prior to this CL, flags such as NOSPLIT
on ATEXT Progs were stored in From3.Offset.
Some but not all of those flags were also
duplicated into From.Sym.Attribute.
This CL migrates all of those flags into
From.Sym.Attribute and stops creating a From3.
A side-effect of this is that printing an
ATEXT Prog can no longer simply dump From3.Offset.
That's kind of good, since the raw flag value
wasn't very informative anyway, but it did
necessitate a bunch of updates to the cmd/asm tests.
The reason I'm doing this work now is that
avoiding storing flags in both From.Sym and From3.Offset
simplifies some other changes to fix the data
race first described in CL 40254.
This CL almost passes toolstash-check -all.
The only changes are in cases where the assembler
has decided that a function's flags may be altered,
e.g. to make a function with no calls in it NOSPLIT.
Prior to this CL, that information was not printed.
Sample before:
"".Ctz64 t=1 size=63 args=0x10 locals=0x0
0x0000 00000 (/Users/josh/go/tip/src/runtime/internal/sys/intrinsics.go:35) TEXT "".Ctz64(SB), $0-16
0x0000 00000 (/Users/josh/go/tip/src/runtime/internal/sys/intrinsics.go:35) FUNCDATA $0, gclocals·f207267fbf96a0178e8758c6e3e0ce28(SB)
Sample after:
"".Ctz64 t=1 nosplit size=63 args=0x10 locals=0x0
0x0000 00000 (/Users/josh/go/tip/src/runtime/internal/sys/intrinsics.go:35) TEXT "".Ctz64(SB), NOSPLIT, $0-16
0x0000 00000 (/Users/josh/go/tip/src/runtime/internal/sys/intrinsics.go:35) FUNCDATA $0, gclocals·f207267fbf96a0178e8758c6e3e0ce28(SB)
Observe the additional "nosplit" in the first line
and the additional "NOSPLIT" in the second line.
Updates #15756
Change-Id: I5c59bd8f3bdc7c780361f801d94a261f0aef3d13
Reviewed-on: https://go-review.googlesource.com/40495
Run-TryBot: Josh Bleecher Snyder <josharian@gmail.com>
Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
TryBot-Result: Gobot Gobot <gobot@golang.org>
2017-04-11 15:15:04 -07:00
|
|
|
sep = ", "
|
|
|
|
|
}
|
|
|
|
|
}
|
2015-03-05 10:39:23 -08:00
|
|
|
if p.To.Type != TYPE_NONE {
|
2020-01-26 09:59:25 -08:00
|
|
|
io.WriteString(w, sep)
|
|
|
|
|
WriteDconv(w, p, &p.To)
|
2022-08-04 18:13:59 +08:00
|
|
|
sep = ", "
|
2015-03-05 10:39:23 -08:00
|
|
|
}
|
2017-09-13 14:32:08 +03:00
|
|
|
if p.RegTo2 != REG_NONE {
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "%s%v", sep, Rconv(int(p.RegTo2)))
|
cmd/internal/obj, cmd/internal/obj/arm64: add support for GOARCH=arm64
ARM64 (ARMv8) has 32 general purpose, 64-bit integer registers
(R0-R31), 32 64-bit scalar floating point registers (F0-F31), and
32 128-bit vector registers (unused, V0-V31).
R31 is either the stack pointer (RSP), or the zero register (ZR),
depending on the instruction. Note the distinction between the
hardware stack pointer, RSP, and the virtual stack pointer SP.
The (hardware) stack pointer must be 16-byte aligned at all times;
the RSP register itself must be aligned, offset(RSP) only has to
have natural alignment.
Instructions are fixed-width, and are 32-bit wide. ARM64 supports
ARMv7 too (32-bit ARM), but not in the same process. In general,
there is not much in common between 32-bit ARM and ARM64, it's a
new architecture.
All implementations have floating point instructions.
This change adds a Prog.To3 field analogous to Prog.To. It is used
by exclusive load/store instructions such as STLXR which read from
one register, and write to both a register and a memory address.
STLXRW R1, (R0), R3
This will store the word contained in R1 to the memory address
pointed by R0. R3 will be updated with the status result of the
store. It is used to implement atomic operations.
No other changes are made to the portable Prog and Addr structures.
Change-Id: Ie839029aa5265bbad35769d9689eca11e1c48c47
Reviewed-on: https://go-review.googlesource.com/7046
Reviewed-by: Russ Cox <rsc@golang.org>
2015-03-08 13:58:16 +01:00
|
|
|
}
|
cmd/internal/obj/arm64: add CASx/CASPx instructions
This patch adds support for CASx and CASPx atomic instructions.
go syntax gnu syntax
CASD Rs, (Rn|RSP), Rt => cas Xs, Xt, (Xn|SP)
CASALW Rs, (Rn|RSP), Rt => casal Ws, Wt, (Xn|SP)
CASPD (Rs, Rs+1), (Rn|RSP), (Rt, Rt+1) => casp Xs, Xs+1, Xt, Xt+1, (Xn|SP)
CASPW (Rs, Rs+1), (Rn|RSP), (Rt, Rt+1) => casp Ws, Ws+1, Wt, Wt+1, (Xn|SP)
This patch changes the type of prog.RestArgs from "[]Addr" to
"[]struct{Addr, Pos}", Pos is a enum, indicating the position of
the operand.
This patch also adds test cases.
Change-Id: Ib971cfda7890b7aa895d17bab22dea326c7fcaa4
Reviewed-on: https://go-review.googlesource.com/c/go/+/233277
Trust: fannie zhang <Fannie.Zhang@arm.com>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
2020-05-08 10:51:29 +08:00
|
|
|
for i := range p.RestArgs {
|
|
|
|
|
if p.RestArgs[i].Pos == Destination {
|
|
|
|
|
io.WriteString(w, sep)
|
|
|
|
|
WriteDconv(w, p, &p.RestArgs[i].Addr)
|
|
|
|
|
sep = ", "
|
|
|
|
|
}
|
|
|
|
|
}
|
2015-01-19 14:34:58 -05:00
|
|
|
}
|
2015-01-21 21:45:29 -05:00
|
|
|
|
|
|
|
|
func (ctxt *Link) NewProg() *Prog {
|
2017-04-05 07:05:35 -07:00
|
|
|
p := new(Prog)
|
2015-01-21 21:45:29 -05:00
|
|
|
p.Ctxt = ctxt
|
|
|
|
|
return p
|
|
|
|
|
}
|
2017-04-05 07:05:35 -07:00
|
|
|
|
|
|
|
|
func (ctxt *Link) CanReuseProgs() bool {
|
2018-12-07 10:00:36 -08:00
|
|
|
return ctxt.Debugasm == 0
|
2016-02-24 09:53:27 -08:00
|
|
|
}
|
[dev.cc] cmd/internal/obj: reconvert from liblink
cmd/internal/obj reconverted using rsc.io/c2go rev 2a95256.
- Brings in new, more regular Prog, Addr definitions
- Add Prog* argument to oclass in liblink/asm[68].c, for c2go conversion.
- Update objwriter for change in TEXT size encoding.
- Merge 5a, 6a, 8a, 9a changes into new5a, new6a, new8a, new9a (by hand).
- Add +build ignore to cmd/asm/internal/{addr,arch,asm}, cmd/asm.
They need to be updated for the changes.
- Reenable verifyAsm in cmd/go.
- Reenable GOOBJ=2 mode by default in liblink.
All architectures build successfully again.
Change-Id: I2c845c5d365aa484b570476898171bee657b626d
Reviewed-on: https://go-review.googlesource.com/3963
Reviewed-by: Rob Pike <r@golang.org>
2015-02-05 03:57:44 -05:00
|
|
|
|
2020-10-07 12:31:05 -04:00
|
|
|
// Dconv accepts an argument 'a' within a prog 'p' and returns a string
|
|
|
|
|
// with a formatted version of the argument.
|
2015-02-26 17:09:16 -08:00
|
|
|
func Dconv(p *Prog, a *Addr) string {
|
2020-01-26 09:59:25 -08:00
|
|
|
buf := new(bytes.Buffer)
|
2020-10-07 12:31:05 -04:00
|
|
|
writeDconv(buf, p, a, false)
|
2020-01-26 09:59:25 -08:00
|
|
|
return buf.String()
|
|
|
|
|
}
|
2015-02-25 09:07:02 -08:00
|
|
|
|
2022-09-29 12:46:10 +00:00
|
|
|
// DconvWithABIDetail accepts an argument 'a' within a prog 'p'
|
2020-10-07 12:31:05 -04:00
|
|
|
// and returns a string with a formatted version of the argument, in
|
|
|
|
|
// which text symbols are rendered with explicit ABI selectors.
|
|
|
|
|
func DconvWithABIDetail(p *Prog, a *Addr) string {
|
|
|
|
|
buf := new(bytes.Buffer)
|
|
|
|
|
writeDconv(buf, p, a, true)
|
|
|
|
|
return buf.String()
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// WriteDconv accepts an argument 'a' within a prog 'p'
|
|
|
|
|
// and writes a formatted version of the arg to the writer.
|
2020-01-26 09:59:25 -08:00
|
|
|
func WriteDconv(w io.Writer, p *Prog, a *Addr) {
|
2020-10-07 12:31:05 -04:00
|
|
|
writeDconv(w, p, a, false)
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
func writeDconv(w io.Writer, p *Prog, a *Addr, abiDetail bool) {
|
2015-02-25 09:07:02 -08:00
|
|
|
switch a.Type {
|
|
|
|
|
default:
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "type=%d", a.Type)
|
2015-02-25 09:07:02 -08:00
|
|
|
|
|
|
|
|
case TYPE_NONE:
|
|
|
|
|
if a.Name != NAME_NONE || a.Reg != 0 || a.Sym != nil {
|
2020-01-26 09:59:25 -08:00
|
|
|
a.WriteNameTo(w)
|
|
|
|
|
fmt.Fprintf(w, "(%v)(NONE)", Rconv(int(a.Reg)))
|
2015-02-25 09:07:02 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case TYPE_REG:
|
|
|
|
|
// TODO(rsc): This special case is for x86 instructions like
|
|
|
|
|
// PINSRQ CX,$1,X6
|
|
|
|
|
// where the $1 is included in the p->to Addr.
|
|
|
|
|
// Move into a new field.
|
cmd/asm: refine Go assembly for ARM64
Some ARM64-specific instructions (such as SIMD instructions) are not supported.
This patch adds support for the following:
1. Extended register, e.g.:
ADD Rm.<ext>[<<amount], Rn, Rd
<ext> can have the following values:
UXTB, UXTH, UXTW, UXTX, SXTB, SXTH, SXTW and SXTX
2. Arrangement for SIMD instructions, e.g.:
VADDP Vm.<T>, Vn.<T>, Vd.<T>
<T> can have the following values:
B8, B16, H4, H8, S2, S4 and D2
3. Width specifier and element index for SIMD instructions, e.g.:
VMOV Vn.<T>[index], Rd // MOV(to general register)
<T> can have the following values:
S and D
4. Register List, e.g.:
VLD1 (Rn), [Vt1.<T>, Vt2.<T>, Vt3.<T>]
5. Register offset variant, e.g.:
VLD1.P (Rn)(Rm), [Vt1.<T>, Vt2.<T>] // Rm is the post-index register
6. Go assembly for ARM64 reference manual
new added instructions are required to have according explanation items in
the manual and items for existed instructions will be added incrementally
For more information about the refinement background, please refer to the
discussion (https://groups.google.com/forum/#!topic/golang-dev/rWgDxCrL4GU)
This patch only adds syntax and doesn't break any assembly that already exists.
Change-Id: I34e90b7faae032820593a0e417022c354a882008
Reviewed-on: https://go-review.googlesource.com/41654
Run-TryBot: Cherry Zhang <cherryyz@google.com>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-25 18:29:54 +08:00
|
|
|
if a.Offset != 0 && (a.Reg < RBaseARM64 || a.Reg >= RBaseMIPS) {
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "$%d,%v", a.Offset, Rconv(int(a.Reg)))
|
|
|
|
|
return
|
2015-02-25 09:07:02 -08:00
|
|
|
}
|
|
|
|
|
|
2015-05-14 20:11:28 -07:00
|
|
|
if a.Name != NAME_NONE || a.Sym != nil {
|
2020-01-26 09:59:25 -08:00
|
|
|
a.WriteNameTo(w)
|
|
|
|
|
fmt.Fprintf(w, "(%v)(REG)", Rconv(int(a.Reg)))
|
|
|
|
|
} else {
|
|
|
|
|
io.WriteString(w, Rconv(int(a.Reg)))
|
2015-02-25 09:07:02 -08:00
|
|
|
}
|
cmd/internal/obj/loong64: add support of VMOVQ and XVMOVQ
This CL refers to the implementation of ARM64 and adds support for the following
types of SIMD instructions:
1. Move general-purpose register to a vector element, e.g.:
VMOVQ Rj, <Vd>.<T>[index]
<T> can have the following values:
B, H, W, V
2. Move vector element to general-purpose register, e.g.:
VMOVQ <Vj>.<T>[index], Rd
<T> can have the following values:
B, BU, H, HU, W, WU, VU
3. Duplicate general-purpose register to vector, e.g.:
VMOVQ Rj, <Vd>.<T>
<T> can have the following values:
B16, H8, W4, V2, B32, H16, W8, V4
4. Move vector, e.g.:
XVMOVQ Xj, <Xd>.<T>
<T> can have the following values:
B16, H8, W4, V2, Q1
5. Move vector element to scalar, e.g.:
XVMOVQ Xj, <Xd>.<T>[index]
XVMOVQ Xj.<T>[index], Xd
<T> can have the following values:
W, V
6. Move vector element to vector register, e.g.:
VMOVQ <Vn>.<T>[index], Vn.<T>
<T> can have the following values:
B, H, W, V
This CL only adds syntax and doesn't break any assembly that already exists.
Change-Id: I7656efac6def54da6c5ae182f39c2a21bfdf92bb
Reviewed-on: https://go-review.googlesource.com/c/go/+/616258
Reviewed-by: David Chase <drchase@google.com>
Reviewed-by: Meidan Li <limeidan@loongson.cn>
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
Reviewed-by: Cherry Mui <cherryyz@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2024-11-04 18:14:00 +08:00
|
|
|
|
cmd/asm: refine Go assembly for ARM64
Some ARM64-specific instructions (such as SIMD instructions) are not supported.
This patch adds support for the following:
1. Extended register, e.g.:
ADD Rm.<ext>[<<amount], Rn, Rd
<ext> can have the following values:
UXTB, UXTH, UXTW, UXTX, SXTB, SXTH, SXTW and SXTX
2. Arrangement for SIMD instructions, e.g.:
VADDP Vm.<T>, Vn.<T>, Vd.<T>
<T> can have the following values:
B8, B16, H4, H8, S2, S4 and D2
3. Width specifier and element index for SIMD instructions, e.g.:
VMOV Vn.<T>[index], Rd // MOV(to general register)
<T> can have the following values:
S and D
4. Register List, e.g.:
VLD1 (Rn), [Vt1.<T>, Vt2.<T>, Vt3.<T>]
5. Register offset variant, e.g.:
VLD1.P (Rn)(Rm), [Vt1.<T>, Vt2.<T>] // Rm is the post-index register
6. Go assembly for ARM64 reference manual
new added instructions are required to have according explanation items in
the manual and items for existed instructions will be added incrementally
For more information about the refinement background, please refer to the
discussion (https://groups.google.com/forum/#!topic/golang-dev/rWgDxCrL4GU)
This patch only adds syntax and doesn't break any assembly that already exists.
Change-Id: I34e90b7faae032820593a0e417022c354a882008
Reviewed-on: https://go-review.googlesource.com/41654
Run-TryBot: Cherry Zhang <cherryyz@google.com>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-25 18:29:54 +08:00
|
|
|
if (RBaseARM64+1<<10+1<<9) /* arm64.REG_ELEM */ <= a.Reg &&
|
|
|
|
|
a.Reg < (RBaseARM64+1<<11) /* arm64.REG_ELEM_END */ {
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "[%d]", a.Index)
|
cmd/asm: refine Go assembly for ARM64
Some ARM64-specific instructions (such as SIMD instructions) are not supported.
This patch adds support for the following:
1. Extended register, e.g.:
ADD Rm.<ext>[<<amount], Rn, Rd
<ext> can have the following values:
UXTB, UXTH, UXTW, UXTX, SXTB, SXTH, SXTW and SXTX
2. Arrangement for SIMD instructions, e.g.:
VADDP Vm.<T>, Vn.<T>, Vd.<T>
<T> can have the following values:
B8, B16, H4, H8, S2, S4 and D2
3. Width specifier and element index for SIMD instructions, e.g.:
VMOV Vn.<T>[index], Rd // MOV(to general register)
<T> can have the following values:
S and D
4. Register List, e.g.:
VLD1 (Rn), [Vt1.<T>, Vt2.<T>, Vt3.<T>]
5. Register offset variant, e.g.:
VLD1.P (Rn)(Rm), [Vt1.<T>, Vt2.<T>] // Rm is the post-index register
6. Go assembly for ARM64 reference manual
new added instructions are required to have according explanation items in
the manual and items for existed instructions will be added incrementally
For more information about the refinement background, please refer to the
discussion (https://groups.google.com/forum/#!topic/golang-dev/rWgDxCrL4GU)
This patch only adds syntax and doesn't break any assembly that already exists.
Change-Id: I34e90b7faae032820593a0e417022c354a882008
Reviewed-on: https://go-review.googlesource.com/41654
Run-TryBot: Cherry Zhang <cherryyz@google.com>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-25 18:29:54 +08:00
|
|
|
}
|
2015-02-25 09:07:02 -08:00
|
|
|
|
cmd/internal/obj/loong64: add support of VMOVQ and XVMOVQ
This CL refers to the implementation of ARM64 and adds support for the following
types of SIMD instructions:
1. Move general-purpose register to a vector element, e.g.:
VMOVQ Rj, <Vd>.<T>[index]
<T> can have the following values:
B, H, W, V
2. Move vector element to general-purpose register, e.g.:
VMOVQ <Vj>.<T>[index], Rd
<T> can have the following values:
B, BU, H, HU, W, WU, VU
3. Duplicate general-purpose register to vector, e.g.:
VMOVQ Rj, <Vd>.<T>
<T> can have the following values:
B16, H8, W4, V2, B32, H16, W8, V4
4. Move vector, e.g.:
XVMOVQ Xj, <Xd>.<T>
<T> can have the following values:
B16, H8, W4, V2, Q1
5. Move vector element to scalar, e.g.:
XVMOVQ Xj, <Xd>.<T>[index]
XVMOVQ Xj.<T>[index], Xd
<T> can have the following values:
W, V
6. Move vector element to vector register, e.g.:
VMOVQ <Vn>.<T>[index], Vn.<T>
<T> can have the following values:
B, H, W, V
This CL only adds syntax and doesn't break any assembly that already exists.
Change-Id: I7656efac6def54da6c5ae182f39c2a21bfdf92bb
Reviewed-on: https://go-review.googlesource.com/c/go/+/616258
Reviewed-by: David Chase <drchase@google.com>
Reviewed-by: Meidan Li <limeidan@loongson.cn>
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
Reviewed-by: Cherry Mui <cherryyz@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2024-11-04 18:14:00 +08:00
|
|
|
if (RBaseLOONG64+(1<<10)+(1<<11)) /* loong64.REG_ELEM */ <= a.Reg &&
|
|
|
|
|
a.Reg < (RBaseLOONG64+(1<<10)+(2<<11)) /* loong64.REG_ELEM_END */ {
|
|
|
|
|
fmt.Fprintf(w, "[%d]", a.Index)
|
|
|
|
|
}
|
|
|
|
|
|
2015-02-25 09:07:02 -08:00
|
|
|
case TYPE_BRANCH:
|
|
|
|
|
if a.Sym != nil {
|
2020-10-07 12:31:05 -04:00
|
|
|
fmt.Fprintf(w, "%s%s(SB)", a.Sym.Name, abiDecorate(a, abiDetail))
|
2020-08-28 17:10:32 +00:00
|
|
|
} else if a.Target() != nil {
|
|
|
|
|
fmt.Fprint(w, a.Target().Pc)
|
2015-02-25 09:07:02 -08:00
|
|
|
} else {
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "%d(PC)", a.Offset)
|
2015-02-25 09:07:02 -08:00
|
|
|
}
|
|
|
|
|
|
2015-02-26 10:58:48 -08:00
|
|
|
case TYPE_INDIR:
|
2020-01-26 09:59:25 -08:00
|
|
|
io.WriteString(w, "*")
|
2020-10-07 12:31:05 -04:00
|
|
|
a.writeNameTo(w, abiDetail)
|
2015-02-26 10:58:48 -08:00
|
|
|
|
2015-02-25 09:07:02 -08:00
|
|
|
case TYPE_MEM:
|
2020-01-26 09:59:25 -08:00
|
|
|
a.WriteNameTo(w)
|
2015-02-25 09:07:02 -08:00
|
|
|
if a.Index != REG_NONE {
|
2017-12-08 08:19:32 +00:00
|
|
|
if a.Scale == 0 {
|
|
|
|
|
// arm64 shifted or extended register offset, scale = 0.
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "(%v)", Rconv(int(a.Index)))
|
2017-12-08 08:19:32 +00:00
|
|
|
} else {
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "(%v*%d)", Rconv(int(a.Index)), int(a.Scale))
|
2017-12-08 08:19:32 +00:00
|
|
|
}
|
2015-02-25 09:07:02 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case TYPE_CONST:
|
2020-01-26 09:59:25 -08:00
|
|
|
io.WriteString(w, "$")
|
|
|
|
|
a.WriteNameTo(w)
|
2015-02-25 09:07:02 -08:00
|
|
|
if a.Reg != 0 {
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "(%v)", Rconv(int(a.Reg)))
|
2015-02-25 09:07:02 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case TYPE_TEXTSIZE:
|
2023-04-17 16:50:00 -04:00
|
|
|
if a.Val.(int32) == abi.ArgsSizeUnknown {
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "$%d", a.Offset)
|
2015-02-25 09:07:02 -08:00
|
|
|
} else {
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "$%d-%d", a.Offset, a.Val.(int32))
|
2015-02-25 09:07:02 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case TYPE_FCONST:
|
2020-01-26 09:59:25 -08:00
|
|
|
str := fmt.Sprintf("%.17g", a.Val.(float64))
|
2015-02-25 09:07:02 -08:00
|
|
|
// Make sure 1 prints as 1.0
|
|
|
|
|
if !strings.ContainsAny(str, ".e") {
|
|
|
|
|
str += ".0"
|
|
|
|
|
}
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "$(%s)", str)
|
2015-02-25 09:07:02 -08:00
|
|
|
|
|
|
|
|
case TYPE_SCONST:
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "$%q", a.Val.(string))
|
2015-02-25 09:07:02 -08:00
|
|
|
|
|
|
|
|
case TYPE_ADDR:
|
2020-01-26 09:59:25 -08:00
|
|
|
io.WriteString(w, "$")
|
2020-10-07 12:31:05 -04:00
|
|
|
a.writeNameTo(w, abiDetail)
|
2015-02-25 09:07:02 -08:00
|
|
|
|
|
|
|
|
case TYPE_SHIFT:
|
|
|
|
|
v := int(a.Offset)
|
2016-08-10 13:24:03 -04:00
|
|
|
ops := "<<>>->@>"
|
2021-04-15 23:05:49 -04:00
|
|
|
switch buildcfg.GOARCH {
|
2016-08-10 13:24:03 -04:00
|
|
|
case "arm":
|
|
|
|
|
op := ops[((v>>5)&3)<<1:]
|
|
|
|
|
if v&(1<<4) != 0 {
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "R%d%c%cR%d", v&15, op[0], op[1], (v>>8)&15)
|
2016-08-10 13:24:03 -04:00
|
|
|
} else {
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "R%d%c%c%d", v&15, op[0], op[1], (v>>7)&31)
|
2016-08-10 13:24:03 -04:00
|
|
|
}
|
|
|
|
|
if a.Reg != 0 {
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "(%v)", Rconv(int(a.Reg)))
|
2016-08-10 13:24:03 -04:00
|
|
|
}
|
|
|
|
|
case "arm64":
|
|
|
|
|
op := ops[((v>>22)&3)<<1:]
|
2018-03-08 10:33:14 +00:00
|
|
|
r := (v >> 16) & 31
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "%s%c%c%d", Rconv(r+RBaseARM64), op[0], op[1], (v>>10)&63)
|
2016-08-10 13:24:03 -04:00
|
|
|
default:
|
2021-04-15 23:05:49 -04:00
|
|
|
panic("TYPE_SHIFT is not supported on " + buildcfg.GOARCH)
|
2015-02-25 09:07:02 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case TYPE_REGREG:
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "(%v, %v)", Rconv(int(a.Reg)), Rconv(int(a.Offset)))
|
2015-02-25 09:07:02 -08:00
|
|
|
|
|
|
|
|
case TYPE_REGREG2:
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "%v, %v", Rconv(int(a.Offset)), Rconv(int(a.Reg)))
|
2015-02-27 13:50:26 -08:00
|
|
|
|
|
|
|
|
case TYPE_REGLIST:
|
2020-01-26 09:59:25 -08:00
|
|
|
io.WriteString(w, RLconv(a.Offset))
|
2020-08-12 17:41:54 +08:00
|
|
|
|
|
|
|
|
case TYPE_SPECIAL:
|
|
|
|
|
io.WriteString(w, SPCconv(a.Offset))
|
2015-02-25 09:07:02 -08:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2020-01-26 09:59:25 -08:00
|
|
|
func (a *Addr) WriteNameTo(w io.Writer) {
|
2020-10-07 12:31:05 -04:00
|
|
|
a.writeNameTo(w, false)
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
func (a *Addr) writeNameTo(w io.Writer, abiDetail bool) {
|
|
|
|
|
|
2015-02-25 09:07:02 -08:00
|
|
|
switch a.Name {
|
|
|
|
|
default:
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "name=%d", a.Name)
|
2015-02-25 09:07:02 -08:00
|
|
|
|
|
|
|
|
case NAME_NONE:
|
|
|
|
|
switch {
|
|
|
|
|
case a.Reg == REG_NONE:
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprint(w, a.Offset)
|
2015-02-25 09:07:02 -08:00
|
|
|
case a.Offset == 0:
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "(%v)", Rconv(int(a.Reg)))
|
2015-02-25 09:07:02 -08:00
|
|
|
case a.Offset != 0:
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "%d(%v)", a.Offset, Rconv(int(a.Reg)))
|
2015-02-25 09:07:02 -08:00
|
|
|
}
|
|
|
|
|
|
2017-02-19 09:37:22 -08:00
|
|
|
// Note: a.Reg == REG_NONE encodes the default base register for the NAME_ type.
|
2015-02-25 09:07:02 -08:00
|
|
|
case NAME_EXTERN:
|
2017-02-19 09:37:22 -08:00
|
|
|
reg := "SB"
|
|
|
|
|
if a.Reg != REG_NONE {
|
|
|
|
|
reg = Rconv(int(a.Reg))
|
|
|
|
|
}
|
2015-09-15 10:59:27 -07:00
|
|
|
if a.Sym != nil {
|
2020-10-07 12:31:05 -04:00
|
|
|
fmt.Fprintf(w, "%s%s%s(%s)", a.Sym.Name, abiDecorate(a, abiDetail), offConv(a.Offset), reg)
|
2015-09-15 10:59:27 -07:00
|
|
|
} else {
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "%s(%s)", offConv(a.Offset), reg)
|
2015-09-15 10:59:27 -07:00
|
|
|
}
|
2015-02-25 09:07:02 -08:00
|
|
|
|
2015-03-30 00:49:25 +00:00
|
|
|
case NAME_GOTREF:
|
2017-02-19 09:37:22 -08:00
|
|
|
reg := "SB"
|
|
|
|
|
if a.Reg != REG_NONE {
|
|
|
|
|
reg = Rconv(int(a.Reg))
|
|
|
|
|
}
|
2015-09-15 10:59:27 -07:00
|
|
|
if a.Sym != nil {
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "%s%s@GOT(%s)", a.Sym.Name, offConv(a.Offset), reg)
|
2015-09-15 10:59:27 -07:00
|
|
|
} else {
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "%s@GOT(%s)", offConv(a.Offset), reg)
|
2015-09-15 10:59:27 -07:00
|
|
|
}
|
2015-03-30 00:49:25 +00:00
|
|
|
|
2015-02-25 09:07:02 -08:00
|
|
|
case NAME_STATIC:
|
2017-02-19 09:37:22 -08:00
|
|
|
reg := "SB"
|
|
|
|
|
if a.Reg != REG_NONE {
|
|
|
|
|
reg = Rconv(int(a.Reg))
|
|
|
|
|
}
|
2015-09-15 10:59:27 -07:00
|
|
|
if a.Sym != nil {
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "%s<>%s(%s)", a.Sym.Name, offConv(a.Offset), reg)
|
2015-09-15 10:59:27 -07:00
|
|
|
} else {
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "<>%s(%s)", offConv(a.Offset), reg)
|
2015-09-15 10:59:27 -07:00
|
|
|
}
|
2015-02-25 09:07:02 -08:00
|
|
|
|
|
|
|
|
case NAME_AUTO:
|
2017-02-19 09:37:22 -08:00
|
|
|
reg := "SP"
|
|
|
|
|
if a.Reg != REG_NONE {
|
|
|
|
|
reg = Rconv(int(a.Reg))
|
|
|
|
|
}
|
2015-02-25 09:07:02 -08:00
|
|
|
if a.Sym != nil {
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "%s%s(%s)", a.Sym.Name, offConv(a.Offset), reg)
|
2015-02-25 09:07:02 -08:00
|
|
|
} else {
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "%s(%s)", offConv(a.Offset), reg)
|
2015-02-25 09:07:02 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case NAME_PARAM:
|
2017-02-19 09:37:22 -08:00
|
|
|
reg := "FP"
|
|
|
|
|
if a.Reg != REG_NONE {
|
|
|
|
|
reg = Rconv(int(a.Reg))
|
|
|
|
|
}
|
2015-02-25 09:07:02 -08:00
|
|
|
if a.Sym != nil {
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "%s%s(%s)", a.Sym.Name, offConv(a.Offset), reg)
|
2015-02-25 09:07:02 -08:00
|
|
|
} else {
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "%s(%s)", offConv(a.Offset), reg)
|
2015-02-25 09:07:02 -08:00
|
|
|
}
|
2018-11-23 14:20:19 +01:00
|
|
|
case NAME_TOCREF:
|
|
|
|
|
reg := "SB"
|
|
|
|
|
if a.Reg != REG_NONE {
|
|
|
|
|
reg = Rconv(int(a.Reg))
|
|
|
|
|
}
|
|
|
|
|
if a.Sym != nil {
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "%s%s(%s)", a.Sym.Name, offConv(a.Offset), reg)
|
2018-11-23 14:20:19 +01:00
|
|
|
} else {
|
2020-01-26 09:59:25 -08:00
|
|
|
fmt.Fprintf(w, "%s(%s)", offConv(a.Offset), reg)
|
2018-11-23 14:20:19 +01:00
|
|
|
}
|
2015-02-25 09:07:02 -08:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
func offConv(off int64) string {
|
|
|
|
|
if off == 0 {
|
|
|
|
|
return ""
|
|
|
|
|
}
|
|
|
|
|
return fmt.Sprintf("%+d", off)
|
|
|
|
|
}
|
2015-02-26 17:09:16 -08:00
|
|
|
|
2018-05-16 02:21:59 +03:00
|
|
|
// opSuffixSet is like regListSet, but for opcode suffixes.
|
|
|
|
|
//
|
|
|
|
|
// Unlike some other similar structures, uint8 space is not
|
2018-10-06 06:10:25 +00:00
|
|
|
// divided by its own values set (because there are only 256 of them).
|
2018-05-16 02:21:59 +03:00
|
|
|
// Instead, every arch may interpret/format all 8 bits as they like,
|
|
|
|
|
// as long as they register proper cconv function for it.
|
|
|
|
|
type opSuffixSet struct {
|
|
|
|
|
arch string
|
|
|
|
|
cconv func(suffix uint8) string
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
var opSuffixSpace []opSuffixSet
|
|
|
|
|
|
|
|
|
|
// RegisterOpSuffix assigns cconv function for formatting opcode suffixes
|
|
|
|
|
// when compiling for GOARCH=arch.
|
|
|
|
|
//
|
|
|
|
|
// cconv is never called with 0 argument.
|
|
|
|
|
func RegisterOpSuffix(arch string, cconv func(uint8) string) {
|
|
|
|
|
opSuffixSpace = append(opSuffixSpace, opSuffixSet{
|
|
|
|
|
arch: arch,
|
|
|
|
|
cconv: cconv,
|
|
|
|
|
})
|
|
|
|
|
}
|
|
|
|
|
|
2015-02-26 17:09:16 -08:00
|
|
|
type regSet struct {
|
|
|
|
|
lo int
|
|
|
|
|
hi int
|
|
|
|
|
Rconv func(int) string
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Few enough architectures that a linear scan is fastest.
|
|
|
|
|
// Not even worth sorting.
|
|
|
|
|
var regSpace []regSet
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
Each architecture defines a register space as a unique
|
|
|
|
|
integer range.
|
|
|
|
|
Here is the list of architectures and the base of their register spaces.
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
const (
|
|
|
|
|
// Because of masking operations in the encodings, each register
|
|
|
|
|
// space should start at 0 modulo some power of 2.
|
2021-08-15 16:01:31 +08:00
|
|
|
RBase386 = 1 * 1024
|
|
|
|
|
RBaseAMD64 = 2 * 1024
|
|
|
|
|
RBaseARM = 3 * 1024
|
|
|
|
|
RBasePPC64 = 4 * 1024 // range [4k, 8k)
|
|
|
|
|
RBaseARM64 = 8 * 1024 // range [8k, 13k)
|
|
|
|
|
RBaseMIPS = 13 * 1024 // range [13k, 14k)
|
|
|
|
|
RBaseS390X = 14 * 1024 // range [14k, 15k)
|
|
|
|
|
RBaseRISCV = 15 * 1024 // range [15k, 16k)
|
|
|
|
|
RBaseWasm = 16 * 1024
|
cmd/internal/obj/loong64: add support of VMOVQ and XVMOVQ
This CL refers to the implementation of ARM64 and adds support for the following
types of SIMD instructions:
1. Move general-purpose register to a vector element, e.g.:
VMOVQ Rj, <Vd>.<T>[index]
<T> can have the following values:
B, H, W, V
2. Move vector element to general-purpose register, e.g.:
VMOVQ <Vj>.<T>[index], Rd
<T> can have the following values:
B, BU, H, HU, W, WU, VU
3. Duplicate general-purpose register to vector, e.g.:
VMOVQ Rj, <Vd>.<T>
<T> can have the following values:
B16, H8, W4, V2, B32, H16, W8, V4
4. Move vector, e.g.:
XVMOVQ Xj, <Xd>.<T>
<T> can have the following values:
B16, H8, W4, V2, Q1
5. Move vector element to scalar, e.g.:
XVMOVQ Xj, <Xd>.<T>[index]
XVMOVQ Xj.<T>[index], Xd
<T> can have the following values:
W, V
6. Move vector element to vector register, e.g.:
VMOVQ <Vn>.<T>[index], Vn.<T>
<T> can have the following values:
B, H, W, V
This CL only adds syntax and doesn't break any assembly that already exists.
Change-Id: I7656efac6def54da6c5ae182f39c2a21bfdf92bb
Reviewed-on: https://go-review.googlesource.com/c/go/+/616258
Reviewed-by: David Chase <drchase@google.com>
Reviewed-by: Meidan Li <limeidan@loongson.cn>
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
Reviewed-by: Cherry Mui <cherryyz@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2024-11-04 18:14:00 +08:00
|
|
|
RBaseLOONG64 = 19 * 1024 // range [19K, 22k)
|
2015-02-26 17:09:16 -08:00
|
|
|
)
|
|
|
|
|
|
|
|
|
|
// RegisterRegister binds a pretty-printer (Rconv) for register
|
2016-03-01 23:21:55 +00:00
|
|
|
// numbers to a given register number range. Lo is inclusive,
|
2015-02-26 17:09:16 -08:00
|
|
|
// hi exclusive (valid registers are lo through hi-1).
|
|
|
|
|
func RegisterRegister(lo, hi int, Rconv func(int) string) {
|
|
|
|
|
regSpace = append(regSpace, regSet{lo, hi, Rconv})
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
func Rconv(reg int) string {
|
|
|
|
|
if reg == REG_NONE {
|
|
|
|
|
return "NONE"
|
|
|
|
|
}
|
|
|
|
|
for i := range regSpace {
|
|
|
|
|
rs := ®Space[i]
|
|
|
|
|
if rs.lo <= reg && reg < rs.hi {
|
|
|
|
|
return rs.Rconv(reg)
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
return fmt.Sprintf("R???%d", reg)
|
|
|
|
|
}
|
2015-02-27 13:50:26 -08:00
|
|
|
|
cmd/asm: refine Go assembly for ARM64
Some ARM64-specific instructions (such as SIMD instructions) are not supported.
This patch adds support for the following:
1. Extended register, e.g.:
ADD Rm.<ext>[<<amount], Rn, Rd
<ext> can have the following values:
UXTB, UXTH, UXTW, UXTX, SXTB, SXTH, SXTW and SXTX
2. Arrangement for SIMD instructions, e.g.:
VADDP Vm.<T>, Vn.<T>, Vd.<T>
<T> can have the following values:
B8, B16, H4, H8, S2, S4 and D2
3. Width specifier and element index for SIMD instructions, e.g.:
VMOV Vn.<T>[index], Rd // MOV(to general register)
<T> can have the following values:
S and D
4. Register List, e.g.:
VLD1 (Rn), [Vt1.<T>, Vt2.<T>, Vt3.<T>]
5. Register offset variant, e.g.:
VLD1.P (Rn)(Rm), [Vt1.<T>, Vt2.<T>] // Rm is the post-index register
6. Go assembly for ARM64 reference manual
new added instructions are required to have according explanation items in
the manual and items for existed instructions will be added incrementally
For more information about the refinement background, please refer to the
discussion (https://groups.google.com/forum/#!topic/golang-dev/rWgDxCrL4GU)
This patch only adds syntax and doesn't break any assembly that already exists.
Change-Id: I34e90b7faae032820593a0e417022c354a882008
Reviewed-on: https://go-review.googlesource.com/41654
Run-TryBot: Cherry Zhang <cherryyz@google.com>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-25 18:29:54 +08:00
|
|
|
type regListSet struct {
|
|
|
|
|
lo int64
|
|
|
|
|
hi int64
|
|
|
|
|
RLconv func(int64) string
|
|
|
|
|
}
|
2015-02-27 13:50:26 -08:00
|
|
|
|
cmd/asm: refine Go assembly for ARM64
Some ARM64-specific instructions (such as SIMD instructions) are not supported.
This patch adds support for the following:
1. Extended register, e.g.:
ADD Rm.<ext>[<<amount], Rn, Rd
<ext> can have the following values:
UXTB, UXTH, UXTW, UXTX, SXTB, SXTH, SXTW and SXTX
2. Arrangement for SIMD instructions, e.g.:
VADDP Vm.<T>, Vn.<T>, Vd.<T>
<T> can have the following values:
B8, B16, H4, H8, S2, S4 and D2
3. Width specifier and element index for SIMD instructions, e.g.:
VMOV Vn.<T>[index], Rd // MOV(to general register)
<T> can have the following values:
S and D
4. Register List, e.g.:
VLD1 (Rn), [Vt1.<T>, Vt2.<T>, Vt3.<T>]
5. Register offset variant, e.g.:
VLD1.P (Rn)(Rm), [Vt1.<T>, Vt2.<T>] // Rm is the post-index register
6. Go assembly for ARM64 reference manual
new added instructions are required to have according explanation items in
the manual and items for existed instructions will be added incrementally
For more information about the refinement background, please refer to the
discussion (https://groups.google.com/forum/#!topic/golang-dev/rWgDxCrL4GU)
This patch only adds syntax and doesn't break any assembly that already exists.
Change-Id: I34e90b7faae032820593a0e417022c354a882008
Reviewed-on: https://go-review.googlesource.com/41654
Run-TryBot: Cherry Zhang <cherryyz@google.com>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-25 18:29:54 +08:00
|
|
|
var regListSpace []regListSet
|
|
|
|
|
|
|
|
|
|
// Each architecture is allotted a distinct subspace: [Lo, Hi) for declaring its
|
|
|
|
|
// arch-specific register list numbers.
|
|
|
|
|
const (
|
|
|
|
|
RegListARMLo = 0
|
|
|
|
|
RegListARMHi = 1 << 16
|
|
|
|
|
|
|
|
|
|
// arm64 uses the 60th bit to differentiate from other archs
|
|
|
|
|
RegListARM64Lo = 1 << 60
|
|
|
|
|
RegListARM64Hi = 1<<61 - 1
|
2018-05-16 02:21:59 +03:00
|
|
|
|
|
|
|
|
// x86 uses the 61th bit to differentiate from other archs
|
|
|
|
|
RegListX86Lo = 1 << 61
|
|
|
|
|
RegListX86Hi = 1<<62 - 1
|
cmd/asm: refine Go assembly for ARM64
Some ARM64-specific instructions (such as SIMD instructions) are not supported.
This patch adds support for the following:
1. Extended register, e.g.:
ADD Rm.<ext>[<<amount], Rn, Rd
<ext> can have the following values:
UXTB, UXTH, UXTW, UXTX, SXTB, SXTH, SXTW and SXTX
2. Arrangement for SIMD instructions, e.g.:
VADDP Vm.<T>, Vn.<T>, Vd.<T>
<T> can have the following values:
B8, B16, H4, H8, S2, S4 and D2
3. Width specifier and element index for SIMD instructions, e.g.:
VMOV Vn.<T>[index], Rd // MOV(to general register)
<T> can have the following values:
S and D
4. Register List, e.g.:
VLD1 (Rn), [Vt1.<T>, Vt2.<T>, Vt3.<T>]
5. Register offset variant, e.g.:
VLD1.P (Rn)(Rm), [Vt1.<T>, Vt2.<T>] // Rm is the post-index register
6. Go assembly for ARM64 reference manual
new added instructions are required to have according explanation items in
the manual and items for existed instructions will be added incrementally
For more information about the refinement background, please refer to the
discussion (https://groups.google.com/forum/#!topic/golang-dev/rWgDxCrL4GU)
This patch only adds syntax and doesn't break any assembly that already exists.
Change-Id: I34e90b7faae032820593a0e417022c354a882008
Reviewed-on: https://go-review.googlesource.com/41654
Run-TryBot: Cherry Zhang <cherryyz@google.com>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-25 18:29:54 +08:00
|
|
|
)
|
|
|
|
|
|
|
|
|
|
// RegisterRegisterList binds a pretty-printer (RLconv) for register list
|
|
|
|
|
// numbers to a given register list number range. Lo is inclusive,
|
|
|
|
|
// hi exclusive (valid register list are lo through hi-1).
|
|
|
|
|
func RegisterRegisterList(lo, hi int64, rlconv func(int64) string) {
|
|
|
|
|
regListSpace = append(regListSpace, regListSet{lo, hi, rlconv})
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
func RLconv(list int64) string {
|
|
|
|
|
for i := range regListSpace {
|
|
|
|
|
rls := ®ListSpace[i]
|
|
|
|
|
if rls.lo <= list && list < rls.hi {
|
|
|
|
|
return rls.RLconv(list)
|
2015-02-27 13:50:26 -08:00
|
|
|
}
|
|
|
|
|
}
|
cmd/asm: refine Go assembly for ARM64
Some ARM64-specific instructions (such as SIMD instructions) are not supported.
This patch adds support for the following:
1. Extended register, e.g.:
ADD Rm.<ext>[<<amount], Rn, Rd
<ext> can have the following values:
UXTB, UXTH, UXTW, UXTX, SXTB, SXTH, SXTW and SXTX
2. Arrangement for SIMD instructions, e.g.:
VADDP Vm.<T>, Vn.<T>, Vd.<T>
<T> can have the following values:
B8, B16, H4, H8, S2, S4 and D2
3. Width specifier and element index for SIMD instructions, e.g.:
VMOV Vn.<T>[index], Rd // MOV(to general register)
<T> can have the following values:
S and D
4. Register List, e.g.:
VLD1 (Rn), [Vt1.<T>, Vt2.<T>, Vt3.<T>]
5. Register offset variant, e.g.:
VLD1.P (Rn)(Rm), [Vt1.<T>, Vt2.<T>] // Rm is the post-index register
6. Go assembly for ARM64 reference manual
new added instructions are required to have according explanation items in
the manual and items for existed instructions will be added incrementally
For more information about the refinement background, please refer to the
discussion (https://groups.google.com/forum/#!topic/golang-dev/rWgDxCrL4GU)
This patch only adds syntax and doesn't break any assembly that already exists.
Change-Id: I34e90b7faae032820593a0e417022c354a882008
Reviewed-on: https://go-review.googlesource.com/41654
Run-TryBot: Cherry Zhang <cherryyz@google.com>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
2017-04-25 18:29:54 +08:00
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return fmt.Sprintf("RL???%d", list)
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2015-02-27 13:50:26 -08:00
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}
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2015-03-02 20:17:20 -08:00
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2020-08-12 17:41:54 +08:00
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// Special operands
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type spcSet struct {
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lo int64
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hi int64
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SPCconv func(int64) string
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}
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var spcSpace []spcSet
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// RegisterSpecialOperands binds a pretty-printer (SPCconv) for special
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// operand numbers to a given special operand number range. Lo is inclusive,
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// hi is exclusive (valid special operands are lo through hi-1).
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func RegisterSpecialOperands(lo, hi int64, rlconv func(int64) string) {
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spcSpace = append(spcSpace, spcSet{lo, hi, rlconv})
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}
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// SPCconv returns the string representation of the special operand spc.
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func SPCconv(spc int64) string {
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for i := range spcSpace {
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spcs := &spcSpace[i]
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if spcs.lo <= spc && spc < spcs.hi {
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return spcs.SPCconv(spc)
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}
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}
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return fmt.Sprintf("SPC???%d", spc)
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}
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2015-03-02 20:17:20 -08:00
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type opSet struct {
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2016-03-07 18:00:08 -08:00
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lo As
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2015-03-02 20:17:20 -08:00
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names []string
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}
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// Not even worth sorting
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var aSpace []opSet
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// RegisterOpcode binds a list of instruction names
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// to a given instruction number range.
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2016-03-07 18:00:08 -08:00
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func RegisterOpcode(lo As, Anames []string) {
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2016-06-17 12:28:31 -07:00
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if len(Anames) > AllowedOpCodes {
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panic(fmt.Sprintf("too many instructions, have %d max %d", len(Anames), AllowedOpCodes))
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}
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2015-03-02 20:17:20 -08:00
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aSpace = append(aSpace, opSet{lo, Anames})
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}
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2016-07-18 21:59:14 -07:00
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func (a As) String() string {
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2016-03-07 18:00:08 -08:00
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if 0 <= a && int(a) < len(Anames) {
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2015-03-02 20:17:20 -08:00
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return Anames[a]
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}
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for i := range aSpace {
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as := &aSpace[i]
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2016-03-07 18:00:08 -08:00
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if as.lo <= a && int(a-as.lo) < len(as.names) {
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2015-03-02 20:17:20 -08:00
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return as.names[a-as.lo]
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}
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}
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return fmt.Sprintf("A???%d", a)
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}
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var Anames = []string{
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"XXX",
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"CALL",
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"DUFFCOPY",
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"DUFFZERO",
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"END",
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"FUNCDATA",
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"JMP",
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"NOP",
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2018-10-23 12:33:56 -04:00
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"PCALIGN",
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2024-04-02 11:12:44 -04:00
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"PCALIGNMAX",
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2015-03-02 20:17:20 -08:00
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"PCDATA",
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"RET",
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2018-04-25 08:38:09 +00:00
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"GETCALLERPC",
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2015-03-02 20:17:20 -08:00
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"TEXT",
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"UNDEF",
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}
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2015-04-22 12:41:14 +12:00
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func Bool2int(b bool) int {
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2016-08-18 18:24:21 -07:00
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// The compiler currently only optimizes this form.
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// See issue 6011.
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var i int
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2015-04-22 12:41:14 +12:00
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if b {
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2016-08-18 18:24:21 -07:00
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i = 1
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} else {
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i = 0
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2015-04-22 12:41:14 +12:00
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}
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2016-08-18 18:24:21 -07:00
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return i
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2015-04-22 12:41:14 +12:00
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}
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2020-10-07 12:31:05 -04:00
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func abiDecorate(a *Addr, abiDetail bool) string {
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if !abiDetail || a.Sym == nil {
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return ""
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}
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return fmt.Sprintf("<%s>", a.Sym.ABI())
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}
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2024-04-02 11:12:44 -04:00
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// AlignmentPadding bytes to add to align code as requested.
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// Alignment is restricted to powers of 2 between 8 and 2048 inclusive.
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//
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// pc_: current offset in function, in bytes
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// p: a PCALIGN or PCALIGNMAX prog
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// ctxt: the context, for current function
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// cursym: current function being assembled
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// returns number of bytes of padding needed,
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// updates minimum alignment for the function.
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func AlignmentPadding(pc int32, p *Prog, ctxt *Link, cursym *LSym) int {
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v := AlignmentPaddingLength(pc, p, ctxt)
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requireAlignment(p.From.Offset, ctxt, cursym)
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return v
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}
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// AlignmentPaddingLength is the number of bytes to add to align code as requested.
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// Alignment is restricted to powers of 2 between 8 and 2048 inclusive.
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// This only computes the length and does not update the (missing parameter)
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// current function's own required alignment.
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//
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// pc: current offset in function, in bytes
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// p: a PCALIGN or PCALIGNMAX prog
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// ctxt: the context, for current function
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// returns number of bytes of padding needed,
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func AlignmentPaddingLength(pc int32, p *Prog, ctxt *Link) int {
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a := p.From.Offset
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if !((a&(a-1) == 0) && 8 <= a && a <= 2048) {
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ctxt.Diag("alignment value of an instruction must be a power of two and in the range [8, 2048], got %d\n", a)
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return 0
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}
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pc64 := int64(pc)
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lob := pc64 & (a - 1) // Low Order Bits -- if not zero, then not aligned
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if p.As == APCALIGN {
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if lob != 0 {
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return int(a - lob)
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}
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return 0
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}
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// emit as many as s bytes of padding to obtain alignment
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s := p.To.Offset
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if s < 0 || s >= a {
|
2024-11-20 21:56:27 +08:00
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ctxt.Diag("PCALIGNMAX 'amount' %d must be non-negative and smaller than the alignment %d\n", s, a)
|
2024-04-02 11:12:44 -04:00
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return 0
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}
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if s >= a-lob {
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return int(a - lob)
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}
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return 0
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}
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// requireAlignment ensures that the function is aligned enough to support
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// the required code alignment
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func requireAlignment(a int64, ctxt *Link, cursym *LSym) {
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// TODO remove explicit knowledge about AIX.
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if ctxt.Headtype != objabi.Haix && cursym.Func().Align < int32(a) {
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cursym.Func().Align = int32(a)
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}
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}
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