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runtime: remove duff support for riscv64

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Change-Id: I987d9f49fbd2650eef4224f72271bf752c54d39c
Reviewed-on: https://go-review.googlesource.com/c/go/+/700538
Reviewed-by: Mark Freeman <markfreeman@google.com>
Reviewed-by: Keith Randall <khr@golang.org>
Reviewed-by: Keith Randall <khr@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Mark Ryan <markdryan@rivosinc.com>
This commit is contained in:
Meng Zhuo 2025-09-03 16:43:54 +08:00
parent 4dac9e093f
commit b9a4a09b0f
6 changed files with 3 additions and 1056 deletions
Download patch file Download diff file Expand all files Collapse all files

14
src/cmd/compile/internal/riscv64/ssa.go
View file

@ -949,20 +949,6 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
p.To.Type = obj.TYPE_REG
p.To.Reg = v.Reg()
case ssa.OpRISCV64DUFFZERO:
p := s.Prog(obj.ADUFFZERO)
p.To.Type = obj.TYPE_MEM
p.To.Name = obj.NAME_EXTERN
p.To.Sym = ir.Syms.Duffzero
p.To.Offset = v.AuxInt
case ssa.OpRISCV64DUFFCOPY:
p := s.Prog(obj.ADUFFCOPY)
p.To.Type = obj.TYPE_MEM
p.To.Name = obj.NAME_EXTERN
p.To.Sym = ir.Syms.Duffcopy
p.To.Offset = v.AuxInt
case ssa.OpRISCV64LoweredPubBarrier:
// FENCE
s.Prog(v.Op.Asm())

38
src/cmd/compile/internal/ssa/_gen/RISCV64Ops.go
View file

@ -278,44 +278,6 @@ func init() {
{name: "CALLclosure", argLength: -1, reg: callClosure, aux: "CallOff", call: true}, // call function via closure. arg0=codeptr, arg1=closure, last arg=mem, auxint=argsize, returns mem
{name: "CALLinter", argLength: -1, reg: callInter, aux: "CallOff", call: true}, // call fn by pointer. arg0=codeptr, last arg=mem, auxint=argsize, returns mem
// duffzero
// arg0 = address of memory to zero (in X25, changed as side effect)
// arg1 = mem
// auxint = offset into duffzero code to start executing
// X1 (link register) changed because of function call
// returns mem
{
name: "DUFFZERO",
aux: "Int64",
argLength: 2,
reg: regInfo{
inputs: []regMask{regNamed["X25"]},
clobbers: regNamed["X1"] | regNamed["X25"],
},
typ: "Mem",
faultOnNilArg0: true,
},
// duffcopy
// arg0 = address of dst memory (in X25, changed as side effect)
// arg1 = address of src memory (in X24, changed as side effect)
// arg2 = mem
// auxint = offset into duffcopy code to start executing
// X1 (link register) changed because of function call
// returns mem
{
name: "DUFFCOPY",
aux: "Int64",
argLength: 3,
reg: regInfo{
inputs: []regMask{regNamed["X25"], regNamed["X24"]},
clobbers: regNamed["X1"] | regNamed["X24"] | regNamed["X25"],
},
typ: "Mem",
faultOnNilArg0: true,
faultOnNilArg1: true,
},
// Generic moves and zeros
// general unrolled zeroing

28
src/cmd/compile/internal/ssa/opGen.go
View file

@ -2566,8 +2566,6 @@ const (
OpRISCV64CALLtail
OpRISCV64CALLclosure
OpRISCV64CALLinter
OpRISCV64DUFFZERO
OpRISCV64DUFFCOPY
OpRISCV64LoweredZero
OpRISCV64LoweredZeroLoop
OpRISCV64LoweredMove
@ -34532,32 +34530,6 @@ var opcodeTable = [...]opInfo{
clobbers: 9223372035781033968, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31
},
},
{
name: "DUFFZERO",
auxType: auxInt64,
argLen: 2,
faultOnNilArg0: true,
reg: regInfo{
inputs: []inputInfo{
{0, 16777216}, // X25
},
clobbers: 16777216, // X25
},
},
{
name: "DUFFCOPY",
auxType: auxInt64,
argLen: 3,
faultOnNilArg0: true,
faultOnNilArg1: true,
reg: regInfo{
inputs: []inputInfo{
{0, 16777216}, // X25
{1, 8388608}, // X24
},
clobbers: 25165824, // X24 X25
},
},
{
name: "LoweredZero",
auxType: auxSymValAndOff,

44
src/cmd/internal/obj/riscv/obj.go
View file

@ -37,7 +37,7 @@ func buildop(ctxt *obj.Link) {}
func jalToSym(ctxt *obj.Link, p *obj.Prog, lr int16) {
switch p.As {
case obj.ACALL, obj.AJMP, obj.ARET, obj.ADUFFZERO, obj.ADUFFCOPY:
case obj.ACALL, obj.AJMP, obj.ARET:
default:
ctxt.Diag("unexpected Prog in jalToSym: %v", p)
return
@ -162,42 +162,6 @@ func progedit(ctxt *obj.Link, p *obj.Prog, newprog obj.ProgAlloc) {
// Rewrite p, if necessary, to access global data via the global offset table.
func rewriteToUseGot(ctxt *obj.Link, p *obj.Prog, newprog obj.ProgAlloc) {
if p.As == obj.ADUFFCOPY || p.As == obj.ADUFFZERO {
// ADUFFxxx $offset
// becomes
// MOV runtime.duffxxx@GOT, REG_TMP
// ADD $offset, REG_TMP
// CALL REG_TMP
var sym *obj.LSym
if p.As == obj.ADUFFCOPY {
sym = ctxt.LookupABI("runtime.duffcopy", obj.ABIInternal)
} else {
sym = ctxt.LookupABI("runtime.duffzero", obj.ABIInternal)
}
offset := p.To.Offset
p.As = AMOV
p.From.Type = obj.TYPE_MEM
p.From.Name = obj.NAME_GOTREF
p.From.Sym = sym
p.To.Type = obj.TYPE_REG
p.To.Reg = REG_TMP
p.To.Name = obj.NAME_NONE
p.To.Offset = 0
p.To.Sym = nil
p1 := obj.Appendp(p, newprog)
p1.As = AADD
p1.From.Type = obj.TYPE_CONST
p1.From.Offset = offset
p1.To.Type = obj.TYPE_REG
p1.To.Reg = REG_TMP
p2 := obj.Appendp(p1, newprog)
p2.As = obj.ACALL
p2.To.Type = obj.TYPE_REG
p2.To.Reg = REG_TMP
}
// We only care about global data: NAME_EXTERN means a global
// symbol in the Go sense and p.Sym.Local is true for a few internally
// defined symbols.
@ -407,7 +371,7 @@ func containsCall(sym *obj.LSym) bool {
// CALLs are CALL or JAL(R) with link register LR.
for p := sym.Func().Text; p != nil; p = p.Link {
switch p.As {
case obj.ACALL, obj.ADUFFZERO, obj.ADUFFCOPY:
case obj.ACALL:
return true
case AJAL, AJALR:
if p.From.Type == obj.TYPE_REG && p.From.Reg == REG_LR {
@ -586,7 +550,7 @@ func preprocess(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) {
p.From.Reg = REG_SP
}
case obj.ACALL, obj.ADUFFZERO, obj.ADUFFCOPY:
case obj.ACALL:
switch p.To.Type {
case obj.TYPE_MEM:
jalToSym(ctxt, p, REG_LR)
@ -2634,8 +2598,6 @@ var instructions = [ALAST & obj.AMask]instructionData{
obj.APCDATA: {enc: pseudoOpEncoding},
obj.ATEXT: {enc: pseudoOpEncoding},
obj.ANOP: {enc: pseudoOpEncoding},
obj.ADUFFZERO: {enc: pseudoOpEncoding},
obj.ADUFFCOPY: {enc: pseudoOpEncoding},
obj.APCALIGN: {enc: pseudoOpEncoding},
}

907
src/runtime/duff_riscv64.s
View file

@ -1,907 +0,0 @@
// Code generated by mkduff.go; DO NOT EDIT.
// Run go generate from src/runtime to update.
// See mkduff.go for comments.
#include "textflag.h"
TEXT runtime·duffzero<ABIInternal>(SB), NOSPLIT|NOFRAME, $0-0
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
MOV ZERO, (X25)
ADD $8, X25
RET
TEXT runtime·duffcopy<ABIInternal>(SB), NOSPLIT|NOFRAME, $0-0
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
MOV (X24), X31
ADD $8, X24
MOV X31, (X25)
ADD $8, X25
RET

28
src/runtime/mkduff.go
View file

@ -36,7 +36,6 @@ func main() {
gen("arm", notags, zeroARM, copyARM)
gen("ppc64x", tagsPPC64x, zeroPPC64x, copyPPC64x)
gen("mips64x", tagsMIPS64x, zeroMIPS64x, copyMIPS64x)
gen("riscv64", notags, zeroRISCV64, copyRISCV64)
}
func gen(arch string, tags, zero, copy func(io.Writer)) {
@ -230,30 +229,3 @@ func copyMIPS64x(w io.Writer) {
}
fmt.Fprintln(w, "\tRET")
}
func zeroRISCV64(w io.Writer) {
// ZERO: always zero
// X25: ptr to memory to be zeroed
// X25 is updated as a side effect.
fmt.Fprintln(w, "TEXT runtime·duffzero<ABIInternal>(SB), NOSPLIT|NOFRAME, $0-0")
for i := 0; i < 128; i++ {
fmt.Fprintln(w, "\tMOV\tZERO, (X25)")
fmt.Fprintln(w, "\tADD\t$8, X25")
}
fmt.Fprintln(w, "\tRET")
}
func copyRISCV64(w io.Writer) {
// X24: ptr to source memory
// X25: ptr to destination memory
// X24 and X25 are updated as a side effect
fmt.Fprintln(w, "TEXT runtime·duffcopy<ABIInternal>(SB), NOSPLIT|NOFRAME, $0-0")
for i := 0; i < 128; i++ {
fmt.Fprintln(w, "\tMOV\t(X24), X31")
fmt.Fprintln(w, "\tADD\t$8, X24")
fmt.Fprintln(w, "\tMOV\tX31, (X25)")
fmt.Fprintln(w, "\tADD\t$8, X25")
fmt.Fprintln(w)
}
fmt.Fprintln(w, "\tRET")
}